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author | chunseok lee <chunseok.lee@samsung.com> | 2017-12-18 14:23:08 +0900 |
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committer | chunseok lee <chunseok.lee@samsung.com> | 2017-12-18 17:00:33 +0900 |
commit | 9b4ef4ad4bbbce70017e1bc10b333b3f7a44807c (patch) | |
tree | 7a7d0541b1085ded1227ca645a3da4cc1bc7c378 /packaging/coreclr.spec | |
parent | e0dc2d243e4b77c0b3a8050e4d648733aa162d32 (diff) | |
download | coreclr-9b4ef4ad4bbbce70017e1bc10b333b3f7a44807c.tar.gz coreclr-9b4ef4ad4bbbce70017e1bc10b333b3f7a44807c.tar.bz2 coreclr-9b4ef4ad4bbbce70017e1bc10b333b3f7a44807c.zip |
Enable gdbjit while NI file existsubmit/tizen_4.0/20171229.060354accepted/tizen/4.0/unified/20180102.065619
upstream cherry pick(https://github.com/dotnet/coreclr/pull/15501)
Change-Id: Id65783c9af70e2ff907a83f923d00123fee96fd8
Signed-off-by: chunseok lee <chunseok.lee@samsung.com>
Diffstat (limited to 'packaging/coreclr.spec')
-rw-r--r-- | packaging/coreclr.spec | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/packaging/coreclr.spec b/packaging/coreclr.spec index 1af5bba33d..5ae7c2bfa2 100644 --- a/packaging/coreclr.spec +++ b/packaging/coreclr.spec @@ -23,7 +23,7 @@ Source1000: downloaded_files.tar.gz Source1001: %{name}.manifest Source1002: libicu.tar.gz Source1003: dep_libs.tar.gz -# Gbp-Ignore-Patches: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 +# Gbp-Ignore-Patches: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 Patch0: 0001-Add-project.assets.json-files.patch Patch1: 0001-ARM-Linux-Support-unaligned-struct-read-write-11290.patch Patch2: 0002-x86-Linux-Thread-safe-UMThunkMarshInfo-RunTimeInit-1.patch @@ -63,6 +63,7 @@ Patch35: 0001-Fix-clrstack-command-of-lldb-sosplugin-on-x86-13973.patch Patch36: 0001-Fix-typo-in-SetDebuggerREGDISPLAYFromREGDISPLAY-1422.patch Patch37: 0001-Use-addresses-without-sign-extension-in-lldb-plugin-.patch Patch38: 0001-Fix-uaf-in-DestroyThread-function.patch +Patch39: 0001-Enable-gdbjit-while-NI-file-exist.patch ExcludeArch: aarch64 @@ -200,6 +201,7 @@ cp %{SOURCE1001} . %patch36 -p1 %patch37 -p1 %patch38 -p1 +%patch39 -p1 %if 0%{skipmscorlib} %else |