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| author | Michal Strehovský <MichalStrehovsky@users.noreply.github.com> | 2019-01-18 12:01:03 +0100 |
|---|---|---|
| committer | Stephen Toub <stoub@microsoft.com> | 2019-01-18 11:47:21 -0500 |
| commit | f1fe9ff1ecb257d260d83ab30be112f77273c95d (patch) | |
| tree | 06e6940ef15054d246343968adb5879c386b60ec /eng | |
| parent | 7fb4ac5629230302800991444f960feefc6da38c (diff) | |
| download | coreclr-f1fe9ff1ecb257d260d83ab30be112f77273c95d.tar.gz coreclr-f1fe9ff1ecb257d260d83ab30be112f77273c95d.tar.bz2 coreclr-f1fe9ff1ecb257d260d83ab30be112f77273c95d.zip | |
Enable detection of HW intrinsics (dotnet/corert#6836)
I took the liberty of marking the types containing the hardware intrinsics as [Intrinsic] to avoid doing a name check on everything in the system module. It feels like we should take advantage of this attribute in CoreCLR too.
This doesn't actually enable the support because RyuJIT unconditionally disables HW intrinsics for prejit (both CoreRT and CPAOT are considered prejit). We might want to do something about this on the RyuJIT side to address that (for CPAOT, to be able to pregenerate best code possible ahead of time, assuming a fixed ISA; and for CoreRT without JIT, where the concerns about AVX-SSE penalty don't apply). See conversation in dotnet/coreclr#21603
Signed-off-by: dotnet-bot <dotnet-bot@microsoft.com>
Diffstat (limited to 'eng')
0 files changed, 0 insertions, 0 deletions