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| author | Jan Kotas <jkotas@microsoft.com> | 2016-11-28 18:00:57 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-11-28 18:00:57 -0800 |
| commit | 8de587f3b6d45be23f5178f510e260e470f2ef4f (patch) | |
| tree | adae768ae099137714a98815f3138197609d2753 /Documentation | |
| parent | f9c645f88a9646ab95eca62df8b0c932de3efa17 (diff) | |
| download | coreclr-8de587f3b6d45be23f5178f510e260e470f2ef4f.tar.gz coreclr-8de587f3b6d45be23f5178f510e260e470f2ef4f.tar.bz2 coreclr-8de587f3b6d45be23f5178f510e260e470f2ef4f.zip | |
Disable PSPSym and LocAllocSPvar for CoreRT (#8319)
The establisher frame definition differs between CoreRT ABI and CoreCLR ABI. In CoreRT ABI created by @russellhadley and @smosier while back, the establisher frame is always the SP value at the point that control left the frame in which execution would resume after a catch handler completes. This mismatch leads to crashes when PSPSym is recomputed in funclets of methods with localloc.
Fixed by disabling PSPSym for CoreRT since it does not need it. Also disabled LocAllocSPvar while I was on it since it is not needed for CoreRT either.
Fixes https://github.com/dotnet/corert/issues/2255
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/botr/clr-abi.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/botr/clr-abi.md b/Documentation/botr/clr-abi.md index cbd5fc903c..d8b573989c 100644 --- a/Documentation/botr/clr-abi.md +++ b/Documentation/botr/clr-abi.md @@ -6,6 +6,8 @@ It describes requirements that the Just-In-Time (JIT) compiler imposes on the VM A note on the JIT codebases: JIT32 refers to the original JIT codebase that originally generated x86 code and was later ported to generate ARM code. Later, it was ported and re-architected to generate AMD64 code (making its name something of a confusing misnomer). This work is referred to as RyuJIT. RyuJIT is being ported to generate ARM64 code. JIT64 refers to the legacy codebase that supports AMD64. +CoreRT refers to https://github.com/dotnet/corert runtime that is optimized for AOT. The CoreRT ABI differs in a few details for simplicity and consistency across platforms. + # Getting started Read everything in the documented Windows ABI. @@ -289,6 +291,8 @@ On ARM and ARM64, for all second pass funclets (finally, fault, catch, and filte Catch, Filter, and Filter-handlers also get an Exception object (GC ref) as an argument (`REG_EXCEPTION_OBJECT`). On AMD64 it is the second argument and thus passed in RDX. On ARM and ARM64 this is the first argument and passed in R0. +CoreRT does not use PSPSym. For filter funclets the VM sets the frame register to be the same as the parent function. For second pass funclets the VM restores all non-volatile registers. The same convention is used across all platforms. + (Note that the JIT64 source code contains a comment that says, "The current CLR doesn't always pass the correct establisher frame to the funclet. Funclet may receive establisher frame of funclet when expecting that of original routine." It indicates this is the reason that a PSPSym is required in all funclets as well as the main function, whereas if the establisher frame was correctly reported, the PSPSym could be omitted in some cases.) ## Funclet Return Values |