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authorSteve MacLean <sdmaclea.qdt@qualcommdatacenter.com>2017-09-12 11:44:47 -0400
committerSteve MacLean <sdmaclea.qdt@qualcommdatacenter.com>2017-09-12 11:44:47 -0400
commit15d90c6be7058f7488f16918a4f23c400109c7d8 (patch)
tree6c571eb93af1dacd7777a653eb91a9a0e07c53fa
parentdb976783397a1f815c9b3e4f3831d02abfa879ce (diff)
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noway_assert to assert per review
-rw-r--r--src/jit/codegenarm64.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/jit/codegenarm64.cpp b/src/jit/codegenarm64.cpp
index d7eca41cd4..a9f2fc2f30 100644
--- a/src/jit/codegenarm64.cpp
+++ b/src/jit/codegenarm64.cpp
@@ -1518,7 +1518,7 @@ void CodeGen::genCodeForMulHi(GenTreeOp* treeNode)
assert(!varTypeIsFloating(targetType));
// The arithmetic node must be sitting in a register (since it's not contained)
- noway_assert(targetReg != REG_NA);
+ assert(targetReg != REG_NA);
if (EA_SIZE(attr) == EA_8BYTE)
{
@@ -1526,7 +1526,7 @@ void CodeGen::genCodeForMulHi(GenTreeOp* treeNode)
regNumber r = emit->emitInsTernary(ins, attr, treeNode, op1, op2);
- noway_assert(r == targetReg);
+ assert(r == targetReg);
}
else
{
@@ -1559,10 +1559,10 @@ void CodeGen::genCodeForBinary(GenTree* treeNode)
instruction ins = genGetInsForOper(treeNode->OperGet(), targetType);
// The arithmetic node must be sitting in a register (since it's not contained)
- noway_assert(targetReg != REG_NA);
+ assert(targetReg != REG_NA);
regNumber r = emit->emitInsTernary(ins, emitTypeSize(treeNode), treeNode, op1, op2);
- noway_assert(r == targetReg);
+ assert(r == targetReg);
genProduceReg(treeNode);
}