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| author | Rama Krishnan Raghupathy <ramarag@microsoft.com> | 2016-07-25 23:30:07 -0700 |
|---|---|---|
| committer | Rama Krishnan Raghupathy <ramarag@microsoft.com> | 2016-07-25 23:30:07 -0700 |
| commit | faa87f0aaa1013de01631eb98edf928cf1900b2a (patch) | |
| tree | 918bd728de433e94d4138ad8ac6ffa1fd0457218 | |
| parent | f1b3fc7b704662903c753dc20681693a69266931 (diff) | |
| download | coreclr-faa87f0aaa1013de01631eb98edf928cf1900b2a.tar.gz coreclr-faa87f0aaa1013de01631eb98edf928cf1900b2a.tar.bz2 coreclr-faa87f0aaa1013de01631eb98edf928cf1900b2a.zip | |
Addressing arm64 build break due to old compiler
[tfs-changeset: 1619335]
| -rw-r--r-- | src/debug/ee/arm64/arm64walker.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/debug/ee/arm64/arm64walker.cpp b/src/debug/ee/arm64/arm64walker.cpp index 7d8089574a..96aff1708f 100644 --- a/src/debug/ee/arm64/arm64walker.cpp +++ b/src/debug/ee/arm64/arm64walker.cpp @@ -194,6 +194,7 @@ BYTE* NativeWalker::SetupOrSimulateInstructionForPatchSkip(T_CONTEXT * context, RegContents = (PCODE)GetMem(ip); if ((opcode & 0x4000000)) //LDR literal for SIMD { + NEON128 SimdRegContents; LOG((LF_CORDB, LL_INFO100000, "Arm64Walker::Simulate opcode: %x to LDR V%d %p\n", opcode, RegNum, offset)); short opc = (opcode >> 30); switch (opc) @@ -206,7 +207,7 @@ BYTE* NativeWalker::SetupOrSimulateInstructionForPatchSkip(T_CONTEXT * context, break; case 2: //SIMD 16 byte data - NEON128 SimdRegContents = GetSimdMem(ip); + SimdRegContents = GetSimdMem(ip); SetSimdReg(context, RegNum, SimdRegContents); break; default: |