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author | Jiyoung Yun <jy910.yun@samsung.com> | 2016-12-13 16:04:59 +0900 |
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committer | Jiyoung Yun <jy910.yun@samsung.com> | 2016-12-13 16:04:59 +0900 |
commit | 7d7200733e5046516f26f637945ea2dd7986a73c (patch) | |
tree | a4104ce6f48da177da999711cb25e275d82e4d41 | |
parent | 210d082132e43593121c312007c147a81716d9cb (diff) | |
download | coreclr-sandbox/giuliana/fix_llvm_path.tar.gz coreclr-sandbox/giuliana/fix_llvm_path.tar.bz2 coreclr-sandbox/giuliana/fix_llvm_path.zip |
Add ExclusiveArch optionsandbox/giuliana/fix_llvm_path
ExclusiveArch: %arm x86_64
Change-Id: I40b8f28b31332bc0ab7c8c5aaef6409a6e415a39
Signed-off-by: Jiyoung Yun <jy910.yun@samsung.com>
-rw-r--r-- | packaging/coreclr.spec | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/packaging/coreclr.spec b/packaging/coreclr.spec index e533402d96..944dc67293 100644 --- a/packaging/coreclr.spec +++ b/packaging/coreclr.spec @@ -1,19 +1,15 @@ %{!?dotnet_buildtype: %define dotnet_buildtype Release} -%ifarch armv7l +%ifarch x86_64 %define support_test 1 %define skipnative 0 %define skipmscorlib 0 -%else -%ifarch x86_64 +%endif + +%ifarch armv7l %define support_test 1 %define skipnative 0 %define skipmscorlib 0 -%else -%define support_test 0 -%define skipnative 1 -%define skipmscorlib 1 -%endif %endif Name: coreclr @@ -33,6 +29,8 @@ Patch0: Add-Tizen-distro.patch Patch1: Do-not-ignore-project.lock.json.patch Patch2: Support-managed-build-on-armv7l-env.patch +ExclusiveArch: %arm x86_64 + BuildRequires: python BuildRequires: python-xml # libcoreclr.so |