summaryrefslogtreecommitdiff
BranchCommit messageAuthorAge
accepted/tizen_5.5_unified_mobile_hotfixFix step with stackalloc (#27246) (#27351)Steve MacLean9 months
accepted/tizen_5.5_unified_wearable_hotfixfix dwarf-based unwinding to the end of stackYaroslav Yamshchikov10 months
accepted/tizen_6.0_unifiedFix memory leaked caused by Marshal.GetFunctionPointerForDelegate (#28074)Aaron Robinson6 months
accepted/tizen_unifiedAdd YieldProcessor implementation for armGleb Balykov4 weeks
tizenAdd YieldProcessor implementation for armGleb Balykov4 weeks
tizen_5.5fix dwarf-based unwinding to the end of stackYaroslav Yamshchikov10 months
tizen_5.5_mobile_hotfixFix step with stackalloc (#27246) (#27351)Steve MacLean9 months
tizen_5.5_tvFix TPA map hash calculation. (#288)Mikhail Kurinnoi/AI Compiler Lab /SRR/Staff Engineer/Samsung Electronics6 months
tizen_6.0Fix memory leaked caused by Marshal.GetFunctionPointerForDelegate (#28074)Aaron Robinson6 months
tizen_6.0_hotfixr0InUse should be true for SoftFP in CodeGen::genProfilingLeaveCallback in sr...이형주/Common Platform Lab(SR)/Staff Engineer/삼성전자8 months
[...]
 
TagDownloadAuthorAge
accepted/tizen/unified/20210629.130321coreclr-accepted/tizen/unified/20210629.130321.tar.gz  coreclr-accepted/tizen/unified/20210629.130321.tar.bz2  coreclr-accepted/tizen/unified/20210629.130321.zip  tizenrobot4 weeks
submit/tizen/20210629.000826coreclr-submit/tizen/20210629.000826.tar.gz  coreclr-submit/tizen/20210629.000826.tar.bz2  coreclr-submit/tizen/20210629.000826.zip  Woongsuk Cho4 weeks
accepted/tizen/unified/20210624.131704coreclr-accepted/tizen/unified/20210624.131704.tar.gz  coreclr-accepted/tizen/unified/20210624.131704.tar.bz2  coreclr-accepted/tizen/unified/20210624.131704.zip  tizenrobot4 weeks
submit/tizen/20210624.073434coreclr-submit/tizen/20210624.073434.tar.gz  coreclr-submit/tizen/20210624.073434.tar.bz2  coreclr-submit/tizen/20210624.073434.zip  Woongsuk Cho4 weeks
submit/tizen_5.0_base/20210129.022026coreclr-submit/tizen_5.0_base/20210129.022026.tar.gz  coreclr-submit/tizen_5.0_base/20210129.022026.tar.bz2  coreclr-submit/tizen_5.0_base/20210129.022026.zip  Woongsuk Cho6 months
accepted/tizen/unified/20210115.125752coreclr-accepted/tizen/unified/20210115.125752.tar.gz  coreclr-accepted/tizen/unified/20210115.125752.tar.bz2  coreclr-accepted/tizen/unified/20210115.125752.zip  tizenrobot6 months
accepted/tizen/6.0/unified/20210115.041837coreclr-accepted/tizen/6.0/unified/20210115.041837.tar.gz  coreclr-accepted/tizen/6.0/unified/20210115.041837.tar.bz2  coreclr-accepted/tizen/6.0/unified/20210115.041837.zip  tizenrobot6 months
submit/tizen/20210115.013305coreclr-submit/tizen/20210115.013305.tar.gz  coreclr-submit/tizen/20210115.013305.tar.bz2  coreclr-submit/tizen/20210115.013305.zip  Hyungju Lee6 months
submit/tizen_6.0/20210115.013248coreclr-submit/tizen_6.0/20210115.013248.tar.gz  coreclr-submit/tizen_6.0/20210115.013248.tar.bz2  coreclr-submit/tizen_6.0/20210115.013248.zip  Hyungju Lee6 months
accepted/tizen/6.0/unified/20201202.212218coreclr-accepted/tizen/6.0/unified/20201202.212218.tar.gz  coreclr-accepted/tizen/6.0/unified/20201202.212218.tar.bz2  coreclr-accepted/tizen/6.0/unified/20201202.212218.zip  tizenrobot8 months
[...]
 
AgeCommit messageAuthorFilesLines
2018-08-10FillRegDisplay: initialize volatileCurrContextPointers for ARM and ARM64submit/tizen_base/20180810.142915accepted/tizen/base/20180814.175049Konstantin Baladurin1-1/+12
2018-08-10Move assert so it doesn't fire for null addressesChris Sienkiewicz1-1/+1
2018-08-10Add missing semicolonChris Sienkiewicz1-1/+1
2018-08-10Restore deleted spaceChris Sienkiewicz1-0/+1
2018-08-10Ensure thumb bit is set when calling FindOrCreateInitAndAddJitInfo. Add an as...Chris Sienkiewicz2-2/+2
2018-08-10Use macro rather than manually setting thumb bit in debugger.cppChris Sienkiewicz1-4/+1
2018-08-10Ensure thumb bit is set when intializing a code region.Chris Sienkiewicz1-1/+1
2018-08-10[Tizen] Enable RELRO protectionjunghyuk.park1-2/+2
2018-08-10[Tizen] Fix call convension for profiler wrappers with clang 5 supportPetr Bred4-12/+12
2018-07-27[Tizen] Add crossgen and coreconsole to coreclr packagesubmit/tizen_base/20180802.004115submit/tizen_base/20180731.144318submit/tizen_base/20180727.111904submit/tizen_base/20180727.102430accepted/tizen/base/20180803.172528accepted/tizen/base/20180727.152042junghyuk.park1-2/+6
[...]
 
Clone
https://git.tizen.org/cgit/platform/upstream/coreclr
git://git.tizen.org/platform/upstream/coreclr