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authorDongHun Kwak <dh0128.kwak@samsung.com>2016-10-06 10:38:45 +0900
committerDongHun Kwak <dh0128.kwak@samsung.com>2016-10-06 10:39:52 +0900
commit5cde13f21d36c7224b0e13d11c4b49379ae5210d (patch)
treee8269ac85a4b0f7d416e2565fa4f451b5cb41351 /boost/atomic
parentd9ec475d945d3035377a0d89ed42e382d8988891 (diff)
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Imported Upstream version 1.61.0
Change-Id: I96a1f878d1e6164f01e9aadd5147f38fca448d90 Signed-off-by: DongHun Kwak <dh0128.kwak@samsung.com>
Diffstat (limited to 'boost/atomic')
-rw-r--r--boost/atomic/detail/ops_emulated.hpp2
-rw-r--r--boost/atomic/detail/ops_gcc_x86_dcas.hpp2
2 files changed, 2 insertions, 2 deletions
diff --git a/boost/atomic/detail/ops_emulated.hpp b/boost/atomic/detail/ops_emulated.hpp
index 0dc4e6828a..17032917fe 100644
--- a/boost/atomic/detail/ops_emulated.hpp
+++ b/boost/atomic/detail/ops_emulated.hpp
@@ -89,7 +89,7 @@ struct emulated_operations
}
static BOOST_FORCEINLINE bool compare_exchange_weak(
- storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
+ storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order, memory_order) BOOST_NOEXCEPT
{
// Note: This function is the exact copy of compare_exchange_strong. The reason we're not just forwarding the call
// is that MSVC-12 ICEs in this case.
diff --git a/boost/atomic/detail/ops_gcc_x86_dcas.hpp b/boost/atomic/detail/ops_gcc_x86_dcas.hpp
index f7a84f79ce..47cc36d8e7 100644
--- a/boost/atomic/detail/ops_gcc_x86_dcas.hpp
+++ b/boost/atomic/detail/ops_gcc_x86_dcas.hpp
@@ -522,7 +522,7 @@ struct gcc_dcas_x86_64
return compare_exchange_strong(storage, expected, desired, success_order, failure_order);
}
- static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+ static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
{
#if defined(__clang__)
// Clang cannot allocate eax:edx register pairs but it has sync intrinsics