index
:
platform/upstream/binutils
accepted/tizen/generic
accepted/tizen/ivi/genivi
accepted/tizen/ivi/release
accepted/tizen/ivi/stable
accepted/tizen/mobile
accepted/tizen_3.0.2014.q3_common
accepted/tizen_3.0.2014.q4_common
accepted/tizen_3.0.2015.q2_common
accepted/tizen_3.0.m14.3_ivi
accepted/tizen_3.0_ivi
accepted/tizen_4.0_base
accepted/tizen_5.0_base
accepted/tizen_5.5_base
accepted/tizen_5.5_base_mobile_hotfix
accepted/tizen_5.5_base_wearable_hotfix
accepted/tizen_6.0_base
accepted/tizen_6.0_base_tool
accepted/tizen_6.0_base_tool_hotfix
accepted/tizen_6.5_base
accepted/tizen_6.5_base_tool
accepted/tizen_7.0_base
accepted/tizen_7.0_base_hotfix
accepted/tizen_7.0_base_tool
accepted/tizen_7.0_base_tool_hotfix
accepted/tizen_8.0_base
accepted/tizen_base
accepted/tizen_base_riscv
accepted/tizen_base_tool
accepted/tizen_base_tool_dev
accepted/tizen_base_toolchain
accepted/tizen_base_x
accepted/tizen_base_x_asan
accepted/tizen_common
accepted/tizen_generic
accepted/tizen_ivi
accepted/tizen_mobile
accepted/tizen_tv
accepted/tizen_wearable
devel
develop
gold
pristine-tar
sandbox/akazmin/annobin_tizen_version
sandbox/akazmin/tizen6_watermarking
sandbox/cometzero/tizen
sandbox/denis13/LTO
sandbox/denis13/LTObu2.27
sandbox/denis13/ubsan
sandbox/dkson95/2.27
sandbox/dkson95/2.40
sandbox/dkson95/2.42
sandbox/dkson95/2.43
sandbox/dkson95/5.5_test
sandbox/dkson95/binutils-libs
sandbox/dkson95/gas
sandbox/dkson95/hardfp
sandbox/dkson95/libbacktrace
sandbox/dkson95/lto
sandbox/dkson95/relro
sandbox/dkson95/rpath
sandbox/empy/vsystt
sandbox/ipalachev/tizen
sandbox/jaehun77/hardfp
sandbox/jaehun77/linaro_binutils-2_25-2015_01-2
sandbox/kama0924/linaro_binutils-2_25-2015_01-2
sandbox/lstelmach/binutils-2.33-to-2.38-tizen
sandbox/lstelmach/binutils-2.33-to-2.38-tizenb
sandbox/lstelmach/binutils-2_39
sandbox/mkashkarov/annobin
sandbox/mkashkarov/armv7hl
sandbox/mkashkarov/armv7hl_support
sandbox/mkashkarov/gnu_properties
sandbox/mkashkarov/testresults
sandbox/nbozhenov/lto
sandbox/playchang/binutils-2_39
sandbox/sangminseo/asan-build
sandbox/vbarinov/2.25
sandbox/vbarinov/binutils-libs
sandbox/vbarinov/failtest
sandbox/vbarinov/nolibs
sandbox/vbarinov/tizen
sandbox/vbarinov/x86_64-cross-i586
test_2.24.90
tizen
tizen_3.0.2014.q3_common
tizen_3.0.2014.q4_common
tizen_3.0.2015.q1_common
tizen_3.0.2015.q2_common
tizen_3.0.m14.2_ivi
tizen_3.0.m14.3_ivi
tizen_3.0.m1_mobile
tizen_3.0.m1_tv
tizen_3.0_ivi
tizen_4.0_base
tizen_4.0_tv
tizen_5.0_base
tizen_5.5_base
tizen_5.5_base_mobile_hotfix
tizen_5.5_base_wearable_hotfix
tizen_5.5_tv
tizen_6.0_base
tizen_6.0_base_hotfix
tizen_6.5_base
tizen_7.0_base
tizen_7.0_base_hotfix
tizen_8.0_base
tizen_base
tizen_base_2.27
tizen_base_2.40
tizen_base_2.42
tizen_base_dev
tizen_base_old
tizen_ivi_genivi
tizen_ivi_release
toolchain_upgrade
upstream
upstream-2.25
upstream-2.27
upstream-2.33.1
upstream-2.40
Domain: System / Toolchain;
Dongkyun Son <dongkyun.s@samsung.com>
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
sim
/
bfin
Age
Commit message (
Expand
)
Author
Files
Lines
2011-07-01
sim: bfin: implement stat_map for virtual environments (libgloss)
Mike Frysinger
2
-4
/
+30
2011-06-22
sim: bfin: pass up result2/errcode with libgloss syscalls
Mike Frysinger
2
-2
/
+7
2011-06-18
sim: bfin: set ASTAT AV/AVS when shifting accumulators overflow
Mike Frysinger
2
-0
/
+12
2011-06-18
sim: bfin: do not touch ASTAT[V] when shifting accumulators
Mike Frysinger
2
-3
/
+9
2011-06-18
sim: bfin: do not extend accumulator in LSHIFT insns
Mike Frysinger
2
-1
/
+6
2011-06-18
sim: bfin: tweak saturation handling with TFU/FU modes and MM bit
Mike Frysinger
2
-14
/
+35
2011-06-18
sim: bfin: handle large shift values with accumulator shift insns
Mike Frysinger
2
-2
/
+14
2011-06-18
sim: bfin: handle odd shift values with shift insns
Mike Frysinger
2
-7
/
+36
2011-06-18
sim: bfin: fix M_IH saturation size
Mike Frysinger
2
-17
/
+6
2011-06-18
sim: bfin: handle V/VS saturation in dsp mac insns
Mike Frysinger
2
-25
/
+58
2011-06-18
sim: bfin: handle the MM flag in M_IU/M_TFU modes with dsp insns
Mike Frysinger
2
-0
/
+10
2011-06-18
sim: bfin: fix sign extension in dsp insns with MM flag
Mike Frysinger
2
-8
/
+10
2011-06-18
sim: bfin: fix dsp insns IH saturation/rounding behavior
Mike Frysinger
2
-1
/
+16
2011-06-18
sim: bfin: fix inverted changelog entry
Mike Frysinger
1
-1
/
+1
2011-06-18
sim: bfin: fix accumulator edge case saturation
Mike Frysinger
2
-2
/
+7
2011-06-18
sim: bfin: use freeargv for freeing argvs
Mike Frysinger
2
-1
/
+5
2011-06-04
sim: bfin: add support for glued SIC interrupt lines
Mike Frysinger
2
-25
/
+71
2011-06-04
sim: bfin: push SIC mappings to device tree
Mike Frysinger
3
-589
/
+723
2011-06-03
sim: bfin: dma: fix indentation
Mike Frysinger
2
-1
/
+5
2011-05-26
sim: bfin: switch to new syscall trace level
Mike Frysinger
2
-1
/
+5
2011-05-25
sim: bfin: move model data into machs.h
Mike Frysinger
31
-109
/
+80
2011-05-25
sim: bfin: add a performance monitor stub
Mike Frysinger
7
-0
/
+196
2011-05-25
sim: bfin: add bf526-0.2/bf54x-0.4 rom regions
Mike Frysinger
6
-0
/
+27
2011-05-14
sim: bfin: allow pushing of SP
Mike Frysinger
2
-2
/
+6
2011-05-14
sim: bfin: implement loop back support in the UARTs
Mike Frysinger
4
-23
/
+62
2011-05-09
sim: bfin: fix UART LSR read-only bit saturation
Mike Frysinger
2
-0
/
+6
2011-04-27
sim: bfin: constify dmac pmap arrays
Mike Frysinger
2
-13
/
+22
2011-04-26
sim: gpio: add output support
Mike Frysinger
2
-16
/
+53
2011-04-26
sim: gpio: update mask a/b signals better
Mike Frysinger
2
-12
/
+49
2011-04-16
sim: bfin: use store buffer with more 32bit insns
Mike Frysinger
2
-23
/
+37
2011-04-15
sim: bfin: handle implicit DISALGNEXCPT with video insns
Mike Frysinger
2
-0
/
+30
2011-04-11
sim: bfin: respect the port level on signals to the SIC
Mike Frysinger
2
-16
/
+32
2011-04-11
sim: bfin: add missing GPIO pin 15
Mike Frysinger
2
-0
/
+5
2011-04-01
sim: bfin: add OTP output port
Mike Frysinger
2
-0
/
+12
2011-03-29
sim: bfin: regen configure to include new cfi device
Mike Frysinger
2
-1
/
+5
2011-03-29
sim: bfin: fix sign extension with 16bit acc add insns
Mike Frysinger
2
-9
/
+9
2011-03-27
sim: bfin: handle saturation with RND12 sub insns
Mike Frysinger
2
-1
/
+11
2011-03-26
sim: bfin: add missing VS set with add/sub insns
Mike Frysinger
2
-0
/
+7
2011-03-25
sim: bfin: add hw tracing to gpio/sic port events
Mike Frysinger
3
-10
/
+64
2011-03-25
sim: bfin: fix GPIO logic bugs when processing events
Mike Frysinger
2
-4
/
+16
2011-03-25
sim: bfin: fix clear/set/toggle GPIO handling
Mike Frysinger
2
-0
/
+11
2011-03-24
sim: bfin: document SIC limitation
Mike Frysinger
2
-1
/
+27
2011-03-24
sim: bfin: fix inverted W1C logic
Mike Frysinger
14
-17
/
+34
2011-03-24
sim: bfin: define more UART LSR bits
Mike Frysinger
2
-7
/
+16
2011-03-24
sim: bfin: fix typo in TWI stat reg
Mike Frysinger
2
-1
/
+5
2011-03-24
sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are set
Mike Frysinger
2
-2
/
+7
2011-03-24
sim: bfin: always do 16bit sign extension with the SEARCH insn
Mike Frysinger
2
-0
/
+10
2011-03-24
sim: bfin: update AV and AC ASTAT bits with acc negation
Mike Frysinger
2
-6
/
+14
2011-03-24
sim: bfin: fix thinko in SIC pin encoding
Mike Frysinger
2
-511
/
+516
2011-03-24
sim: bfin: allow byteop[123]p src regs to be the same
Mike Frysinger
2
-9
/
+5
[prev]
[next]