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-rw-r--r--sim/bfin/bfin-sim.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index c78fe1a5a51..85e281a9d1d 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -5041,11 +5041,16 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
SET_AREG (1, src_hi);
SET_DREG (dst1, PREG (0));
}
+ else
+ SET_AREG (1, a1_lo);
+
if (up_lo)
{
SET_AREG (0, src_lo);
SET_DREG (dst0, PREG (0));
}
+ else
+ SET_AREG (0, a0_lo);
}
else
illegal_instruction (cpu);