diff options
-rw-r--r-- | opcodes/.Sanitize | 39 | ||||
-rw-r--r-- | opcodes/ChangeLog | 8 | ||||
-rw-r--r-- | opcodes/Makefile.am | 38 | ||||
-rw-r--r-- | opcodes/Makefile.in | 38 | ||||
-rw-r--r-- | opcodes/aclocal.m4 | 77 | ||||
-rw-r--r-- | opcodes/cgen-asm.in | 394 | ||||
-rw-r--r-- | opcodes/cgen-dis.in | 340 | ||||
-rw-r--r-- | opcodes/cgen.sh | 40 | ||||
-rwxr-xr-x | opcodes/configure | 108 | ||||
-rw-r--r-- | opcodes/configure.in | 16 |
10 files changed, 1059 insertions, 39 deletions
diff --git a/opcodes/.Sanitize b/opcodes/.Sanitize index 39ebf43adae..ab5a94d8efc 100644 --- a/opcodes/.Sanitize +++ b/opcodes/.Sanitize @@ -15,6 +15,14 @@ Do-first: +cygnus_files="cgen.sh cgen-asm.in cgen-dis.in" + +if ( echo $* | grep keep\-cygnus > /dev/null ) ; then + keep_these_too="${cygnus_files} ${keep_these_too}" +else + lose_these_too="${cygnus_files} ${lose_these_too}" +fi + d30v_files="d30v-dis.c d30v-opc.c" if ( echo $* | grep keep\-d30v > /dev/null ) ; then @@ -60,8 +68,11 @@ arc-opc.c arm-dis.c arm-opc.h a29k-dis.c +cgen.sh cgen-asm.c +cgen-asm.in cgen-dis.c +cgen-dis.in cgen-opc.c config.in configure @@ -116,6 +127,34 @@ Things-to-lose: Do-last: +cygnus_files="ChangeLog Makefile.am Makefile.in configure.in configure" +if ( echo $* | grep keep\-cygnus > /dev/null ) ; then + for i in $cygnus_files ; do + if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then + if [ -n "${verbose}" ] ; then + echo Keeping cygnus stuff in $i + fi + fi + done +else + for i in $cygnus_files ; do + if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then + if [ -n "${verbose}" ] ; then + echo Removing traces of \"cygnus\" from $i... + fi + cp $i new + sed '/start\-sanitize\-cygnus/,/end-\sanitize\-cygnus/d' < $i > new + if [ -n "${safe}" -a ! -f .Recover/$i ] ; then + if [ -n "${verbose}" ] ; then + echo Caching $i in .Recover... + fi + mv $i .Recover + fi + mv new $i + fi + done +fi + d30v_files="ChangeLog Makefile.in Makefile.am configure.in configure disassemble.c" if ( echo $* | grep keep\-d30v > /dev/null ) ; then for i in $d30v_files ; do diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 228abb47f99..c188988cc5c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -8,6 +8,14 @@ Mon Jan 12 14:43:54 1998 Doug Evans <devans@seba.cygnus.com> * cgen-opc.c: Clean up pass over `struct foo' usage. (cgen_keyword_lookup_value): Handle "" entry. (cgen_keyword_add): Likewise. +start-sanitize-cygnus + * Makefile.am: Add cgen support. + * Makefile.in: Regenerate. + * configure.in: Add cgen support. + * configure: Regenerate. + * aclocal.m4: Regenerate. + * cgen.sh, cgen-asm.in, cgen-dis.in: New files. +end-sanitize-cygnus start-sanitize-sky Tue Jan 6 13:08:14 1998 Doug Evans <devans@seba.cygnus.com> diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 28ba82b284e..a4ae72f7392 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -138,6 +138,44 @@ stamp-lib: libopcodes.la libopcodes.a: stamp-lib ; @true CLEANFILES = libopcodes.a stamp-lib dep.sed .dep .dep1 +# start-sanitize-cygnus +CLEANFILES = libopcodes.a stamp-lib dep.sed .dep .dep1 stamp-m32r +# end-sanitize-cygnus + +# start-sanitize-cygnus +# CGEN support is sanitized out of FSF releases for now. +# Sanitization must be split between assignments and rules because +# automake splits them that way. + +SCHEME = @SCHEME@ +SCHEMEFLAGS = -s +CGENDIR = $(srcdir)/../cgen +CGENFLAGS = -v + +CGENFILES = $(CGENDIR)/object.scm $(CGENDIR)/utils.scm \ + $(CGENDIR)/utils-cgen.scm $(CGENDIR)/cpu.scm \ + $(CGENDIR)/mode.scm $(CGENDIR)/mach.scm \ + $(CGENDIR)/ifield.scm $(CGENDIR)/iformat.scm \ + $(CGENDIR)/operand.scm $(CGENDIR)/insn.scm \ + $(CGENDIR)/opcodes.scm $(CGENDIR)/cgen-opc.scm \ + cgen-asm.in cgen-dis.in +# The end marker is written this way to pass through automake unscathed. +ENDSAN = end-sanitize-cygnus + +# start-sanitize-cygnus +cgen: + $(SHELL) $(srcdir)/cgen.sh $(srcdir) $(CGENDIR) $(CGENFLAGS) $(SCHEME) $(SCHEMEFLAGS) $(arch) + touch stamp-${arch} + +.PHONY: cgen + +# For now, require developers to configure with --enable-maintainer-mode. +# ??? Do we need to use a different option? +m32r-opc.h m32r-opc.c m32r-asm.c m32r-dis.c: @MAINT@ stamp-m32r + @true +stamp-m32r: $(CGENFILES) $(CGENDIR)/m32r.cpu $(CGENDIR)/m32r.opc + $(MAKE) cgen arch=m32r prefix=m32r +# end-sanitize-cygnus # start-sanitize-tic80 tic80-dis.lo: tic80-dis.c $(INCDIR)/dis-asm.h ../bfd/bfd.h \ diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index efe5b51a629..537d0b8cd2a 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -198,6 +198,29 @@ libopcodes_la_LIBADD = $(OFILES) noinst_LIBRARIES = libopcodes.a CLEANFILES = libopcodes.a stamp-lib dep.sed .dep .dep1 +# start-sanitize-cygnus +CLEANFILES = libopcodes.a stamp-lib dep.sed .dep .dep1 stamp-m32r +# end-sanitize-cygnus + +# start-sanitize-cygnus +# CGEN support is sanitized out of FSF releases for now. +# Sanitization must be split between assignments and rules because +# automake splits them that way. + +SCHEME = @SCHEME@ +SCHEMEFLAGS = -s +CGENDIR = $(srcdir)/../cgen +CGENFLAGS = -v + +CGENFILES = $(CGENDIR)/object.scm $(CGENDIR)/utils.scm \ + $(CGENDIR)/utils-cgen.scm $(CGENDIR)/cpu.scm \ + $(CGENDIR)/mode.scm $(CGENDIR)/mach.scm \ + $(CGENDIR)/ifield.scm $(CGENDIR)/iformat.scm \ + $(CGENDIR)/operand.scm $(CGENDIR)/insn.scm \ + $(CGENDIR)/opcodes.scm $(CGENDIR)/cgen-opc.scm \ + cgen-asm.in cgen-dis.in +# The end marker is written this way to pass through automake unscathed. +ENDSAN = end-sanitize-cygnus ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs CONFIG_HEADER = config.h @@ -495,6 +518,21 @@ stamp-lib: libopcodes.la libopcodes.a: stamp-lib ; @true +# start-sanitize-cygnus +cgen: + $(SHELL) $(srcdir)/cgen.sh $(srcdir) $(CGENDIR) $(CGENFLAGS) $(SCHEME) $(SCHEMEFLAGS) $(arch) + touch stamp-${arch} + +.PHONY: cgen + +# For now, require developers to configure with --enable-maintainer-mode. +# ??? Do we need to use a different option? +m32r-opc.h m32r-opc.c m32r-asm.c m32r-dis.c: @MAINT@ stamp-m32r + @true +stamp-m32r: $(CGENFILES) $(CGENDIR)/m32r.cpu $(CGENDIR)/m32r.opc + $(MAKE) cgen arch=m32r prefix=m32r +# end-sanitize-cygnus + # start-sanitize-tic80 tic80-dis.lo: tic80-dis.c $(INCDIR)/dis-asm.h ../bfd/bfd.h \ $(INCDIR)/opcode/tic80.h diff --git a/opcodes/aclocal.m4 b/opcodes/aclocal.m4 index 6ca14a1b3a5..9385da51bd7 100644 --- a/opcodes/aclocal.m4 +++ b/opcodes/aclocal.m4 @@ -102,18 +102,17 @@ AC_REQUIRE([AM_PROG_LD]) AC_REQUIRE([AC_PROG_LN_S]) # Always use our own libtool. -LIBTOOL='$(top_builddir)/libtool' +LIBTOOL='$(SHELL) $(top_builddir)/libtool' AC_SUBST(LIBTOOL) dnl Allow the --disable-shared flag to stop us from building shared libs. AC_ARG_ENABLE(shared, [ --enable-shared build shared libraries [default=yes]], -[case "$enableval" in - yes) enable_shared=yes ;; - no) enable_shared=no ;; - *opcodes*) enable_shared=yes ;; - *) shared=no ;; -esac]) +[if test "$enableval" = no; then + enable_shared=no +else + enable_shared=yes +fi]) libtool_shared= test "$enable_shared" = no && libtool_shared=" --disable-shared" @@ -320,3 +319,67 @@ rm -f conftest*]) MINGW32= test "$am_cv_mingw32" = yes && MINGW32=yes]) + +# serial 1 + +# @defmac AC_PROG_CC_STDC +# @maindex PROG_CC_STDC +# @ovindex CC +# If the C compiler in not in ANSI C mode by default, try to add an option +# to output variable @code{CC} to make it so. This macro tries various +# options that select ANSI C on some system or another. It considers the +# compiler to be in ANSI C mode if it defines @code{__STDC__} to 1 and +# handles function prototypes correctly. +# +# If you use this macro, you should check after calling it whether the C +# compiler has been set to accept ANSI C; if not, the shell variable +# @code{am_cv_prog_cc_stdc} is set to @samp{no}. If you wrote your source +# code in ANSI C, you can make an un-ANSIfied copy of it by using the +# program @code{ansi2knr}, which comes with Ghostscript. +# @end defmac + +AC_DEFUN(AM_PROG_CC_STDC, +[AC_REQUIRE([AC_PROG_CC]) +AC_BEFORE([$0], [AC_C_INLINE]) +AC_BEFORE([$0], [AC_C_CONST]) +AC_MSG_CHECKING(for ${CC-cc} option to accept ANSI C) +AC_CACHE_VAL(am_cv_prog_cc_stdc, +[am_cv_prog_cc_stdc=no +ac_save_CC="$CC" +# Don't try gcc -ansi; that turns off useful extensions and +# breaks some systems' header files. +# AIX -qlanglvl=ansi +# Ultrix and OSF/1 -std1 +# HP-UX -Aa -D_HPUX_SOURCE +# SVR4 -Xc -D__EXTENSIONS__ +for ac_arg in "" -qlanglvl=ansi -std1 "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + AC_TRY_COMPILE( +[#if !defined(__STDC__) || __STDC__ != 1 +choke me +#endif +/* DYNIX/ptx V4.1.3 can't compile sys/stat.h with -Xc -D__EXTENSIONS__. */ +#ifdef _SEQUENT_ +# include <sys/types.h> +# include <sys/stat.h> +#endif +], [ +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);};], +[am_cv_prog_cc_stdc="$ac_arg"; break]) +done +CC="$ac_save_CC" +]) +if test -z "$am_cv_prog_cc_stdc"; then + AC_MSG_RESULT([none needed]) +else + AC_MSG_RESULT($am_cv_prog_cc_stdc) +fi +case "x$am_cv_prog_cc_stdc" in + x|xno) ;; + *) CC="$CC $am_cv_prog_cc_stdc" ;; +esac +]) + diff --git a/opcodes/cgen-asm.in b/opcodes/cgen-asm.in new file mode 100644 index 00000000000..8a5099b4ed7 --- /dev/null +++ b/opcodes/cgen-asm.in @@ -0,0 +1,394 @@ +/* Assembler interface for targets using CGEN. -*- C -*- + CGEN: Cpu tools GENerator + +This file is used to generate @arch@-asm.c. + +Copyright (C) 1996, 1997 Free Software Foundation, Inc. + +This file is part of the GNU Binutils and GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "sysdep.h" +#include <ctype.h> +#include <stdio.h> +#include "ansidecl.h" +#include "bfd.h" +#include "@arch@-opc.h" + +/* ??? The layout of this stuff is still work in progress. + For speed in assembly/disassembly, we use inline functions. That of course + will only work for GCC. When this stuff is finished, we can decide whether + to keep the inline functions (and only get the performance increase when + compiled with GCC), or switch to macros, or use something else. +*/ + +static const char *parse_insn_normal + PARAMS ((const CGEN_INSN *, const char **, CGEN_FIELDS *)); +static void insert_insn_normal + PARAMS ((const CGEN_INSN *, CGEN_FIELDS *, cgen_insn_t *)); + +/* Default insertion routine. + + SHIFT is negative for left shifts, positive for right shifts. + All bits of VALUE to be inserted must be valid as we don't handle + signed vs unsigned shifts. + + ATTRS is a mask of the boolean attributes. We don't need any at the + moment, but for consistency with extract_normal we have them. */ + +/* FIXME: This duplicates functionality with bfd's howto table and + bfd_install_relocation. */ +/* FIXME: For architectures where insns can be representable as ints, + store insn in `field' struct and add registers, etc. while parsing. */ + +static CGEN_INLINE void +insert_normal (value, attrs, start, length, shift, total_length, buffer) + long value; + unsigned int attrs; + int start, length, shift, total_length; + char *buffer; +{ + bfd_vma x; + +#if 0 /*def CGEN_INT_INSN*/ + *buffer |= ((value & ((1 << length) - 1)) + << (total_length - (start + length))); +#else + switch (total_length) + { + case 8: + x = *(unsigned char *) buffer; + break; + case 16: + if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) + x = bfd_getb16 (buffer); + else + x = bfd_getl16 (buffer); + break; + case 32: + if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) + x = bfd_getb32 (buffer); + else + x = bfd_getl32 (buffer); + break; + default : + abort (); + } + + if (shift < 0) + value <<= -shift; + else + value >>= shift; + + x |= ((value & ((1 << length) - 1)) + << (total_length - (start + length))); + + switch (total_length) + { + case 8: + *buffer = value; + break; + case 16: + if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) + bfd_putb16 (x, buffer); + else + bfd_putl16 (x, buffer); + break; + case 32: + if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) + bfd_putb32 (x, buffer); + else + bfd_putl32 (x, buffer); + break; + default : + abort (); + } +#endif +} + +/* -- assembler routines inserted here */ + +/* Default insn parser. + + The syntax string is scanned and operands are parsed and stored in FIELDS. + Relocs are queued as we go via other callbacks. + + ??? Note that this is currently an all-or-nothing parser. If we fail to + parse the instruction, we return 0 and the caller will start over from + the beginning. Backtracking will be necessary in parsing subexpressions, + but that can be handled there. Not handling backtracking here may get + expensive in the case of the m68k. Deal with later. + + Returns NULL for success, an error message for failure. +*/ + +static const char * +parse_insn_normal (insn, strp, fields) + const CGEN_INSN *insn; + const char **strp; + CGEN_FIELDS *fields; +{ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + const char *str = *strp; + const char *errmsg; + const char *p; + const unsigned char *syn; +#ifdef CGEN_MNEMONIC_OPERANDS + int past_opcode_p; +#endif + + /* For now we assume the mnemonic is first (there are no leading operands). + We can parse it without needing to set up operand parsing. */ + p = CGEN_INSN_MNEMONIC (insn); + while (*p && *p == *str) + ++p, ++str; + if (*p || (*str && !isspace (*str))) + return "unrecognized instruction"; + + CGEN_INIT_PARSE (); + cgen_init_parse_operand (); +#ifdef CGEN_MNEMONIC_OPERANDS + past_opcode_p = 0; +#endif + + /* We don't check for (*str != '\0') here because we want to parse + any trailing fake arguments in the syntax string. */ + syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn)); + /* Mnemonics come first for now, ensure valid string. */ + if (! CGEN_SYNTAX_MNEMONIC_P (*syn)) + abort (); + ++syn; + while (*syn != 0) + { + /* Non operand chars must match exactly. */ + /* FIXME: Need to better handle whitespace. */ + if (CGEN_SYNTAX_CHAR_P (*syn)) + { + if (*str == CGEN_SYNTAX_CHAR (*syn)) + { +#ifdef CGEN_MNEMONIC_OPERANDS + if (*syn == ' ') + past_opcode_p = 1; +#endif + ++syn; + ++str; + } + else + { + /* Syntax char didn't match. Can't be this insn. */ + /* FIXME: would like to return "expected char `c'" */ + return "syntax error"; + } + continue; + } + + /* We have an operand of some sort. */ + errmsg = @arch@_cgen_parse_operand (CGEN_SYNTAX_FIELD (*syn), + &str, fields); + if (errmsg) + return errmsg; + + /* Done with this operand, continue with next one. */ + ++syn; + } + + /* If we're at the end of the syntax string, we're done. */ + if (*syn == '\0') + { + /* FIXME: For the moment we assume a valid `str' can only contain + blanks now. IE: We needn't try again with a longer version of + the insn and it is assumed that longer versions of insns appear + before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ + while (isspace (*str)) + ++str; + + if (*str != '\0') + return "junk at end of line"; /* FIXME: would like to include `str' */ + + return NULL; + } + + /* We couldn't parse it. */ + return "unrecognized instruction"; +} + +/* Default insn builder (insert handler). + The instruction is recorded in target byte order. */ + +static void +insert_insn_normal (insn, fields, buffer) + const CGEN_INSN *insn; + CGEN_FIELDS *fields; + cgen_insn_t *buffer; +{ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + bfd_vma value; + const unsigned char *syn; + + CGEN_INIT_INSERT (); + value = CGEN_INSN_VALUE (insn); + + /* If we're recording insns as numbers (rather than a string of bytes), + target byte order handling is deferred until later. */ +#undef min +#define min(a,b) ((a) < (b) ? (a) : (b)) +#if 0 /*def CGEN_INT_INSN*/ + *buffer = value; +#else + switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields))) + { + case 8: + *buffer = value; + break; + case 16: + if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) + bfd_putb16 (value, (char *) buffer); + else + bfd_putl16 (value, (char *) buffer); + break; + case 32: + if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) + bfd_putb32 (value, (char *) buffer); + else + bfd_putl32 (value, (char *) buffer); + break; + default: + abort (); + } +#endif + + /* ??? Rather than scanning the syntax string again, we could store + in `fields' a null terminated list of the fields that are present. */ + + for (syn = CGEN_SYNTAX_STRING (syntax); *syn != '\0'; ++syn) + { + if (CGEN_SYNTAX_CHAR_P (*syn)) + continue; + + @arch@_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields, buffer); + } +} + +/* Main entry point. + This routine is called for each instruction to be assembled. + STR points to the insn to be assembled. + We assume all necessary tables have been initialized. + The result is a pointer to the insn's entry in the opcode table, + or NULL if an error occured (an error message will have already been + printed). */ + +const CGEN_INSN * +@arch@_cgen_assemble_insn (str, fields, buf, errmsg) + const char *str; + CGEN_FIELDS *fields; + cgen_insn_t *buf; + char **errmsg; +{ + const char *start; + CGEN_INSN_LIST *ilist; + + /* Skip leading white space. */ + while (isspace (*str)) + ++str; + + /* The instructions are stored in hashed lists. + Get the first in the list. */ + ilist = CGEN_ASM_LOOKUP_INSN (str); + + /* Keep looking until we find a match. */ + + start = str; + for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) + { + const CGEN_INSN *insn = ilist->insn; + +#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */ + /* Is this insn supported by the selected cpu? */ + if (! @arch@_cgen_insn_supported (insn)) + continue; +#endif + +#if 1 /* FIXME: wip */ + /* If the RELAX attribute is set, this is an insn that shouldn't be + chosen immediately. Instead, it is used during assembler/linker + relaxation if possible. */ + if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0) + continue; +#endif + + str = start; + + /* Record a default length for the insn. This will get set to the + correct value while parsing. */ + /* FIXME: wip */ + CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); + + /* ??? The extent to which moving the parse and insert handlers into + this function (thus removing the function call) will speed things up + is unclear. The simplicity and flexibility of the current scheme is + appropriate for now. One could have the best of both worlds with + inline functions but of course that would only work for gcc. Since + we're machine generating some code we could do that here too. Maybe + later. */ + if (! (*CGEN_PARSE_FN (insn)) (insn, &str, fields)) + { + (*CGEN_INSERT_FN (insn)) (insn, fields, buf); + /* It is up to the caller to actually output the insn and any + queued relocs. */ + return insn; + } + + /* Try the next entry. */ + } + + /* FIXME: We can return a better error message than this. + Need to track why it failed and pick the right one. */ + { + static char errbuf[100]; + sprintf (errbuf, "bad instruction `%.50s%s'", + start, strlen (start) > 50 ? "..." : ""); + *errmsg = errbuf; + return NULL; + } +} + +#if 0 /* This calls back to GAS which we can't do without care. */ + +/* Record each member of OPVALS in the assembler's symbol table. + This lets GAS parse registers for us. + ??? Interesting idea but not currently used. */ + +/* Record each member of OPVALS in the assembler's symbol table. + FIXME: Not currently used. */ + +void +@arch@_cgen_asm_hash_keywords (opvals) + CGEN_KEYWORD *opvals; +{ + CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); + const CGEN_KEYWORD_ENTRY *ke; + + while ((ke = cgen_keyword_search_next (&search)) != NULL) + { +#if 0 /* Unnecessary, should be done in the search routine. */ + if (! @arch@_cgen_opval_supported (ke)) + continue; +#endif + cgen_asm_record_register (ke->name, ke->value); + } +} + +#endif /* 0 */ diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in new file mode 100644 index 00000000000..af3dfc63e75 --- /dev/null +++ b/opcodes/cgen-dis.in @@ -0,0 +1,340 @@ +/* Disassembler interface for targets using CGEN. -*- C -*- + CGEN: Cpu tools GENerator + +This file is used to generate @arch@-dis.c. + +Copyright (C) 1996, 1997 Free Software Foundation, Inc. + +This file is part of the GNU Binutils and GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "sysdep.h" +#include <stdio.h> +#include "ansidecl.h" +#include "dis-asm.h" +#include "bfd.h" +#include "@arch@-opc.h" + +/* ??? The layout of this stuff is still work in progress. + For speed in assembly/disassembly, we use inline functions. That of course + will only work for GCC. When this stuff is finished, we can decide whether + to keep the inline functions (and only get the performance increase when + compiled with GCC), or switch to macros, or use something else. +*/ + +/* Default text to print if an instruction isn't recognized. */ +#define UNKNOWN_INSN_MSG "*unknown*" + +/* FIXME: Machine generate. */ +#ifndef CGEN_PCREL_OFFSET +#define CGEN_PCREL_OFFSET 0 +#endif + +static int print_insn PARAMS ((bfd_vma, disassemble_info *, char *, int)); + +static int extract_insn_normal + PARAMS ((const CGEN_INSN *, void *, cgen_insn_t, CGEN_FIELDS *)); +static void print_insn_normal + PARAMS ((void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int)); + +/* Default extraction routine. + + ATTRS is a mask of the boolean attributes. We only need `unsigned', + but for generality we take a bitmask of all of them. */ + +static int +extract_normal (buf_ctrl, insn_value, attrs, start, length, shift, total_length, valuep) + void *buf_ctrl; + cgen_insn_t insn_value; + unsigned int attrs; + int start, length, shift, total_length; + long *valuep; +{ + long value; + +#ifdef CGEN_INT_INSN +#if 0 + value = ((insn_value >> (CGEN_BASE_INSN_BITSIZE - (start + length))) + & ((1 << length) - 1)); +#else + value = ((insn_value >> (total_length - (start + length))) + & ((1 << length) - 1)); +#endif + if (! (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED)) + && (value & (1 << (length - 1)))) + value -= 1 << length; +#else + /* FIXME: unfinished */ +#endif + + /* This is backwards as we undo the effects of insert_normal. */ + if (shift < 0) + value >>= -shift; + else + value <<= shift; + + *valuep = value; + return 1; +} + +/* Default print handler. */ + +static void +print_normal (dis_info, value, attrs, pc, length) + void *dis_info; + long value; + unsigned int attrs; + unsigned long pc; /* FIXME: should be bfd_vma */ + int length; +{ + disassemble_info *info = dis_info; + + /* Print the operand as directed by the attributes. */ + if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_FAKE)) + ; /* nothing to do (??? at least not yet) */ + else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_PCREL_ADDR)) + (*info->print_address_func) (pc + CGEN_PCREL_OFFSET + value, info); + /* ??? Not all cases of this are currently caught. */ + else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_ABS_ADDR)) + /* FIXME: Why & 0xffffffff? */ + (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info); + else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED)) + (*info->fprintf_func) (info->stream, "0x%lx", value); + else + (*info->fprintf_func) (info->stream, "%ld", value); +} + +/* Keyword print handler. */ + +static void +print_keyword (dis_info, keyword_table, value, attrs) + void *dis_info; + CGEN_KEYWORD *keyword_table; + long value; + CGEN_ATTR *attrs; +{ + disassemble_info *info = dis_info; + const CGEN_KEYWORD_ENTRY *ke; + + ke = cgen_keyword_lookup_value (keyword_table, value); + if (ke != NULL) + (*info->fprintf_func) (info->stream, "%s", ke->name); + else + (*info->fprintf_func) (info->stream, "???"); +} + +/* -- disassembler routines inserted here */ + +/* Default insn extractor. + + The extracted fields are stored in DIS_FLDS. + BUF_CTRL is used to handle reading variable length insns (FIXME: not done). + Return the length of the insn in bits, or 0 if no match. */ + +static int +extract_insn_normal (insn, buf_ctrl, insn_value, fields) + const CGEN_INSN *insn; + void *buf_ctrl; + cgen_insn_t insn_value; + CGEN_FIELDS *fields; +{ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + const unsigned char *syn; + + CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); + + CGEN_INIT_EXTRACT (); + + for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) + { + int length; + + if (CGEN_SYNTAX_CHAR_P (*syn)) + continue; + + length = @arch@_cgen_extract_operand (CGEN_SYNTAX_FIELD (*syn), + buf_ctrl, insn_value, fields); + if (length == 0) + return 0; + } + + /* We recognized and successfully extracted this insn. */ + return CGEN_INSN_BITSIZE (insn); +} + +/* Default insn printer. + + DIS_INFO is defined as `void *' so the disassembler needn't know anything + about disassemble_info. +*/ + +static void +print_insn_normal (dis_info, insn, fields, pc, length) + void *dis_info; + const CGEN_INSN *insn; + CGEN_FIELDS *fields; + bfd_vma pc; + int length; +{ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + disassemble_info *info = dis_info; + const unsigned char *syn; + + CGEN_INIT_PRINT (); + + for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) + { + if (CGEN_SYNTAX_MNEMONIC_P (*syn)) + { + (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); + continue; + } + if (CGEN_SYNTAX_CHAR_P (*syn)) + { + (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); + continue; + } + + /* We have an operand. */ + @arch@_cgen_print_operand (CGEN_SYNTAX_FIELD (*syn), info, + fields, CGEN_INSN_ATTRS (insn), pc, length); + } +} + +/* Default value for CGEN_PRINT_INSN. + Given BUFLEN bytes (target byte order) read into BUF, look up the + insn in the instruction table and disassemble it. + + The result is the size of the insn in bytes. */ + +#ifndef CGEN_PRINT_INSN +#define CGEN_PRINT_INSN print_insn +#endif + +static int +print_insn (pc, info, buf, buflen) + bfd_vma pc; + disassemble_info *info; + char *buf; + int buflen; +{ + int i; + unsigned long insn_value; + const CGEN_INSN_LIST *insn_list; + + switch (buflen) + { + case 8: + insn_value = buf[0]; + break; + case 16: + insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf); + break; + case 32: + insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf); + break; + default: + abort (); + } + + /* The instructions are stored in hash lists. + Pick the first one and keep trying until we find the right one. */ + + insn_list = CGEN_DIS_LOOKUP_INSN (buf, insn_value); + while (insn_list != NULL) + { + const CGEN_INSN *insn = insn_list->insn; + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + CGEN_FIELDS fields; + int length; + +#if 0 /* not needed as insn shouldn't be in hash lists if not supported */ + /* Supported by this cpu? */ + if (! @arch@_cgen_insn_supported (insn)) + continue; +#endif + + /* Basic bit mask must be correct. */ + /* ??? May wish to allow target to defer this check until the extract + handler. */ + if ((insn_value & CGEN_INSN_MASK (insn)) == CGEN_INSN_VALUE (insn)) + { + /* Printing is handled in two passes. The first pass parses the + machine insn and extracts the fields. The second pass prints + them. */ + + length = (*CGEN_EXTRACT_FN (insn)) (insn, NULL, insn_value, &fields); + if (length > 0) + { + (*CGEN_PRINT_FN (insn)) (info, insn, &fields, pc, length); + /* length is in bits, result is in bytes */ + return length / 8; + } + } + + insn_list = CGEN_DIS_NEXT_INSN (insn_list); + } + + return 0; +} + +/* Main entry point. + Print one instruction from PC on INFO->STREAM. + Return the size of the instruction (in bytes). */ + +int +print_insn_@arch@ (pc, info) + bfd_vma pc; + disassemble_info *info; +{ + char buffer[CGEN_MAX_INSN_SIZE]; + int status, length; + static int initialized = 0; + static int current_mach = 0; + static int current_big_p = 0; + int mach = info->mach; + int big_p = info->endian == BFD_ENDIAN_BIG; + + /* If we haven't initialized yet, or if we've switched cpu's, initialize. */ + if (!initialized || mach != current_mach || big_p != current_big_p) + { + initialized = 1; + current_mach = mach; + current_big_p = big_p; + @arch@_cgen_init_dis (mach, big_p ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); + } + + /* Read enough of the insn so we can look it up in the hash lists. */ + + status = (*info->read_memory_func) (pc, buffer, CGEN_BASE_INSN_SIZE, info); + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return -1; + } + + /* We try to have as much common code as possible. + But at this point some targets need to take over. */ + /* ??? Some targets may need a hook elsewhere. Try to avoid this, + but if not possible try to move this hook elsewhere rather than + have two hooks. */ + length = CGEN_PRINT_INSN (pc, info, buffer, CGEN_BASE_INSN_BITSIZE); + if (length) + return length; + + (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); + return CGEN_DEFAULT_INSN_SIZE; +} diff --git a/opcodes/cgen.sh b/opcodes/cgen.sh new file mode 100644 index 00000000000..9c904ae8448 --- /dev/null +++ b/opcodes/cgen.sh @@ -0,0 +1,40 @@ +#! /bin/sh +# Generate CGEN opcode files: arch-opc.[ch], arch-asm.c, arch-asm.c. +# +# We store the generated files in the source directory until we decide to +# ship a scheme with gdb/binutils. Maybe we never will. + +srcdir=$1 +cgendir=$2 +cgenflags=$3 +scheme=$4 +schemeflags=$5 +arch=$6 + +rm -f tmp-opc.h tmp-opc.c tmp-asm.c tmp-dis.c +rm -f tmp-opc.h1 tmp-opc.c1 tmp-asm.c1 tmp-dis.c1 +rm -f tmp-asm.in tmp-asm.in1 tmp-dis.in tmp-dis.in1 + +$scheme $schemeflags $cgendir/cgen-opc.scm \ + -s $cgendir \ + $cgenflags \ + -m all \ + -a $arch \ + -h tmp-opc.h1 \ + -t tmp-opc.c1 \ + -A tmp-asm.in1 \ + -D tmp-dis.in1 + +sed -e "s/@arch@/${arch}/g" < tmp-opc.h1 > tmp-opc.h +${srcdir}/../move-if-change tmp-opc.h ${srcdir}/${arch}-opc.h +sed -e "s/@arch@/${arch}/g" < tmp-opc.c1 > tmp-opc.c +${srcdir}/../move-if-change tmp-opc.c ${srcdir}/${arch}-opc.c +sed -e "/ -- assembler routines/ r tmp-asm.in1" ${srcdir}/cgen-asm.in \ + | sed -e "s/@arch@/${arch}/g" > tmp-asm.c +${srcdir}/../move-if-change tmp-asm.c ${srcdir}/${arch}-asm.c +sed -e "/ -- disassembler routines/ r tmp-dis.in1" ${srcdir}/cgen-dis.in \ + | sed -e "s/@arch@/${arch}/g" > tmp-dis.c +${srcdir}/../move-if-change tmp-dis.c ${srcdir}/${arch}-dis.c + +rm -f tmp-opc.h1 tmp-opc.c1 tmp-asm.c1 tmp-dis.c1 +rm -f tmp-asm.in tmp-asm.in1 tmp-dis.in tmp-dis.in1 diff --git a/opcodes/configure b/opcodes/configure index 682f86b15cf..90fff10df41 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -1262,18 +1262,17 @@ fi # Always use our own libtool. -LIBTOOL='$(top_builddir)/libtool' +LIBTOOL='$(SHELL) $(top_builddir)/libtool' # Check whether --enable-shared or --disable-shared was given. if test "${enable_shared+set}" = set; then enableval="$enable_shared" - case "$enableval" in - yes) enable_shared=yes ;; - no) enable_shared=no ;; - *opcodes*) enable_shared=yes ;; - *) shared=no ;; -esac + if test "$enableval" = no; then + enable_shared=no +else + enable_shared=yes +fi fi libtool_shared= @@ -1374,7 +1373,7 @@ test "$program_transform_name" = "" && program_transform_name="s,x,x," echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 -echo "configure:1378: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo "configure:1377: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" @@ -1392,19 +1391,19 @@ fi echo $ac_n "checking for Cygwin32 environment""... $ac_c" 1>&6 -echo "configure:1396: checking for Cygwin32 environment" >&5 +echo "configure:1395: checking for Cygwin32 environment" >&5 if eval "test \"`echo '$''{'am_cv_cygwin32'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1401 "configure" +#line 1400 "configure" #include "confdefs.h" int main() { return __CYGWIN32__; ; return 0; } EOF -if { (eval echo configure:1408: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:1407: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* am_cv_cygwin32=yes else @@ -1421,19 +1420,19 @@ echo "$ac_t""$am_cv_cygwin32" 1>&6 CYGWIN32= test "$am_cv_cygwin32" = yes && CYGWIN32=yes echo $ac_n "checking for Mingw32 environment""... $ac_c" 1>&6 -echo "configure:1425: checking for Mingw32 environment" >&5 +echo "configure:1424: checking for Mingw32 environment" >&5 if eval "test \"`echo '$''{'am_cv_mingw32'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1430 "configure" +#line 1429 "configure" #include "confdefs.h" int main() { return __MINGW32__; ; return 0; } EOF -if { (eval echo configure:1437: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:1436: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* am_cv_mingw32=yes else @@ -1452,7 +1451,7 @@ test "$am_cv_mingw32" = yes && MINGW32=yes echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:1456: checking for executable suffix" >&5 +echo "configure:1455: checking for executable suffix" >&5 if eval "test \"`echo '$''{'am_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1482,7 +1481,7 @@ echo "$ac_t""${am_cv_exeext}" 1>&6 # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1486: checking for $ac_word" >&5 +echo "configure:1485: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1511,7 +1510,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1515: checking for $ac_word" >&5 +echo "configure:1514: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1559,7 +1558,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:1563: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:1562: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -1569,11 +1568,11 @@ ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext <<EOF -#line 1573 "configure" +#line 1572 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:1577: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then +if { (eval echo configure:1576: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -1593,12 +1592,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:1597: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:1596: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:1602: checking whether we are using GNU C" >&5 +echo "configure:1601: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1607,7 +1606,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1611: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1610: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -1622,7 +1621,7 @@ if test $ac_cv_prog_gcc = yes; then ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:1626: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:1625: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1658,7 +1657,7 @@ test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:1662: checking how to run the C preprocessor" >&5 +echo "configure:1661: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -1673,13 +1672,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext <<EOF -#line 1677 "configure" +#line 1676 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1683: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1682: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then : @@ -1690,13 +1689,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext <<EOF -#line 1694 "configure" +#line 1693 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1700: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1699: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then : @@ -1722,17 +1721,17 @@ for ac_hdr in string.h strings.h stdlib.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:1726: checking for $ac_hdr" >&5 +echo "configure:1725: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1731 "configure" +#line 1730 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1736: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1735: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then rm -rf conftest* @@ -1759,6 +1758,50 @@ fi done +# start-sanitize-cygnus +use_cgen=no +if test ${USE_MAINTAINER_MODE} = yes ; then + for targ in $target $canon_targets + do + case $targ in + all) use_cgen=yes ;; + m32r-*-*) use_cgen=yes ;; + esac + done +fi +if test $use_cgen = yes ; then + # Extract the first word of "guile", so it can be a program name with args. +set dummy guile; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1777: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_SCHEME'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$SCHEME"; then + ac_cv_prog_SCHEME="$SCHEME" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_SCHEME="guile" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_SCHEME" && ac_cv_prog_SCHEME="guile" +fi +fi +SCHEME="$ac_cv_prog_SCHEME" +if test -n "$SCHEME"; then + echo "$ac_t""$SCHEME" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +fi +# end-sanitize-cygnus + # target-specific stuff: # Canonicalize the secondary target names. @@ -2052,6 +2095,7 @@ s%@MAINT@%$MAINT%g s%@EXEEXT@%$EXEEXT%g s%@HDEFINES@%$HDEFINES%g s%@CPP@%$CPP%g +s%@SCHEME@%$SCHEME%g s%@archdefs@%$archdefs%g s%@BFD_MACHINES@%$BFD_MACHINES%g diff --git a/opcodes/configure.in b/opcodes/configure.in index 76fcd525c80..15723bd3d56 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -60,6 +60,22 @@ AM_PROG_INSTALL AC_CHECK_HEADERS(string.h strings.h stdlib.h) +# start-sanitize-cygnus +use_cgen=no +if test ${USE_MAINTAINER_MODE} = yes ; then + for targ in $target $canon_targets + do + case $targ in + all) use_cgen=yes ;; + m32r-*-*) use_cgen=yes ;; + esac + done +fi +if test $use_cgen = yes ; then + AC_CHECK_PROG(SCHEME, guile, guile, guile) +fi +# end-sanitize-cygnus + # target-specific stuff: # Canonicalize the secondary target names. |