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|
From 8b90c253ef5bf33537a40d73492c6fe320d03546 Mon Sep 17 00:00:00 2001
From: Inki Dae <inki.dae@samsung.com>
Date: Tue, 8 Sep 2020 10:31:11 +0900
Subject: [PATCH 04/10] backends/reference: Add ReverseV2 op support
Change-Id: I0cb1a6fe670e5ff5f9b21b62ff03d3579b956ef7
Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
CMakeLists.txt | 2 +
include/armnn/Descriptors.hpp | 28 ++++++++
include/armnn/DescriptorsFwd.hpp | 1 +
include/armnn/ILayerSupport.hpp | 5 ++
include/armnn/ILayerVisitor.hpp | 8 +++
include/armnn/INetwork.hpp | 7 ++
include/armnn/LayerVisitorBase.hpp | 4 ++
src/armnn/InternalTypes.hpp | 1 +
src/armnn/LayersFwd.hpp | 2 +
src/armnn/Network.cpp | 6 ++
src/armnn/Network.hpp | 3 +
src/armnn/layers/ReverseV2Layer.cpp | 75 ++++++++++++++++++++
src/armnn/layers/ReverseV2Layer.hpp | 48 +++++++++++++
src/armnnTfLiteParser/TfLiteParser.cpp | 41 +++++++++++
src/armnnTfLiteParser/TfLiteParser.hpp | 1 +
src/backends/backendsCommon/LayerSupportBase.cpp | 8 +++
src/backends/backendsCommon/LayerSupportBase.hpp | 5 ++
src/backends/backendsCommon/WorkloadData.cpp | 49 +++++++++++++
src/backends/backendsCommon/WorkloadData.hpp | 5 ++
src/backends/backendsCommon/WorkloadFactory.cpp | 18 +++++
src/backends/backendsCommon/WorkloadFactory.hpp | 4 ++
src/backends/reference/RefLayerSupport.cpp | 29 ++++++++
src/backends/reference/RefLayerSupport.hpp | 5 ++
src/backends/reference/RefWorkloadFactory.cpp | 6 ++
src/backends/reference/RefWorkloadFactory.hpp | 3 +
src/backends/reference/workloads/CMakeLists.txt | 4 ++
.../reference/workloads/RefReverseV2Workload.cpp | 35 ++++++++++
.../reference/workloads/RefReverseV2Workload.hpp | 21 ++++++
src/backends/reference/workloads/RefWorkloads.hpp | 1 +
src/backends/reference/workloads/ReverseV2.cpp | 80 ++++++++++++++++++++++
src/backends/reference/workloads/ReverseV2.hpp | 20 ++++++
31 files changed, 525 insertions(+)
create mode 100644 src/armnn/layers/ReverseV2Layer.cpp
create mode 100644 src/armnn/layers/ReverseV2Layer.hpp
create mode 100644 src/backends/reference/workloads/RefReverseV2Workload.cpp
create mode 100644 src/backends/reference/workloads/RefReverseV2Workload.hpp
create mode 100644 src/backends/reference/workloads/ReverseV2.cpp
create mode 100644 src/backends/reference/workloads/ReverseV2.hpp
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 962dc2d..52c8785 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -380,6 +380,8 @@ list(APPEND armnn_sources
src/armnn/layers/TransposeConvolution2dLayer.hpp
src/armnn/layers/TransposeLayer.hpp
src/armnn/layers/TransposeLayer.cpp
+ src/armnn/layers/ReverseV2Layer.hpp
+ src/armnn/layers/ReverseV2Layer.cpp
src/armnn/layers/ReduceSumLayer.hpp
src/armnn/layers/ReduceSumLayer.cpp
src/armnn/BackendRegistry.cpp
diff --git a/include/armnn/Descriptors.hpp b/include/armnn/Descriptors.hpp
index 3651c20..c7123f1 100644
--- a/include/armnn/Descriptors.hpp
+++ b/include/armnn/Descriptors.hpp
@@ -1215,6 +1215,34 @@ struct TransposeDescriptor
PermutationVector m_DimMappings;
};
+/// A ReverseV2Descriptor for the ReverseV2.
+struct ReverseV2Descriptor
+{
+ ReverseV2Descriptor()
+ : m_TargetWidth(0)
+ , m_TargetHeight(0)
+ , m_Axis(0)
+ , m_DataLayout(DataLayout::NCHW)
+ {}
+
+ bool operator ==(const ReverseV2Descriptor& rhs) const
+ {
+ return m_TargetWidth == rhs.m_TargetWidth &&
+ m_TargetHeight == rhs.m_TargetHeight &&
+ m_Axis == rhs.m_Axis &&
+ m_DataLayout == rhs.m_DataLayout;
+ }
+
+ /// Target width value.
+ uint32_t m_TargetWidth;
+ /// Target height value.
+ uint32_t m_TargetHeight;
+ /// The indices of the dimensions to reverse.
+ int32_t m_Axis;
+ /// The data layout to be used (NCHW, NHWC).
+ DataLayout m_DataLayout;
+};
+
/// A ReduceSumDescriptor for the REDUCE SUM.
struct ReduceSumDescriptor
{
diff --git a/include/armnn/DescriptorsFwd.hpp b/include/armnn/DescriptorsFwd.hpp
index cef85d5..38e74cd 100644
--- a/include/armnn/DescriptorsFwd.hpp
+++ b/include/armnn/DescriptorsFwd.hpp
@@ -33,6 +33,7 @@ struct QLstmDescriptor;
struct ReshapeDescriptor;
struct ResizeBilinearDescriptor;
struct ResizeDescriptor;
+struct ReverseV2Descriptor;
struct ReduceSumDescriptor;
struct SoftmaxDescriptor;
struct SpaceToBatchNdDescriptor;
diff --git a/include/armnn/ILayerSupport.hpp b/include/armnn/ILayerSupport.hpp
index 0701790..670c856 100644
--- a/include/armnn/ILayerSupport.hpp
+++ b/include/armnn/ILayerSupport.hpp
@@ -392,6 +392,11 @@ public:
const TransposeDescriptor& descriptor,
Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const = 0;
+ virtual bool IsReverseV2Supported(const TensorInfo& input,
+ const TensorInfo& output,
+ const ReverseV2Descriptor& descriptor,
+ Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const = 0;
+
virtual bool IsReduceSumSupported(const TensorInfo& input,
const TensorInfo& output,
const ReduceSumDescriptor& descriptor,
diff --git a/include/armnn/ILayerVisitor.hpp b/include/armnn/ILayerVisitor.hpp
index cd57275..a40dbae 100644
--- a/include/armnn/ILayerVisitor.hpp
+++ b/include/armnn/ILayerVisitor.hpp
@@ -403,6 +403,14 @@ public:
const ResizeDescriptor& resizeDescriptor,
const char* name = nullptr) = 0;
+ /// Function that a reversev2 layer should call back to when its Accept(ILayerVisitor&) function is invoked.
+ /// @param layer - pointer to the layer which is calling back to this visit function.
+ /// @param reversev2Descriptor - Parameters for the reversev2 operation.
+ /// @param name - Optional name for the layer.
+ virtual void VisitReverseV2Layer(const IConnectableLayer* layer,
+ const ReverseV2Descriptor& reversev2Descriptor,
+ const char* name = nullptr) = 0;
+
/// Function that a reduce_sum layer should call back to when its Accept(ILayerVisitor&) function is invoked.
/// @param layer - pointer to the layer which is calling back to this visit function.
/// @param ReduceSumDescriptor - Parameters for the reduce max operation.
diff --git a/include/armnn/INetwork.hpp b/include/armnn/INetwork.hpp
index 79ad686..6678a1c 100644
--- a/include/armnn/INetwork.hpp
+++ b/include/armnn/INetwork.hpp
@@ -360,6 +360,13 @@ public:
virtual IConnectableLayer* AddResizeLayer(const ResizeDescriptor& resizeDescriptor,
const char* name = nullptr) = 0;
+ /// Adds a reversev2 layer to the network.
+ /// @param reversev2Descriptor - Parameters for the reversev2 operation.
+ /// @param name - Optional name for the layer.
+ /// @return - Interface for configuring the layer.
+ virtual IConnectableLayer* AddReverseV2Layer(const ReverseV2Descriptor& reversev2Descriptor,
+ const char* name = nullptr) = 0;
+
/// Adds a reducemax layer to the network.
/// @param ReduceSumDescriptor - Parameters for the reducemax operation.
/// @param name - Optional name for the layer.
diff --git a/include/armnn/LayerVisitorBase.hpp b/include/armnn/LayerVisitorBase.hpp
index 209ef2c..80d4dfb 100644
--- a/include/armnn/LayerVisitorBase.hpp
+++ b/include/armnn/LayerVisitorBase.hpp
@@ -204,6 +204,10 @@ public:
const ResizeDescriptor&,
const char*) override { DefaultPolicy::Apply(__func__); }
+ void VisitReverseV2Layer(const IConnectableLayer*,
+ const ReverseV2Descriptor&,
+ const char*) override { DefaultPolicy::Apply(__func__); }
+
void VisitReduceSumLayer(const IConnectableLayer*,
const ReduceSumDescriptor&,
const char*) override { DefaultPolicy::Apply(__func__); }
diff --git a/src/armnn/InternalTypes.hpp b/src/armnn/InternalTypes.hpp
index 5f5ee01..e523d52 100644
--- a/src/armnn/InternalTypes.hpp
+++ b/src/armnn/InternalTypes.hpp
@@ -72,6 +72,7 @@
X(Switch) \
X(Transpose) \
X(TransposeConvolution2d) \
+ X(ReverseV2) \
X(ReduceSum)
/// When adding a new layer, adapt also the LastLayer enum value in the
diff --git a/src/armnn/LayersFwd.hpp b/src/armnn/LayersFwd.hpp
index 5092828..7ac517c 100644
--- a/src/armnn/LayersFwd.hpp
+++ b/src/armnn/LayersFwd.hpp
@@ -54,6 +54,7 @@
#include "layers/QuantizedLstmLayer.hpp"
#include "layers/ReshapeLayer.hpp"
#include "layers/ResizeLayer.hpp"
+#include "layers/ReverseV2Layer.hpp"
#include "layers/ReduceSumLayer.hpp"
#include "layers/SliceLayer.hpp"
#include "layers/SoftmaxLayer.hpp"
@@ -143,6 +144,7 @@ DECLARE_LAYER(QLstm)
DECLARE_LAYER(QuantizedLstm)
DECLARE_LAYER(Reshape)
DECLARE_LAYER(Resize)
+DECLARE_LAYER(ReverseV2)
DECLARE_LAYER(ReduceSum)
DECLARE_LAYER(Slice)
DECLARE_LAYER(Softmax)
diff --git a/src/armnn/Network.cpp b/src/armnn/Network.cpp
index 335e104..bc6738e 100644
--- a/src/armnn/Network.cpp
+++ b/src/armnn/Network.cpp
@@ -1472,6 +1472,12 @@ resizeDescriptor, const char* name)
return m_Graph->AddLayer<ResizeLayer>(resizeDescriptor, name);
}
+IConnectableLayer* Network::AddReverseV2Layer(const ReverseV2Descriptor& reversev2Descriptor,
+ const char* name)
+{
+ return m_Graph->AddLayer<ReverseV2Layer>(reversev2Descriptor, name);
+}
+
IConnectableLayer* Network::AddReduceSumLayer(const ReduceSumDescriptor& reducesumDescriptor,
const char* name)
{
diff --git a/src/armnn/Network.hpp b/src/armnn/Network.hpp
index 6c767f3..95d235e 100644
--- a/src/armnn/Network.hpp
+++ b/src/armnn/Network.hpp
@@ -160,6 +160,9 @@ public:
IConnectableLayer* AddResizeLayer(const ResizeDescriptor& resizeDescriptor,
const char* name = nullptr) override;
+ IConnectableLayer* AddReverseV2Layer(const ReverseV2Descriptor& reversev2Descriptor,
+ const char* name = nullptr) override;
+
IConnectableLayer* AddReduceSumLayer(const ReduceSumDescriptor& reducesumDescriptor,
const char* name = nullptr) override;
diff --git a/src/armnn/layers/ReverseV2Layer.cpp b/src/armnn/layers/ReverseV2Layer.cpp
new file mode 100644
index 0000000..0921a3d
--- /dev/null
+++ b/src/armnn/layers/ReverseV2Layer.cpp
@@ -0,0 +1,75 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ReverseV2Layer.hpp"
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+
+#include <armnnUtils/DataLayoutIndexed.hpp>
+
+#include <backendsCommon/WorkloadData.hpp>
+#include <backendsCommon/WorkloadFactory.hpp>
+
+using namespace armnnUtils;
+
+namespace armnn
+{
+
+ReverseV2Layer::ReverseV2Layer(const ReverseV2Descriptor& param, const char* name)
+ : LayerWithParameters(1, 1, LayerType::ReverseV2, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> ReverseV2Layer::CreateWorkload(const IWorkloadFactory& factory) const
+{
+ ReverseV2QueueDescriptor descriptor;
+ return factory.CreateReverseV2(descriptor, PrepInfoAndDesc(descriptor));
+}
+
+ReverseV2Layer* ReverseV2Layer::Clone(Graph& graph) const
+{
+ return CloneBase<ReverseV2Layer>(graph, m_Param, GetName());
+}
+
+std::vector<TensorShape> ReverseV2Layer::InferOutputShapes(const std::vector<TensorShape>& inputShapes) const
+{
+ ARMNN_ASSERT(inputShapes.size() == 1);
+
+ const TensorShape& inputShape = inputShapes[0];
+ const DataLayoutIndexed dimensionIndices = m_Param.m_DataLayout;
+
+ unsigned int outWidth = m_Param.m_TargetWidth;
+ unsigned int outHeight = m_Param.m_TargetHeight;
+ unsigned int outChannels = inputShape[dimensionIndices.GetChannelsIndex()];
+ unsigned int outBatch = inputShape[0];
+
+ TensorShape tensorShape = m_Param.m_DataLayout == armnn::DataLayout::NHWC ?
+ TensorShape( { outBatch, outHeight, outWidth, outChannels } ) :
+ TensorShape( { outBatch, outChannels, outHeight, outWidth });
+
+ return std::vector<TensorShape>({ tensorShape });
+}
+
+void ReverseV2Layer::ValidateTensorShapesFromInputs()
+{
+ VerifyLayerConnections(1, CHECK_LOCATION());
+
+ auto inferredShapes = InferOutputShapes({ GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape() });
+
+ ARMNN_ASSERT(inferredShapes.size() == 1);
+
+ ConditionalThrowIfNotEqual<LayerValidationException>(
+ "ReverseV2Layer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+ GetOutputSlot(0).GetTensorInfo().GetShape(),
+ inferredShapes[0]);
+}
+
+void ReverseV2Layer::Accept(ILayerVisitor& visitor) const
+{
+ visitor.VisitReverseV2Layer(this, GetParameters(), GetName());
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/ReverseV2Layer.hpp b/src/armnn/layers/ReverseV2Layer.hpp
new file mode 100644
index 0000000..65acdfb
--- /dev/null
+++ b/src/armnn/layers/ReverseV2Layer.hpp
@@ -0,0 +1,48 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+/// This layer represents a reversev2 operation.
+class ReverseV2Layer : public LayerWithParameters<ReverseV2Descriptor>
+{
+public:
+ /// Makes a workload for the ReverseV2 type.
+ /// @param [in] graph The graph where this layer can be found.
+ /// @param [in] factory The workload factory which will create the workload.
+ /// @return A pointer to the created workload, or nullptr if not created.
+ virtual std::unique_ptr<IWorkload>CreateWorkload(const IWorkloadFactory& factory) const override;
+
+ /// Creates a dynamically-allocated copy of this layer.
+ /// @param [in] graph The graph into which this layer is being cloned.
+ ReverseV2Layer* Clone(Graph& graph) const override;
+
+ /// Check if the input tensor shape(s)
+ /// will lead to a valid configuration of @ref ReverseV2Layer.
+ void ValidateTensorShapesFromInputs() override;
+
+ /// By default returns inputShapes if the number of inputs are equal to number of outputs,
+ /// otherwise infers the output shapes from given input shapes and layer properties.
+ /// @param [in] inputShapes The input shapes layer has.
+ /// @return A vector to the inferred output shape.
+ std::vector<TensorShape> InferOutputShapes(const std::vector<TensorShape>& inputShapes) const override;
+
+ void Accept(ILayerVisitor& visitor) const override;
+
+protected:
+ /// Constructor to create a ReverseV2Layer.
+ /// @param [in] param ReverseV2Descriptor to configure the resize operation.
+ /// @param [in] name Optional name for the layer.
+ ReverseV2Layer(const ReverseV2Descriptor& param, const char* name);
+
+ /// Default destructor
+ ~ReverseV2Layer() = default;
+};
+
+} // namespace armnn
diff --git a/src/armnnTfLiteParser/TfLiteParser.cpp b/src/armnnTfLiteParser/TfLiteParser.cpp
index e5400dc..3da7288 100644
--- a/src/armnnTfLiteParser/TfLiteParser.cpp
+++ b/src/armnnTfLiteParser/TfLiteParser.cpp
@@ -531,6 +531,7 @@ TfLiteParser::TfLiteParser(const Optional<ITfLiteParser::TfLiteParserOptions>& o
m_ParserFunctions[tflite::BuiltinOperator_TRANSPOSE] = &TfLiteParser::ParseTranspose;
m_ParserFunctions[tflite::BuiltinOperator_TRANSPOSE_CONV] = &TfLiteParser::ParseTransposeConv;
m_ParserFunctions[tflite::BuiltinOperator_UNPACK] = &TfLiteParser::ParseUnpack;
+ m_ParserFunctions[tflite::BuiltinOperator_REVERSE_V2] = &TfLiteParser::ParseReverse_v2;
m_ParserFunctions[tflite::BuiltinOperator_ARG_MAX] = &TfLiteParser::ParseArgMax;
m_ParserFunctions[tflite::BuiltinOperator_SUM] = &TfLiteParser::ParseSum;
@@ -2732,6 +2733,46 @@ void TfLiteParser::ParseSplitV(size_t subgraphIndex, size_t operatorIndex)
RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
}
+void TfLiteParser::ParseReverse_v2(size_t subgraphIndex, size_t operatorIndex)
+{
+ CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
+ auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
+ CHECK_VALID_SIZE(inputs.size(), 2);
+
+ auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
+ CHECK_VALID_SIZE(outputs.size(), 1);
+
+ auto layerName = boost::str(boost::format("Reverse_v2:%1%:%2%") % subgraphIndex % operatorIndex);
+
+ armnn::TensorInfo sizeTensorInfo0 = ToTensorInfo(inputs[0]);
+ armnn::TensorInfo sizeTensorInfo1 = ToTensorInfo(inputs[1]);
+
+ TensorShape shape = sizeTensorInfo0.GetShape();
+
+ // Get const axis value from model and set it to descriptor.
+ BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
+
+ ReverseV2Descriptor desc;
+ desc.m_Axis = axisBufferPtr->data.data()[0];
+ desc.m_TargetHeight = shape[1];
+ desc.m_TargetWidth = shape[2];
+ desc.m_DataLayout = armnn::DataLayout::NHWC;
+
+ // Register a new layer object, ReverseV2, to in-memory network of ARMNN.
+ IConnectableLayer *layer = m_Network->AddReverseV2Layer(desc, layerName.c_str());
+
+ armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0]);
+ layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
+
+ // Register input tensor to the layer.
+ auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
+ RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
+
+ // Register output tensor to the layer.
+ auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
+ RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
+}
+
void TfLiteParser::ParseArgMax(size_t subgraphIndex, size_t operatorIndex)
{
const auto &operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
diff --git a/src/armnnTfLiteParser/TfLiteParser.hpp b/src/armnnTfLiteParser/TfLiteParser.hpp
index 13d1cb4..7970559 100644
--- a/src/armnnTfLiteParser/TfLiteParser.hpp
+++ b/src/armnnTfLiteParser/TfLiteParser.hpp
@@ -133,6 +133,7 @@ private:
void ParseTranspose(size_t subgraphIndex, size_t operatorIndex);
void ParseTransposeConv(size_t subgraphIndex, size_t operatorIndex);
void ParseUnpack(size_t subgraphIndex, size_t operatorIndex);
+ void ParseReverse_v2(size_t subgraphIndex, size_t operatorIndex);
void ParseArgMax(size_t subgraphIndex, size_t operatorIndex);
void ParseSum(size_t subgraphIndex, size_t operatorIndex);
diff --git a/src/backends/backendsCommon/LayerSupportBase.cpp b/src/backends/backendsCommon/LayerSupportBase.cpp
index 245b165..0c1c1e2 100644
--- a/src/backends/backendsCommon/LayerSupportBase.cpp
+++ b/src/backends/backendsCommon/LayerSupportBase.cpp
@@ -615,6 +615,14 @@ bool LayerSupportBase::IsTransposeSupported(const TensorInfo& /*input*/,
return DefaultLayerSupport(__func__, __FILE__, __LINE__, reasonIfUnsupported);
}
+bool LayerSupportBase::IsReverseV2Supported(const TensorInfo& /*input*/,
+ const TensorInfo& /*output*/,
+ const ReverseV2Descriptor& /*descriptor*/,
+ Optional<std::string&> reasonIfUnsupported) const
+{
+ return DefaultLayerSupport(__func__, __FILE__, __LINE__, reasonIfUnsupported);
+}
+
bool LayerSupportBase::IsReduceSumSupported(const TensorInfo& /*input*/,
const TensorInfo& /*output*/,
const ReduceSumDescriptor& /*descriptor*/,
diff --git a/src/backends/backendsCommon/LayerSupportBase.hpp b/src/backends/backendsCommon/LayerSupportBase.hpp
index 9b39f8f..6f1e6e0 100644
--- a/src/backends/backendsCommon/LayerSupportBase.hpp
+++ b/src/backends/backendsCommon/LayerSupportBase.hpp
@@ -377,6 +377,11 @@ public:
const TransposeDescriptor& descriptor,
Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
+ bool IsReverseV2Supported(const TensorInfo& input,
+ const TensorInfo& output,
+ const ReverseV2Descriptor& descriptor,
+ Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
+
bool IsReduceSumSupported(const TensorInfo& input,
const TensorInfo& output,
const ReduceSumDescriptor& descriptor,
diff --git a/src/backends/backendsCommon/WorkloadData.cpp b/src/backends/backendsCommon/WorkloadData.cpp
index 7455ab5..dcbec11 100644
--- a/src/backends/backendsCommon/WorkloadData.cpp
+++ b/src/backends/backendsCommon/WorkloadData.cpp
@@ -3483,6 +3483,55 @@ void ElementwiseUnaryQueueDescriptor::Validate(const WorkloadInfo& workloadInfo)
ValidateTensorDataTypesMatch(inputTensorInfo, outputTensorInfo, descriptorName, "input", "output");
}
+void ReverseV2QueueDescriptor::Validate(const WorkloadInfo& workloadInfo) const
+{
+ const std::string descriptorName{"ReverseV2QueueDescriptor"};
+
+ ValidateNumInputs(workloadInfo, descriptorName, 1);
+ ValidateNumOutputs(workloadInfo, descriptorName, 1);
+
+ const TensorInfo& inputTensorInfo = workloadInfo.m_InputTensorInfos[0];
+ const TensorInfo& outputTensorInfo = workloadInfo.m_OutputTensorInfos[0];
+
+ ValidateTensorNumDimensions(inputTensorInfo, descriptorName, 4, "input");
+ ValidateTensorNumDimensions(outputTensorInfo, descriptorName, 4, "output");
+
+ std::vector<DataType> supportedTypes =
+ {
+ DataType::BFloat16,
+ DataType::Float16,
+ DataType::Float32,
+ DataType::QAsymmS8,
+ DataType::QAsymmU8,
+ DataType::QSymmS16
+ };
+
+ ValidateDataTypes(inputTensorInfo, supportedTypes, descriptorName);
+ ValidateTensorDataTypesMatch(inputTensorInfo, outputTensorInfo, descriptorName, "input", "output");
+
+ // ReverseV2 only changes width and height: batch and channel count must match.
+ const unsigned int inputBatchSize = inputTensorInfo.GetShape()[0];
+ const unsigned int outputBatchSize = outputTensorInfo.GetShape()[0];
+ if (inputBatchSize != outputBatchSize)
+ {
+ throw InvalidArgumentException(
+ boost::str(boost::format("%1%: Input batch size (%2%) "
+ "does not match output batch size (%3%)") %
+ descriptorName % inputBatchSize % outputBatchSize));
+ }
+
+ DataLayoutIndexed dimensionIndices(m_Parameters.m_DataLayout);
+ const unsigned int inputChannelCount = inputTensorInfo.GetShape()[dimensionIndices.GetChannelsIndex()];
+ const unsigned int outputChannelCount = outputTensorInfo.GetShape()[dimensionIndices.GetChannelsIndex()];
+ if (inputChannelCount != outputChannelCount)
+ {
+ throw InvalidArgumentException(
+ boost::str(boost::format("%1%: Input channel count (%2%) "
+ "does not match output channel count (%3%)") %
+ descriptorName % inputChannelCount % outputChannelCount));
+ }
+}
+
void ReduceSumQueueDescriptor::Validate(const WorkloadInfo& workloadInfo) const
{
const std::string descriptorName{"ReduceSumQueueDescriptor"};
diff --git a/src/backends/backendsCommon/WorkloadData.hpp b/src/backends/backendsCommon/WorkloadData.hpp
index 6f203b5..0cbe8aa 100644
--- a/src/backends/backendsCommon/WorkloadData.hpp
+++ b/src/backends/backendsCommon/WorkloadData.hpp
@@ -634,6 +634,11 @@ struct ElementwiseUnaryQueueDescriptor : QueueDescriptorWithParameters<Elementwi
void Validate(const WorkloadInfo& workloadInfo) const;
};
+struct ReverseV2QueueDescriptor : QueueDescriptorWithParameters<ReverseV2Descriptor>
+{
+ void Validate(const WorkloadInfo& workloadInfo) const;
+};
+
struct ReduceSumQueueDescriptor : QueueDescriptorWithParameters<ReduceSumDescriptor>
{
void Validate(const WorkloadInfo& workloadInfo) const;
diff --git a/src/backends/backendsCommon/WorkloadFactory.cpp b/src/backends/backendsCommon/WorkloadFactory.cpp
index b7195f7..31e6bfd 100644
--- a/src/backends/backendsCommon/WorkloadFactory.cpp
+++ b/src/backends/backendsCommon/WorkloadFactory.cpp
@@ -1178,6 +1178,18 @@ bool IWorkloadFactory::IsLayerSupported(const BackendId& backendId,
break;
}
+ case LayerType::ReverseV2:
+ {
+ auto cLayer = PolymorphicDowncast<const ReverseV2Layer*>(&layer);
+ const TensorInfo& input = layer.GetInputSlot(0).GetConnection()->GetTensorInfo();
+ const TensorInfo& output = layer.GetOutputSlot(0).GetTensorInfo();
+
+ result = layerSupportObject->IsReverseV2Supported(OverrideDataType(input, dataType),
+ OverrideDataType(output, dataType),
+ cLayer->GetParameters(),
+ reason);
+ break;
+ }
case LayerType::ReduceSum:
{
auto cLayer = PolymorphicDowncast<const ReduceSumLayer*>(&layer);
@@ -1596,6 +1608,12 @@ std::unique_ptr<IWorkload> IWorkloadFactory::CreateTransposeConvolution2d(
return std::unique_ptr<IWorkload>();
}
+std::unique_ptr<IWorkload> IWorkloadFactory::CreateReverseV2(const ReverseV2QueueDescriptor& /*descriptor*/,
+ const WorkloadInfo& /*info*/) const
+{
+ return std::unique_ptr<IWorkload>();
+}
+
std::unique_ptr<IWorkload> IWorkloadFactory::CreateReduceSum(const ReduceSumQueueDescriptor& /*descriptor*/,
const WorkloadInfo& /*info*/) const
{
diff --git a/src/backends/backendsCommon/WorkloadFactory.hpp b/src/backends/backendsCommon/WorkloadFactory.hpp
index 0d98c92..740da18 100644
--- a/src/backends/backendsCommon/WorkloadFactory.hpp
+++ b/src/backends/backendsCommon/WorkloadFactory.hpp
@@ -250,6 +250,10 @@ public:
virtual std::unique_ptr<IWorkload> CreateTransposeConvolution2d(
const TransposeConvolution2dQueueDescriptor& descriptor,
const WorkloadInfo& info) const;
+
+ virtual std::unique_ptr<IWorkload> CreateReverseV2(const ReverseV2QueueDescriptor& descriptor,
+ const WorkloadInfo& info) const;
+
virtual std::unique_ptr<IWorkload> CreateReduceSum(const ReduceSumQueueDescriptor& descriptor,
const WorkloadInfo& info) const;
};
diff --git a/src/backends/reference/RefLayerSupport.cpp b/src/backends/reference/RefLayerSupport.cpp
index 333ad4d..1ac947e 100644
--- a/src/backends/reference/RefLayerSupport.cpp
+++ b/src/backends/reference/RefLayerSupport.cpp
@@ -2132,6 +2132,35 @@ bool RefLayerSupport::IsTransposeSupported(const TensorInfo& input,
return supported;
}
+bool RefLayerSupport::IsReverseV2Supported(const TensorInfo& input,
+ const TensorInfo& output,
+ const ReverseV2Descriptor& descriptor,
+ Optional<std::string&> reasonIfUnsupported) const
+{
+ IgnoreUnused(descriptor);
+ bool supported = true;
+ std::array<DataType,6> supportedTypes =
+ {
+ DataType::BFloat16,
+ DataType::Float32,
+ DataType::Float16,
+ DataType::QAsymmS8,
+ DataType::QAsymmU8,
+ DataType::QSymmS16
+ };
+
+ supported &= CheckSupportRule(TypeAnyOf(input, supportedTypes), reasonIfUnsupported,
+ "Reference ReverseV2: input type not supported");
+
+ supported &= CheckSupportRule(TypeAnyOf(output, supportedTypes), reasonIfUnsupported,
+ "Reference ReverseV2: output type not supported");
+
+ supported &= CheckSupportRule(TypesAreEqual(input, output), reasonIfUnsupported,
+ "Reference ReverseV2: input and output types not matching");
+
+ return supported;
+}
+
bool RefLayerSupport::IsReduceSumSupported(const TensorInfo& input,
const TensorInfo& output,
const ReduceSumDescriptor& descriptor,
diff --git a/src/backends/reference/RefLayerSupport.hpp b/src/backends/reference/RefLayerSupport.hpp
index 766ddfa..cdc2adb 100644
--- a/src/backends/reference/RefLayerSupport.hpp
+++ b/src/backends/reference/RefLayerSupport.hpp
@@ -342,6 +342,11 @@ public:
const TransposeDescriptor& descriptor,
Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
+ bool IsReverseV2Supported(const TensorInfo& input,
+ const TensorInfo& output,
+ const ReverseV2Descriptor& descriptor,
+ Optional<std::string&> reasonIfUnsupported = EmptyOptional()) const override;
+
bool IsReduceSumSupported(const TensorInfo& input,
const TensorInfo& output,
const ReduceSumDescriptor& descriptor,
diff --git a/src/backends/reference/RefWorkloadFactory.cpp b/src/backends/reference/RefWorkloadFactory.cpp
index 9602df5..7d1e810 100644
--- a/src/backends/reference/RefWorkloadFactory.cpp
+++ b/src/backends/reference/RefWorkloadFactory.cpp
@@ -632,6 +632,12 @@ std::unique_ptr<IWorkload> RefWorkloadFactory::CreateTransposeConvolution2d(
return std::make_unique<RefTransposeConvolution2dWorkload>(descriptor, info);
}
+std::unique_ptr<IWorkload> RefWorkloadFactory::CreateReverseV2(const ReverseV2QueueDescriptor& descriptor,
+ const WorkloadInfo& info) const
+{
+ return std::make_unique<RefReverseV2Workload>(descriptor, info);
+}
+
std::unique_ptr<IWorkload> RefWorkloadFactory::CreateReduceSum(const ReduceSumQueueDescriptor& descriptor,
const WorkloadInfo& info) const
{
diff --git a/src/backends/reference/RefWorkloadFactory.hpp b/src/backends/reference/RefWorkloadFactory.hpp
index 93cab9a..14df6b8 100644
--- a/src/backends/reference/RefWorkloadFactory.hpp
+++ b/src/backends/reference/RefWorkloadFactory.hpp
@@ -250,6 +250,9 @@ public:
std::unique_ptr<IWorkload> CreateTransposeConvolution2d(const TransposeConvolution2dQueueDescriptor& descriptor,
const WorkloadInfo& info) const override;
+ std::unique_ptr<IWorkload> CreateReverseV2(const ReverseV2QueueDescriptor& descriptor,
+ const WorkloadInfo& info) const override;
+
std::unique_ptr<IWorkload> CreateReduceSum(const ReduceSumQueueDescriptor& descriptor,
const WorkloadInfo& info) const override;
diff --git a/src/backends/reference/workloads/CMakeLists.txt b/src/backends/reference/workloads/CMakeLists.txt
index d5eceff..f68a673 100644
--- a/src/backends/reference/workloads/CMakeLists.txt
+++ b/src/backends/reference/workloads/CMakeLists.txt
@@ -51,6 +51,8 @@ list(APPEND armnnRefBackendWorkloads_sources
Pad.hpp
ReduceSum.cpp
ReduceSum.hpp
+ ReverseV2.cpp
+ ReverseV2.hpp
Pooling2d.cpp
Pooling2d.hpp
PreluImpl.cpp
@@ -174,6 +176,8 @@ list(APPEND armnnRefBackendWorkloads_sources
TensorBufferArrayView.hpp
TransposeConvolution2d.cpp
TransposeConvolution2d.hpp
+ RefReverseV2Workload.cpp
+ RefReverseV2Workload.hpp
RefReduceSumWorkload.cpp
RefReduceSumWorkload.hpp
)
diff --git a/src/backends/reference/workloads/RefReverseV2Workload.cpp b/src/backends/reference/workloads/RefReverseV2Workload.cpp
new file mode 100644
index 0000000..73ceba4
--- /dev/null
+++ b/src/backends/reference/workloads/RefReverseV2Workload.cpp
@@ -0,0 +1,35 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "RefReverseV2Workload.hpp"
+
+#include "ReverseV2.hpp"
+#include "RefWorkloadUtils.hpp"
+#include "BaseIterator.hpp"
+#include "Profiling.hpp"
+
+#include "BaseIterator.hpp"
+#include "Decoders.hpp"
+#include "Encoders.hpp"
+
+namespace armnn
+{
+
+void RefReverseV2Workload::Execute() const
+{
+ ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefReverseV2Workload_Execute");
+
+ const TensorInfo& inputTensorInfo = GetTensorInfo(m_Data.m_Inputs[0]);
+ const TensorInfo& outputTensorInfo = GetTensorInfo(m_Data.m_Outputs[0]);
+
+ std::unique_ptr<Decoder<float>> decoderPtr = MakeDecoder<float>(inputTensorInfo, m_Data.m_Inputs[0]->Map());
+ Decoder<float> &decoder = *decoderPtr;
+
+ float *output = GetOutputTensorData<float>(0, m_Data);
+
+ ReverseV2(decoder, output, inputTensorInfo, outputTensorInfo, m_Data.m_Parameters.m_Axis);
+}
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefReverseV2Workload.hpp b/src/backends/reference/workloads/RefReverseV2Workload.hpp
new file mode 100644
index 0000000..3c71dfa
--- /dev/null
+++ b/src/backends/reference/workloads/RefReverseV2Workload.hpp
@@ -0,0 +1,21 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+#include <backendsCommon/WorkloadData.hpp>
+
+namespace armnn
+{
+
+class RefReverseV2Workload : public BaseWorkload<ReverseV2QueueDescriptor>
+{
+public:
+ using BaseWorkload<ReverseV2QueueDescriptor>::BaseWorkload;
+ virtual void Execute() const override;
+};
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefWorkloads.hpp b/src/backends/reference/workloads/RefWorkloads.hpp
index c80ed43..9427d5c 100644
--- a/src/backends/reference/workloads/RefWorkloads.hpp
+++ b/src/backends/reference/workloads/RefWorkloads.hpp
@@ -67,4 +67,5 @@
#include "Softmax.hpp"
#include "Splitter.hpp"
#include "TensorBufferArrayView.hpp"
+#include "RefReverseV2Workload.hpp"
#include "RefReduceSumWorkload.hpp"
diff --git a/src/backends/reference/workloads/ReverseV2.cpp b/src/backends/reference/workloads/ReverseV2.cpp
new file mode 100644
index 0000000..1bfd350
--- /dev/null
+++ b/src/backends/reference/workloads/ReverseV2.cpp
@@ -0,0 +1,80 @@
+//
+// Copyright © 2019 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ReverseV2.hpp"
+
+#include <armnnUtils/TensorUtils.hpp>
+
+#include <boost/numeric/conversion/cast.hpp>
+#include <algorithm>
+#include <iostream>
+
+namespace armnn
+{
+
+void ReverseV2(Decoder<float>& in, float *out, const TensorInfo& inputTensorInfo,
+ const TensorInfo& outputTensorInfo, int32_t axis)
+{
+ IgnoreUnused(outputTensorInfo);
+
+ unsigned int uAxis = armnnUtils::GetUnsignedAxis(inputTensorInfo.GetNumDimensions(), axis);
+ const unsigned int batchSize = inputTensorInfo.GetShape()[0];
+ unsigned int height = inputTensorInfo.GetShape()[1];
+ unsigned int width = inputTensorInfo.GetShape()[2];
+ unsigned int channel = inputTensorInfo.GetShape()[3];
+
+ // TODO. Integreate below four if conditions with one.
+ if (uAxis == 3) {
+ for (unsigned int b = 0; b < batchSize; ++b) {
+ for (unsigned int y = 0; y < height; ++y) {
+ for (unsigned int x = 0; x < width; ++x) {
+ for (unsigned int c = 0; c < channel; ++c) {
+ in[(b * height * width * channel) + (y * width * channel) + (x * channel) + c];
+ float in_val = in.Get();
+ out[(b * height * width * channel) + (y * width * channel) + (x * channel) + (channel - 1 - c)] = in_val;
+ }
+ }
+ }
+ }
+ } else if (uAxis == 2) {
+ for (unsigned int b = 0; b < batchSize; ++b) {
+ for (unsigned int y = 0; y < height; ++y) {
+ for (unsigned int c = 0; c < channel; ++c) {
+ for (unsigned int x = 0; x < width; ++x) {
+ in[(b * height * width * channel) + (y * width * channel) + (x * channel) + c];
+ float in_val = in.Get();
+ out[(b * height * width * channel) + (y * width * channel) + ((width - 1 - x) * channel) + c] = in_val;
+ }
+ }
+ }
+ }
+ } else if (uAxis == 1) {
+ for (unsigned int b = 0; b < batchSize; ++b) {
+ for (unsigned int y = 0; y < height; ++y) {
+ for (unsigned int x = 0; x < width; ++x) {
+ for (unsigned int c = 0; c < channel; ++c) {
+ in[(b * height * width * channel) + (y * width * channel) + (x * channel) + c];
+ float in_val = in.Get();
+ out[(b * height * width * channel) + ((height - 1 - y) * width * channel) + (x * channel) + c] = in_val;
+ }
+ }
+ }
+ }
+ } else if (uAxis == 0) {
+ for (unsigned int b = 0; b < batchSize; ++b) {
+ for (unsigned int y = 0; y < height; ++y) {
+ for (unsigned int x = 0; x < width; ++x) {
+ for (unsigned int c = 0; c < channel; ++c) {
+ in[(b * height * width * channel) + (y * width * channel) + (x * channel) + c];
+ float in_val = in.Get();
+ out[(b * height * width * channel) + (y * width * channel) + (x * channel) + c] = in_val;
+ }
+ }
+ }
+ }
+ }
+}
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/ReverseV2.hpp b/src/backends/reference/workloads/ReverseV2.hpp
new file mode 100644
index 0000000..3957959
--- /dev/null
+++ b/src/backends/reference/workloads/ReverseV2.hpp
@@ -0,0 +1,20 @@
+//
+// Copyright © 2019 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include "armnn/Tensor.hpp"
+#include "armnn/Descriptors.hpp"
+
+#include "Decoders.hpp"
+
+namespace armnn
+{
+
+void ReverseV2(Decoder<float>& in, float* out, const TensorInfo& inputTensorInfo,
+ const TensorInfo& outputTensorInfo, int32_t axis);
+
+} //namespace armnn
+
--
2.7.4
|