From 46d5927c3461ec270de8b0fc087ac5dc2431488f Mon Sep 17 00:00:00 2001 From: Anthony Barbier Date: Thu, 4 May 2017 09:15:15 +0100 Subject: arm_compute v17.05 --- LICENSE | 21 - README.md | 12 +- SConstruct | 30 +- arm_compute/core/CL/ICLTensor.h | 3 + arm_compute/core/CL/OpenCL.h | 5 + .../core/CL/kernels/CLGEMMInterleave4x4Kernel.h | 4 +- arm_compute/core/Helpers.h | 23 +- arm_compute/core/NEON/NEMath.h | 31 +- .../core/NEON/kernels/NEColorConvertKernel.h | 1 - arm_compute/core/NEON/kernels/NEHistogramKernel.h | 81 +- arm_compute/core/NEON/kernels/NELKTrackerKernel.h | 9 +- .../NEON/kernels/NENonMaximaSuppression3x3Kernel.h | 2 +- arm_compute/core/Types.h | 13 + arm_compute/runtime/CL/CLFunctions.h | 1 + arm_compute/runtime/CL/CLTensorAllocator.h | 10 +- .../runtime/CL/functions/CLGEMMInterleave4x4.h | 50 + .../CL/functions/CLNonMaximaSuppression3x3.h | 2 +- arm_compute/runtime/ITensorAllocator.h | 7 + arm_compute/runtime/NEON/functions/NEConvolution.h | 98 +- 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src/core/NEON/kernels/NEHOGDescriptorKernel.cpp | 165 +- src/core/NEON/kernels/NEHistogramKernel.cpp | 226 +-- src/core/NEON/kernels/NEIm2ColKernel.cpp | 57 +- src/core/NEON/kernels/NELKTrackerKernel.cpp | 39 +- .../kernels/NENonMaximaSuppression3x3Kernel.cpp | 42 +- .../NEON/kernels/NENormalizationLayerKernel.cpp | 2 +- src/core/NEON/kernels/NESoftmaxLayerKernel.cpp | 2 +- src/runtime/CL/CLTensorAllocator.cpp | 8 + src/runtime/CL/functions/CLGEMMInterleave4x4.cpp | 36 + src/runtime/NEON/functions/NEConvolution.cpp | 135 +- src/runtime/NEON/functions/NEConvolutionLayer.cpp | 23 +- src/runtime/NEON/functions/NEEqualizeHistogram.cpp | 25 +- src/runtime/NEON/functions/NEHistogram.cpp | 26 +- src/runtime/NEON/functions/NEOpticalFlow.cpp | 16 +- src/runtime/TensorAllocator.cpp | 8 + test_helpers/Utils.cpp | 4 +- test_helpers/Utils.h | 68 +- 1492 files changed, 11257 insertions(+), 11355 deletions(-) delete mode 100644 LICENSE create mode 100644 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create mode 100644 src/core/CL/OpenCL.cpp create mode 100644 src/runtime/CL/functions/CLGEMMInterleave4x4.cpp diff --git a/LICENSE b/LICENSE deleted file mode 100644 index 75c040b9a..000000000 --- a/LICENSE +++ /dev/null @@ -1,21 +0,0 @@ -MIT License - -Copyright (c) 2017 ARM Software - -Permission is hereby granted, free of charge, to any person obtaining a copy -of this software and associated documentation files (the "Software"), to deal -in the Software without restriction, including without limitation the rights -to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -copies of the Software, and to permit persons to whom the Software is -furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all -copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -SOFTWARE. diff --git a/README.md b/README.md index 1914d3679..d3a2aa5c1 100644 --- a/README.md +++ b/README.md @@ -1,9 +1,17 @@ Please report issues here: https://github.com/ARM-software/ComputeLibrary/issues -Documentation available here: [v17.04](https://arm-software.github.io/ComputeLibrary/v17.04/) [v17.03.1](https://arm-software.github.io/ComputeLibrary/v17.03.1/) +Documentation available here: -Binaries available here: [v17.04](https://github.com/ARM-software/ComputeLibrary/releases/download/v17.04/arm_compute-v17.04-bin.tar.gz) [v17.03.1](https://github.com/ARM-software/ComputeLibrary/releases/download/v17.03.1/arm_compute-v17.03.1-bin.tar.gz) +- [v17.05](https://arm-software.github.io/ComputeLibrary/v17.05/) +- [v17.04](https://arm-software.github.io/ComputeLibrary/v17.04/) +- [v17.03.1](https://arm-software.github.io/ComputeLibrary/v17.03.1/) + +Binaries available here: + +- [v17.05](https://github.com/ARM-software/ComputeLibrary/releases/download/v17.05/arm_compute-v17.05-bin.tar.gz) +- [v17.04](https://github.com/ARM-software/ComputeLibrary/releases/download/v17.04/arm_compute-v17.04-bin.tar.gz) +- [v17.03.1](https://github.com/ARM-software/ComputeLibrary/releases/download/v17.03.1/arm_compute-v17.03.1-bin.tar.gz) Support: developer@arm.com diff --git a/SConstruct b/SConstruct index 7a1caa32b..693ad68a3 100644 --- a/SConstruct +++ b/SConstruct @@ -20,4 +20,32 @@ # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. -SConscript('sconscript', variant_dir='build', duplicate=0) +import os + +vars = Variables("scons") +vars.AddVariables( + BoolVariable("debug", "Debug", False), + BoolVariable("asserts", "Enable asserts (this flag is forced to 1 for debug=1)", False), + EnumVariable("arch", "Target Architecture", "armv7a", allowed_values=("armv7a", "arm64-v8a", "arm64-v8.2-a", "x86_32", "x86_64")), + EnumVariable("os", "Target OS", "linux", allowed_values=("linux", "android", "bare_metal")), + EnumVariable("build", "Build type", "cross_compile", allowed_values=("native", "cross_compile")), + BoolVariable("Werror", "Enable/disable the -Werror compilation flag", True), + BoolVariable("opencl", "Enable OpenCL support", True), + BoolVariable("neon", "Enable Neon support", False), + BoolVariable("embed_kernels", "Embed OpenCL kernels in library binary", False), + BoolVariable("set_soname", "Set the library's soname and shlibversion (requires SCons 2.4 or above)", False), + BoolVariable("openmp", "Enable OpenMP backend", False), + BoolVariable("cppthreads", "Enable C++11 threads backend", True), + PathVariable("build_dir", "Specify sub-folder for the build", ".", PathVariable.PathIsDirCreate), + ("extra_cxx_flags", "Extra CXX flags to be appended to the build command", "") +) + +env = Environment(platform='posix', variables = vars, ENV = os.environ) + +Help(vars.GenerateHelpText(env)) + +Export('vars') +Export('env') + +if not GetOption("help"): + SConscript('sconscript', variant_dir='#build/%s/arm_compute' % env['build_dir'], duplicate=0) diff --git a/arm_compute/core/CL/ICLTensor.h b/arm_compute/core/CL/ICLTensor.h index 301f66667..abc013137 100644 --- a/arm_compute/core/CL/ICLTensor.h +++ b/arm_compute/core/CL/ICLTensor.h @@ -43,6 +43,9 @@ public: ICLTensor(); ICLTensor(const ICLTensor &) = delete; ICLTensor &operator=(const ICLTensor &) = delete; + ICLTensor(ICLTensor &&) = default; + ICLTensor &operator=(ICLTensor &&) = default; + virtual ~ICLTensor() = default; /** Interface to be implemented by the child class to return a reference to the OpenCL buffer containing the image's data. * diff --git a/arm_compute/core/CL/OpenCL.h b/arm_compute/core/CL/OpenCL.h index 9d39e5dfa..2fae35c97 100644 --- a/arm_compute/core/CL/OpenCL.h +++ b/arm_compute/core/CL/OpenCL.h @@ -35,4 +35,9 @@ namespace cl { static const NDRange Range_128_1 = NDRange(128, 1); } + +namespace arm_compute +{ +bool opencl_is_available(); +} #endif /* __ARM_COMPUTE_OPENCL_H__ */ diff --git a/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h b/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h index 498f9cf6e..3ac7b3c4f 100644 --- a/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h +++ b/arm_compute/core/CL/kernels/CLGEMMInterleave4x4Kernel.h @@ -47,7 +47,7 @@ class ICLTensor; * \end{array} \right) * @f] * - * After this operation, the output matrix will have the following shape: [ height * 4, width / 4 ] + * After this operation, the output matrix will have the following shape: [ height * 4, ceil(width / 4.0f) ] */ class CLGEMMInterleave4x4Kernel : public ICLKernel { @@ -64,7 +64,7 @@ public: CLGEMMInterleave4x4Kernel &operator=(CLGEMMInterleave4x4Kernel &&) = default; /** Initialise the kernel's input and output. * - * @param[in] input Input tensor. Data types supported: U8/F16/F32 + * @param[in] input Input tensor. Data types supported: U8/S8/U16/S16/F16/U32/S32/F32 * @param[out] output Output tensor. Data type supported: same as @p input */ void configure(const ICLTensor *input, ICLTensor *output); diff --git a/arm_compute/core/Helpers.h b/arm_compute/core/Helpers.h index 75684ce40..a84ce2c25 100644 --- a/arm_compute/core/Helpers.h +++ b/arm_compute/core/Helpers.h @@ -183,13 +183,26 @@ inline void for_each(F &&func, T &&arg, Ts &&... args) for_each(func, args...); } -/** Base case of foldl. Return value. */ +/** Base case of foldl. + * + * @return value. + */ template -inline T foldl(F &&, T &&value) +inline T foldl(F &&, const T &value) { return value; } +/** Base case of foldl. + * + * @return Function evaluation for value1 and value2 + */ +template +inline auto foldl(F &&func, T &&value1, U &&value2) -> decltype(func(value1, value2)) +{ + return func(value1, value2); +} + /** Fold left. * * @param[in] func Function to be called @@ -197,10 +210,10 @@ inline T foldl(F &&, T &&value) * @param[in] value Argument passed to the function * @param[in] values Remaining arguments */ -template -inline I foldl(F &&func, I &&initial, T &&value, Ts &&... values) +template +inline I foldl(F &&func, I &&initial, T &&value, Vs &&... values) { - return foldl(func, func(initial, value), values...); + return foldl(std::forward(func), func(std::forward(initial), std::forward(value)), std::forward(values)...); } } diff --git a/arm_compute/core/NEON/NEMath.h b/arm_compute/core/NEON/NEMath.h index bf27f116e..d40e0c32c 100644 --- a/arm_compute/core/NEON/NEMath.h +++ b/arm_compute/core/NEON/NEMath.h @@ -64,7 +64,7 @@ const std::array log_tab = * * @return The calculated inverse square root. */ -inline float32x4_t vinvsqrt_f32(float32x4_t x) +inline float32x4_t vinvsqrtq_f32(float32x4_t x) { float32x4_t sqrt_reciprocal = vrsqrteq_f32(x); sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); @@ -79,7 +79,7 @@ inline float32x4_t vinvsqrt_f32(float32x4_t x) * * @return The calculated reciprocal. */ -inline float32x4_t vinv_f32(const float32x4_t &x) +inline float32x4_t vinvq_f32(const float32x4_t &x) { float32x4_t recip = vrecpeq_f32(x); recip = vmulq_f32(vrecpsq_f32(x, recip), recip); @@ -94,7 +94,7 @@ inline float32x4_t vinv_f32(const float32x4_t &x) * * @return The calculated approximation. */ -inline float32x4_t vtaylor_poly_f32(const float32x4_t &x, const std::array &coeffs) +inline float32x4_t vtaylor_polyq_f32(const float32x4_t &x, const std::array &coeffs) { float32x4_t A = vmlaq_f32(coeffs[0], coeffs[4], x); float32x4_t B = vmlaq_f32(coeffs[2], coeffs[6], x); @@ -112,7 +112,7 @@ inline float32x4_t vtaylor_poly_f32(const float32x4_t &x, const std::array #include +#include #include namespace arm_compute @@ -100,6 +101,18 @@ struct ValidRegion { } + /** Return the start of the valid region for the given dimension @p d */ + int start(unsigned int d) const + { + return anchor[d]; + } + + /** Return the end of the valid region for the given dimension @p d */ + int end(unsigned int d) const + { + return anchor[d] + shape[d]; + } + Coordinates anchor; TensorShape shape; }; diff --git a/arm_compute/runtime/CL/CLFunctions.h b/arm_compute/runtime/CL/CLFunctions.h index 51f93f521..d16354f36 100644 --- a/arm_compute/runtime/CL/CLFunctions.h +++ b/arm_compute/runtime/CL/CLFunctions.h @@ -50,6 +50,7 @@ #include "arm_compute/runtime/CL/functions/CLFillBorder.h" #include "arm_compute/runtime/CL/functions/CLFullyConnectedLayer.h" #include "arm_compute/runtime/CL/functions/CLGEMM.h" +#include "arm_compute/runtime/CL/functions/CLGEMMInterleave4x4.h" #include "arm_compute/runtime/CL/functions/CLGEMMLowp.h" #include "arm_compute/runtime/CL/functions/CLGaussian3x3.h" #include "arm_compute/runtime/CL/functions/CLGaussian5x5.h" diff --git a/arm_compute/runtime/CL/CLTensorAllocator.h b/arm_compute/runtime/CL/CLTensorAllocator.h index a9fe207f6..ed371e064 100644 --- a/arm_compute/runtime/CL/CLTensorAllocator.h +++ b/arm_compute/runtime/CL/CLTensorAllocator.h @@ -71,13 +71,21 @@ public: * @param[in] mapping The cpu mapping to unmap. */ void unmap(cl::CommandQueue &q, uint8_t *mapping); + /** Allocate size specified by TensorInfo of OpenCL memory. * * @note: The tensor must not already be allocated when calling this function. * - * */ + */ void allocate() override; + /** Free allocated OpenCL memory. + * + * @note The tensor must have been allocated when calling this function. + * + */ + void free() override; + protected: /** Call map() on the OpenCL buffer. * diff --git a/arm_compute/runtime/CL/functions/CLGEMMInterleave4x4.h b/arm_compute/runtime/CL/functions/CLGEMMInterleave4x4.h new file mode 100644 index 000000000..b80136b32 --- /dev/null +++ b/arm_compute/runtime/CL/functions/CLGEMMInterleave4x4.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2017 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_CLGEMMINTERLEAVE4X4_H__ +#define __ARM_COMPUTE_CLGEMMINTERLEAVE4X4_H__ + +#include "arm_compute/runtime/CL/ICLSimpleFunction.h" + +namespace arm_compute +{ +class ITensor; + +/** Basic function to execute CLGEMMInterleave4x4Kernel. This function calls the following OpenCL kernel: + * + * -# @ref CLGEMMInterleave4x4Kernel + * + */ +class CLGEMMInterleave4x4 : public ICLSimpleFunction +{ +public: + /** Initialise the kernel's inputs, output + * + * @param[in] input First input tensor. Data types supported: U8/S8/U16/S16/F16/U32/S32/F32 + * @param[out] output Output tensor. Data type supported: same as @p input + */ + void configure(const ICLTensor *input, ICLTensor *output); +}; +} + +#endif /* __ARM_COMPUTE_CLGEMMINTERLEAVE4X4_H__ */ \ No newline at end of file diff --git a/arm_compute/runtime/CL/functions/CLNonMaximaSuppression3x3.h b/arm_compute/runtime/CL/functions/CLNonMaximaSuppression3x3.h index ebb32ed21..7adced431 100644 --- a/arm_compute/runtime/CL/functions/CLNonMaximaSuppression3x3.h +++ b/arm_compute/runtime/CL/functions/CLNonMaximaSuppression3x3.h @@ -45,7 +45,7 @@ public: * The constant values used with CONSTANT border mode is 0 * * @param[in,out] input Source tensor. Data types supported: U8, F32. (Written to only for @p border_mode != UNDEFINED) - * @param[out] output Destination for the Non-Maxima suppressions 3x3. Data types supported: U8, F32. Must be the same data type as @p input. + * @param[out] output Destination for the Non-Maxima suppressions 3x3. Data types supported: same as @p input. * @param[in] border_mode Border mode to use for non-maxima suppression. * The implementation supports just 2 border modes: UNDEFINED and CONSTANT */ diff --git a/arm_compute/runtime/ITensorAllocator.h b/arm_compute/runtime/ITensorAllocator.h index a246634c8..6103e436b 100644 --- a/arm_compute/runtime/ITensorAllocator.h +++ b/arm_compute/runtime/ITensorAllocator.h @@ -63,6 +63,7 @@ public: * @return Constant reference to the tensor's metadata. */ const TensorInfo &info() const; + /** Interface to be implemented by the child class to allocate the tensor. * * @note The child is expected to use the TensorInfo to get the size of the memory allocation. @@ -70,6 +71,12 @@ public: */ virtual void allocate() = 0; + /** Interface to be implemented by the child class to free the allocated tensor. + * + * @warning The tensor must have been allocated previously. Otherwise calling the function will fail. + */ + virtual void free() = 0; + protected: /** Interface to be implemented by the child class to lock the memory allocation for the CPU to access. * diff --git a/arm_compute/runtime/NEON/functions/NEConvolution.h b/arm_compute/runtime/NEON/functions/NEConvolution.h index 7127dee9f..5c809774e 100644 --- a/arm_compute/runtime/NEON/functions/NEConvolution.h +++ b/arm_compute/runtime/NEON/functions/NEConvolution.h @@ -58,18 +58,19 @@ public: void configure(ITensor *input, ITensor *output, const int16_t *conv, uint32_t scale, BorderMode border_mode, uint8_t constant_border_value = 0); }; -/** Basic function to execute convolution of size 5x5. This function calls the following NEON kernels: +/** Basic function to execute convolution of size 5x5, 7x7, 9x9. This function calls the following NEON kernels: * * -# @ref NEFillBorderKernel (executed if border_mode == CONSTANT or border_mode == REPLICATE) - * -# @ref NEConvolution5x5Kernel or
- * @ref NESeparableConvolution5x5HorKernel and @ref NESeparableConvolution5x5VertKernel (if convolution matrix is separable) + * -# @ref NEConvolutionKernel or
+ * @ref NESeparableConvolutionHorKernel and @ref NESeparableConvolutionVertKernel (if convolution matrix is separable) * */ -class NEConvolution5x5 : public IFunction +template +class NEConvolutionSquare : public IFunction { public: /** Default constructor */ - NEConvolution5x5(); + NEConvolutionSquare(); /** Initialize the function's source, destination, conv and border_mode. * * @param[in,out] input Source tensor. Data type supported: U8. (Written to only for @p border_mode != UNDEFINED) @@ -85,83 +86,20 @@ public: void run() override; private: - Tensor _tmp; /**< temporary buffer for output of horizontal pass */ - bool _is_separable; /**< true if the convolution can be separated */ - NESeparableConvolution5x5HorKernel _kernel_hor; /**< kernel for horizontal pass of separated convolution */ - NESeparableConvolution5x5VertKernel _kernel_vert; /**< kernel for vertical pass of separated convolution */ - NEConvolution5x5Kernel _kernel; /**< kernel for non-separated convolution **/ - NEFillBorderKernel _border_handler; /**< kernel for border handling */ + Tensor _tmp; /**< temporary buffer for output of horizontal pass */ + bool _is_separable; /**< true if the convolution can be separated */ + NESeparableConvolutionHorKernel _kernel_hor; /**< kernel for horizontal pass of separated convolution */ + NESeparableConvolutionVertKernel _kernel_vert; /**< kernel for vertical pass of separated convolution */ + NEConvolutionKernel _kernel; /**< kernel for non-separated convolution **/ + NEFillBorderKernel _border_handler; /**< kernel for border handling */ }; -/** Basic function to execute convolution of size 7x7. This function calls the following NEON kernels: - * - * -# @ref NEFillBorderKernel (executed if border_mode == CONSTANT or border_mode == REPLICATE) - * -# @ref NEConvolution7x7Kernel or
- * @ref NESeparableConvolution7x7HorKernel and @ref NESeparableConvolution7x7VertKernel (if convolution matrix is separable) - * - */ -class NEConvolution7x7 : public IFunction -{ -public: - /** Default constructor */ - NEConvolution7x7(); - /** Initialize the function's source, destination, conv and border_mode. - * - * @param[in,out] input Source tensor. Data type supported: U8. (Written to only for @p border_mode != UNDEFINED) - * @param[out] output Destination tensor, Data types supported: U8 or S16. - * @param[in] conv matrix_size x matrix_size S16 coefficients structured as a row-major 2D array in a linear buffer. - * @param[in] scale Scale of the convolution matrix. If 0 is passed, it will be set to the sum of the coefficients of the convolution or 1 if they add up to 0. - * @param[in] border_mode Strategy to use for borders. - * @param[in] constant_border_value (Optional) Constant value to use for borders if border_mode is set to CONSTANT. - */ - void configure(ITensor *input, ITensor *output, const int16_t *conv, uint32_t scale, BorderMode border_mode, uint8_t constant_border_value = 0); - - // Inherited methods overridden: - void run() override; - -private: - Tensor _tmp; /**< temporary buffer for output of horizontal pass */ - bool _is_separable; /**< true if the convolution can be separated */ - NESeparableConvolution7x7HorKernel _kernel_hor; /**< kernel for horizontal pass of separated convolution */ - NESeparableConvolution7x7VertKernel _kernel_vert; /**< kernel for vertical pass of separated convolution */ - NEConvolution7x7Kernel _kernel; /**< kernel for non-separated convolution **/ - NEFillBorderKernel _border_handler; /**< kernel for border handling */ -}; - -/** Basic function to execute convolution of size 9x9. This function calls the following NEON kernels: - * - * -# @ref NEFillBorderKernel (executed if border_mode == CONSTANT or border_mode == REPLICATE) - * -# @ref NEConvolution9x9Kernel or
- * @ref NESeparableConvolution9x9HorKernel and @ref NESeparableConvolution9x9VertKernel (if convolution matrix is separable) - * - */ -class NEConvolution9x9 : public IFunction -{ -public: - /** Default constructor */ - NEConvolution9x9(); - /** Initialize the function's source, destination, conv and border_mode. - * - * @param[in,out] input Source tensor. Data type supported: U8. (Written to only for @p border_mode != UNDEFINED) - * @param[out] output Destination tensor, Data types supported: U8 or S16. - * @param[in] conv matrix_size x matrix_size S16 coefficients structured as a row-major 2D array in a linear buffer. - * @param[in] scale Scale of the convolution matrix. If 0 is passed, it will be set to the sum of the coefficients of the convolution or 1 if they add up to 0. - * @param[in] border_mode Strategy to use for borders. - * @param[in] constant_border_value (Optional) Constant value to use for borders if border_mode is set to CONSTANT. - */ - void configure(ITensor *input, ITensor *output, const int16_t *conv, uint32_t scale, BorderMode border_mode, uint8_t constant_border_value = 0); - - // Inherited methods overridden: - void run() override; - -private: - Tensor _tmp; /**< temporary buffer for output of horizontal pass */ - bool _is_separable; /**< true if the convolution can be separated */ - NESeparableConvolution9x9HorKernel _kernel_hor; /**< kernel for horizontal pass of separated convolution */ - NESeparableConvolution9x9VertKernel _kernel_vert; /**< kernel for vertical pass of separated convolution */ - NEConvolution9x9Kernel _kernel; /**< kernel for non-separated convolution **/ - NEFillBorderKernel _border_handler; /**< kernel for border handling */ -}; +/** Basic function to run 5x5 convolution. */ +using NEConvolution5x5 = NEConvolutionSquare<5>; +/** Basic function to run 7x7 convolution. */ +using NEConvolution7x7 = NEConvolutionSquare<7>; +/** Basic function to run 9x9 convolution. */ +using NEConvolution9x9 = NEConvolutionSquare<9>; /** Basic function to execute non-square convolution. This function calls the following NEON kernels: * diff --git a/arm_compute/runtime/NEON/functions/NEEqualizeHistogram.h b/arm_compute/runtime/NEON/functions/NEEqualizeHistogram.h index 241523318..6cf800848 100644 --- a/arm_compute/runtime/NEON/functions/NEEqualizeHistogram.h +++ b/arm_compute/runtime/NEON/functions/NEEqualizeHistogram.h @@ -64,17 +64,14 @@ public: private: NEHistogramKernel _histogram_kernel; /**< Kernel that calculates the histogram of input. */ - NEHistogramBorderKernel _border_histogram_kernel; /**< Kernel that calculates the histogram on the borders. */ NECumulativeDistributionKernel _cd_histogram_kernel; /**< Kernel that calculates the cumulative distribution - and creates the relevant LookupTable. */ + and creates the relevant LookupTable. */ NETableLookupKernel _map_histogram_kernel; /**< Kernel that maps the input to output using the lut. */ Distribution1D _hist; /**< Distribution that holds the histogram of the input image. */ Distribution1D _cum_dist; /**< Distribution that holds the cummulative distribution of the input histogram. */ Lut _cd_lut; /**< Holds the equalization lookuptable. */ - bool _run_border_hist; /**< Boolean that specifies if a separate histogram kernel has to run on the borders */ -private: - static constexpr uint32_t nr_bins{ 256 }; /**< Histogram bins of the internal histograms. */ - static constexpr uint32_t max_range{ nr_bins - 1 }; /**< Histogram range of the internal histograms. */ + static constexpr uint32_t nr_bins{ 256 }; /**< Histogram bins of the internal histograms. */ + static constexpr uint32_t max_range{ nr_bins - 1 }; /**< Histogram range of the internal histograms. */ }; } #endif /*__ARM_COMPUTE_NEEQUALIZEHISTOGRAM_H__ */ diff --git a/arm_compute/runtime/NEON/functions/NEHistogram.h b/arm_compute/runtime/NEON/functions/NEHistogram.h index 105a38ace..c24510dcb 100644 --- a/arm_compute/runtime/NEON/functions/NEHistogram.h +++ b/arm_compute/runtime/NEON/functions/NEHistogram.h @@ -35,20 +35,13 @@ namespace arm_compute { class IDistribution1D; -/** Basic function to execute histogram. This function calls the following NEON kernels: - * - * -# @ref NEHistogramKernel - * -# @ref NEHistogramBorderKernel - * - */ +/** Basic function to run @ref NEHistogramKernel. */ class NEHistogram : public IFunction { public: /** Default Constructor. */ NEHistogram(); /** Initialise the kernel's inputs. - * - * @note Currently the width of the input image must be a multiple of 16. * * @param[in] input Input image. Data type supported: U8. * @param[out] output Output distribution. @@ -60,11 +53,9 @@ public: private: NEHistogramKernel _histogram_kernel; - NEHistogramBorderKernel _border_histogram_kernel; std::unique_ptr _local_hist; std::unique_ptr _window_lut; size_t _local_hist_size; - bool _run_border_hist; /** 256 possible pixel values as we handle only U8 images */ static constexpr unsigned int window_lut_default_size = 256; }; diff --git a/arm_compute/runtime/NEON/functions/NENonMaximaSuppression3x3.h b/arm_compute/runtime/NEON/functions/NENonMaximaSuppression3x3.h index d86ef2815..06e4f0850 100644 --- a/arm_compute/runtime/NEON/functions/NENonMaximaSuppression3x3.h +++ b/arm_compute/runtime/NEON/functions/NENonMaximaSuppression3x3.h @@ -45,8 +45,8 @@ public: * @note The implementation supports just 2 border modes: UNDEFINED and CONSTANT * The constant values used with CONSTANT border mode is 0 * - * @param[in, out] input Source tensor. Data type supported: F32. (Written to only for @p border_mode != UNDEFINED) - * @param[out] output Destination for the Non-Maxima suppressions 3x3. Data type supported: F32. + * @param[in, out] input Source tensor. Data type supported: U8, F32. (Written to only for @p border_mode != UNDEFINED) + * @param[out] output Destination for the Non-Maxima suppressions 3x3. Data type supported: same as @p input * @param[in] border_mode Border mode to use for non-maxima suppression. The implementation supports just 2 border modes: UNDEFINED and CONSTANT * */ diff --git a/arm_compute/runtime/NEON/functions/NEOpticalFlow.h b/arm_compute/runtime/NEON/functions/NEOpticalFlow.h index 4b7c4038f..0534551d1 100644 --- a/arm_compute/runtime/NEON/functions/NEOpticalFlow.h +++ b/arm_compute/runtime/NEON/functions/NEOpticalFlow.h @@ -89,7 +89,7 @@ private: const IKeyPointArray *_old_points; LKInternalKeypointArray _new_points_internal; LKInternalKeypointArray _old_points_internal; - size_t _num_levels; + unsigned int _num_levels; }; } #endif /*__ARM_COMPUTE_NEOPTICALFLOW_H__ */ diff --git a/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h b/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h index a457f961b..c67b667d8 100644 --- a/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h +++ b/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h @@ -36,7 +36,7 @@ class ITensor; /** Basic function to compute a SoftmaxLayer. * * Softmax is calculated by : - * @f[ out = exp(x - max(x)) / sum(exp(x - max(x))) @f] + * @f[ out = \frac{e^{x - max(x)}}{\sum{e^{x - max(x)}}} @f] * * This function runs the following kernels: * -# @ref NELogits1DMaxKernel diff --git a/arm_compute/runtime/TensorAllocator.h b/arm_compute/runtime/TensorAllocator.h index cd7aabff3..450323b3a 100644 --- a/arm_compute/runtime/TensorAllocator.h +++ b/arm_compute/runtime/TensorAllocator.h @@ -63,9 +63,16 @@ public: * * @note The tensor must not already be allocated when calling this function. * - **/ + */ void allocate() override; + /** Free allocated CPU memory. + * + * @note The tensor must have been allocated when calling this function. + * + */ + void free() override; + protected: /** No-op for CPU memory * diff --git a/docs/Doxyfile b/docs/Doxyfile index b78ea3013..a305e5d67 100644 --- a/docs/Doxyfile +++ b/docs/Doxyfile @@ -38,7 +38,7 @@ PROJECT_NAME = "ARM Compute Library" # could be handy for archiving the generated documentation or if some version # control system is used. -PROJECT_NUMBER = 17.04 +PROJECT_NUMBER = 17.05 # Using the PROJECT_BRIEF tag one can provide an optional one line description # for a project that appears at the top of each page and should give viewer a diff --git a/docs/arm_compute.dox b/docs/arm_compute.dox index 45799b268..354bc3f5b 100644 --- a/docs/arm_compute.dox +++ b/docs/arm_compute.dox @@ -107,6 +107,13 @@ If there is more than one release in a month then an extra sequential number is @subsection S2_2_changelog Changelog +v17.05 Public bug fixes release + - Various bug fixes + - Remaining of the functions ported to use accurate padding. + - Library does not link against OpenCL anymore (It uses dlopen / dlsym at runtime instead to determine whether or not OpenCL is available). + - Added "free" method to allocator. + - Minimum version of G++ required for armv7 Linux changed from 4.8 to 4.9 + v17.04 Public bug fixes release The following functions have been ported to use the new accurate padding: - @ref CLColorConvertKernel @@ -231,10 +238,6 @@ To see the build options available simply run ```scons -h```: default: 0 actual: 0 - scheduler: Scheduler backend(Default=cpp) (cpp|pthread|openmp) - default: cpp - actual: cpp - set_soname: Set the library's soname and shlibversion (Requires SCons 2.4 or above) (yes|no) default: 0 actual: False @@ -276,7 +279,11 @@ extra_cxx_flags: Custom CXX flags which will be appended to the end of the build @subsubsection S3_2_1_library How to build the library ? -For Linux, the library was successfully built and tested using the following Linaro GCC toolchain: gcc-linaro-arm-linux-gnueabihf-4.8-2014.02_linux and gcc-linaro-6.1.1-2016.08-x86_64_arm-linux-gnueabihf +For Linux, the library was successfully built and tested using the following Linaro GCC toolchain: + + - gcc-linaro-arm-linux-gnueabihf-4.9-2014.07_linux + - gcc-linaro-4.9-2016.02-x86_64_aarch64-linux-gnu + - gcc-linaro-6.3.1-2017.02-i686_aarch64-linux-gnu @note If you are building with opencl=1 then scons will expect to find libOpenCL.so either in the current directory or in "build" (See the section below if you need a stub OpenCL library to link against) @@ -313,24 +320,43 @@ or simply remove the build parameter as build=cross_compile is the default value The examples get automatically built by scons as part of the build process of the library described above. This section just describes how you can build and link your own application against our library. -@note The following command lines assume the arm_compute binaries are present in the current directory or in the system library path. +@note The following command lines assume the arm_compute and libOpenCL binaries are present in the current directory or in the system library path. If this is not the case you can specify the location of the pre-built library with the compiler option -L. When building the OpenCL example the commands below assume that the CL headers are located in the include folder where the command is executed. -To cross compile a NEON example: +To cross compile a NEON example for Linux 32bit: - arm-linux-gnueabihf-g++ examples/neon_convolution.cpp test_helpers/Utils.cpp -I. -Iinclude -std=c++11 -mfpu=neon -L. -larm_compute -o neon_convolution + arm-linux-gnueabihf-g++ examples/neon_convolution.cpp test_helpers/Utils.cpp -I. -std=c++11 -mfpu=neon -L. -larm_compute -o neon_convolution -To cross compile an OpenCL example: +To cross compile a NEON example for Linux 64bit: + + aarch64-linux-gnu-g++ examples/neon_convolution.cpp test_helpers/Utils.cpp -I. -std=c++11 -L. -larm_compute -o neon_convolution + +(notice the only difference with the 32 bit command is that we don't need the -mfpu option and the compiler's name is different) + +To cross compile an OpenCL example for Linux 32bit: arm-linux-gnueabihf-g++ examples/cl_convolution.cpp test_helpers/Utils.cpp -I. -Iinclude -std=c++11 -mfpu=neon -L. -larm_compute -lOpenCL -o cl_convolution -To compile natively (i.e directly on an ARM device) for NEON: +To cross compile an OpenCL example for Linux 64bit: + + aarch64-linux-gnu-g++ examples/cl_convolution.cpp test_helpers/Utils.cpp -I. -Iinclude -std=c++11 -L. -larm_compute -lOpenCL -o cl_convolution - g++ examples/neon_convolution.cpp test_helpers/Utils.cpp -I. -Iinclude -std=c++11 -mfpu=neon -larm_compute -o neon_convolution +(notice the only difference with the 32 bit command is that we don't need the -mfpu option and the compiler's name is different) -To compile natively (i.e directly on an ARM device) for OpenCL: +To compile natively (i.e directly on an ARM device) for NEON for Linux 32bit: + + g++ examples/neon_convolution.cpp test_helpers/Utils.cpp -I. -std=c++11 -mfpu=neon -larm_compute -o neon_convolution + +To compile natively (i.e directly on an ARM device) for NEON for Linux 64bit: + + g++ examples/neon_convolution.cpp test_helpers/Utils.cpp -I. -std=c++11 -larm_compute -o neon_convolution + +(notice the only difference with the 32 bit command is that we don't need the -mfpu option) + +To compile natively (i.e directly on an ARM device) for OpenCL for Linux 32bit or Linux 64bit: g++ examples/cl_convolution.cpp test_helpers/Utils.cpp -I. -Iinclude -std=c++11 -larm_compute -lOpenCL -o cl_convolution + @note These two commands assume libarm_compute.so is available in your library path, if not add the path to it using -L To run the built executable simply run: @@ -644,17 +670,6 @@ Another case is: if a kernel processes 8 pixels per iteration then if the image' In order to know which pixels have been calculated, each kernel sets a valid region for each output image or tensor. See also @ref TensorInfo::valid_region(), @ref ValidRegion -@attention Valid regions and accurate padding have only been introduced in the library recently therefore not all the kernels and functions have been ported to use them yet. All the non ported kernels will set the @ref ValidRegion equal to the @ref TensorShape. - -List of kernels which haven't been ported yet: - -- @ref NEColorConvertKernel -- @ref NEHistogramKernel -- @ref NEHistogramBorderKernel -- @ref NEHOGBlockNormalizationKernel -- @ref NEHOGOrientationBinningKernel -- @ref NELKTrackerKernel - @subsubsection S4_6_2_tensors Tensors Tensors are multi-dimensional arrays made of up to @ref Coordinates::num_max_dimensions dimensions. diff --git a/documentation/_access_window_auto_padding_8h.xhtml b/documentation/_access_window_auto_padding_8h.xhtml index 76a3261c1..6aa125f2d 100644 --- a/documentation/_access_window_auto_padding_8h.xhtml +++ b/documentation/_access_window_auto_padding_8h.xhtml @@ -40,7 +40,7 @@
ARM Compute Library -  17.04 +  17.05
@@ -143,7 +143,7 @@ Namespaces
-Go to the documentation of this file.
1 /*
2  * Copyright (c) 2017 ARM Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in all
14  * copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 #ifndef __ARM_COMPUTE_ACCESS_WINDOW_AUTO_PADDING_H__
25 #define __ARM_COMPUTE_ACCESS_WINDOW_AUTO_PADDING_H__
26 
30 #include "arm_compute/core/Types.h"
31 
32 namespace arm_compute
33 {
34 class Window;
35 class TensorInfo;
36 
48 {
49 public:
59  ~AccessWindowAutoPadding() = default;
60 
62  void set_valid_region();
63 
66 
67  // Inherited methods overridden:
68  bool update_window_if_needed(Window &window) const override;
69  bool update_padding_if_needed(const Window &window) const override;
70  ValidRegion compute_valid_region(const Window &window, ValidRegion input_valid_region, bool border_undefined, BorderSize border_size) const override;
71 
72 private:
73  TensorInfo *_info;
74 };
75 } // namespace arm_compute
76 #endif /*__ARM_COMPUTE_ACCESS_WINDOW_AUTO_PADDING_H__*/
Container for 2D border size.
Definition: Types.h:116
+Go to the documentation of this file.
1 /*
2  * Copyright (c) 2017 ARM Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in all
14  * copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 #ifndef __ARM_COMPUTE_ACCESS_WINDOW_AUTO_PADDING_H__
25 #define __ARM_COMPUTE_ACCESS_WINDOW_AUTO_PADDING_H__
26 
30 #include "arm_compute/core/Types.h"
31 
32 namespace arm_compute
33 {
34 class Window;
35 class TensorInfo;
36 
48 {
49 public:
59  ~AccessWindowAutoPadding() = default;
60 
62  void set_valid_region();
63 
66 
67  // Inherited methods overridden:
68  bool update_window_if_needed(Window &window) const override;
69  bool update_padding_if_needed(const Window &window) const override;
70  ValidRegion compute_valid_region(const Window &window, ValidRegion input_valid_region, bool border_undefined, BorderSize border_size) const override;
71 
72 private:
73  TensorInfo *_info;
74 };
75 } // namespace arm_compute
76 #endif /*__ARM_COMPUTE_ACCESS_WINDOW_AUTO_PADDING_H__*/
Container for 2D border size.
Definition: Types.h:129
AccessWindowAutoPadding(TensorInfo *info)
Default constructor.
@@ -128,7 +128,7 @@ $(document).ready(function(){initNavTree('_access_window_auto_padding_8h_source.
ValidRegion compute_valid_region() const
Return a valid region that spans across the entire tensor.
Store the tensor&#39;s metadata.
Definition: TensorInfo.h:40
- +
void set_valid_region()
Set the valid region to match the entire tensor.
Describe a multidimensional execution window.
Definition: Window.h:39
@@ -140,7 +140,7 @@ $(document).ready(function(){initNavTree('_access_window_auto_padding_8h_source.