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-rw-r--r--include/spirv/unified1/spirv.bf3
-rw-r--r--include/spirv/unified1/spirv.core.grammar.json20
-rw-r--r--include/spirv/unified1/spirv.cs3
-rw-r--r--include/spirv/unified1/spirv.h3
-rw-r--r--include/spirv/unified1/spirv.hpp3
-rw-r--r--include/spirv/unified1/spirv.hpp113
-rw-r--r--include/spirv/unified1/spirv.json3
-rw-r--r--include/spirv/unified1/spirv.lua3
-rw-r--r--include/spirv/unified1/spirv.py3
-rw-r--r--include/spirv/unified1/spv.d3
10 files changed, 47 insertions, 0 deletions
diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
index ae17120..935d46f 100644
--- a/include/spirv/unified1/spirv.bf
+++ b/include/spirv/unified1/spirv.bf
@@ -575,6 +575,8 @@ namespace Spv
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ LatencyControlLabelINTEL = 6172,
+ LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
RegisterMapKernelArgumentINTEL = 6176,
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1147,6 +1149,7 @@ namespace Spv
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
}
diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index 3e4f81e..eb8b702 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -12518,6 +12518,20 @@
"version" : "None"
},
{
+ "enumerant" : "LatencyControlLabelINTEL",
+ "value" : 6172,
+ "capabilities" : [ "FPGALatencyControlINTEL" ],
+ "extensions" : [ "SPV_INTEL_fpga_latency_control" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "LatencyControlConstraintINTEL",
+ "value" : 6173,
+ "capabilities" : [ "FPGALatencyControlINTEL" ],
+ "extensions" : [ "SPV_INTEL_fpga_latency_control" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "ConduitKernelArgumentINTEL",
"value" : 6175,
"capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
@@ -14894,6 +14908,12 @@
"version" : "None"
},
{
+ "enumerant" : "FPGALatencyControlINTEL",
+ "value" : 6171,
+ "extensions" : [ "SPV_INTEL_fpga_latency_control" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "FPGAArgumentInterfacesINTEL",
"value" : 6174,
"extensions" : [ "SPV_INTEL_fpga_argument_interfaces" ],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index 4f203a9..4bb9c5d 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -574,6 +574,8 @@ namespace Spv
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ LatencyControlLabelINTEL = 6172,
+ LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
RegisterMapKernelArgumentINTEL = 6176,
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1146,6 +1148,7 @@ namespace Spv
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
}
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index f6b77ae..adc9502 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -580,6 +580,8 @@ typedef enum SpvDecoration_ {
SpvDecorationSingleElementVectorINTEL = 6085,
SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
SpvDecorationMediaBlockIOINTEL = 6140,
+ SpvDecorationLatencyControlLabelINTEL = 6172,
+ SpvDecorationLatencyControlConstraintINTEL = 6173,
SpvDecorationConduitKernelArgumentINTEL = 6175,
SpvDecorationRegisterMapKernelArgumentINTEL = 6176,
SpvDecorationMMHostInterfaceAddressWidthINTEL = 6177,
@@ -1146,6 +1148,7 @@ typedef enum SpvCapability_ {
SpvCapabilityAtomicFloat16AddEXT = 6095,
SpvCapabilityDebugInfoModuleINTEL = 6114,
SpvCapabilitySplitBarrierINTEL = 6141,
+ SpvCapabilityFPGALatencyControlINTEL = 6171,
SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
SpvCapabilityGroupUniformArithmeticKHR = 6400,
SpvCapabilityMax = 0x7fffffff,
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index 1a901db..55fded6 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -576,6 +576,8 @@ enum Decoration {
DecorationSingleElementVectorINTEL = 6085,
DecorationVectorComputeCallableFunctionINTEL = 6087,
DecorationMediaBlockIOINTEL = 6140,
+ DecorationLatencyControlLabelINTEL = 6172,
+ DecorationLatencyControlConstraintINTEL = 6173,
DecorationConduitKernelArgumentINTEL = 6175,
DecorationRegisterMapKernelArgumentINTEL = 6176,
DecorationMMHostInterfaceAddressWidthINTEL = 6177,
@@ -1142,6 +1144,7 @@ enum Capability {
CapabilityAtomicFloat16AddEXT = 6095,
CapabilityDebugInfoModuleINTEL = 6114,
CapabilitySplitBarrierINTEL = 6141,
+ CapabilityFPGALatencyControlINTEL = 6171,
CapabilityFPGAArgumentInterfacesINTEL = 6174,
CapabilityGroupUniformArithmeticKHR = 6400,
CapabilityMax = 0x7fffffff,
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index b7d041a..dd0d97d 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -576,6 +576,8 @@ enum class Decoration : unsigned {
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ LatencyControlLabelINTEL = 6172,
+ LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
RegisterMapKernelArgumentINTEL = 6176,
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1142,6 +1144,7 @@ enum class Capability : unsigned {
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
Max = 0x7fffffff,
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index 06e3a90..0fa270a 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -602,6 +602,8 @@
"SingleElementVectorINTEL": 6085,
"VectorComputeCallableFunctionINTEL": 6087,
"MediaBlockIOINTEL": 6140,
+ "LatencyControlLabelINTEL": 6172,
+ "LatencyControlConstraintINTEL": 6173,
"ConduitKernelArgumentINTEL": 6175,
"RegisterMapKernelArgumentINTEL": 6176,
"MMHostInterfaceAddressWidthINTEL": 6177,
@@ -1122,6 +1124,7 @@
"AtomicFloat16AddEXT": 6095,
"DebugInfoModuleINTEL": 6114,
"SplitBarrierINTEL": 6141,
+ "FPGALatencyControlINTEL": 6171,
"FPGAArgumentInterfacesINTEL": 6174,
"GroupUniformArithmeticKHR": 6400
}
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index 42e295f..9804bde 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -549,6 +549,8 @@ spv = {
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ LatencyControlLabelINTEL = 6172,
+ LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
RegisterMapKernelArgumentINTEL = 6176,
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1104,6 +1106,7 @@ spv = {
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
},
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index f032cc9..b11dc76 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -549,6 +549,8 @@ spv = {
'SingleElementVectorINTEL' : 6085,
'VectorComputeCallableFunctionINTEL' : 6087,
'MediaBlockIOINTEL' : 6140,
+ 'LatencyControlLabelINTEL' : 6172,
+ 'LatencyControlConstraintINTEL' : 6173,
'ConduitKernelArgumentINTEL' : 6175,
'RegisterMapKernelArgumentINTEL' : 6176,
'MMHostInterfaceAddressWidthINTEL' : 6177,
@@ -1104,6 +1106,7 @@ spv = {
'AtomicFloat16AddEXT' : 6095,
'DebugInfoModuleINTEL' : 6114,
'SplitBarrierINTEL' : 6141,
+ 'FPGALatencyControlINTEL' : 6171,
'FPGAArgumentInterfacesINTEL' : 6174,
'GroupUniformArithmeticKHR' : 6400,
},
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index 9a79c2f..c31fdef 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -577,6 +577,8 @@ enum Decoration : uint
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ LatencyControlLabelINTEL = 6172,
+ LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
RegisterMapKernelArgumentINTEL = 6176,
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1149,6 +1151,7 @@ enum Capability : uint
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-25 12:52:41 +0000