move FPGAKernelAttributesv2INTEL to capability section in all files

10 files changed, 16 insertions, 16 deletions

diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
index 9d945f1..946e236 100644
--- a/include/spirv/unified1/spirv.bf
+++ b/include/spirv/unified1/spirv.bf
@@ -194,7 +194,6 @@ namespace Spv
             SchedulerTargetFmaxMhzINTEL = 5903,
             StreamingInterfaceINTEL = 6154,
             RegisterMapInterfaceINTEL = 6160,
-            FPGAKernelAttributesv2INTEL = 6161,
             NamedBarrierCountINTEL = 6417,
         }
 
@@ -1149,6 +1148,7 @@ namespace Spv
             AtomicFloat16AddEXT = 6095,
             DebugInfoModuleINTEL = 6114,
             SplitBarrierINTEL = 6141,
+            FPGAKernelAttributesv2INTEL = 6161,
             FPGAArgumentInterfacesINTEL = 6174,
             GroupUniformArithmeticKHR = 6400,
         }
diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index 1b0899d..5ab884e 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -10725,13 +10725,6 @@
           "version" : "None"
         },
         {
-          "enumerant" : "FPGAKernelAttributesv2INTEL",
-          "value" : 6161,
-          "capabilities" : [ "FPGAKernelAttributesINTEL" ],
-          "extensions" : [ "SPV_INTEL_kernel_attributes" ],
-          "version" : "None"
-        },
-        {
           "enumerant" : "NamedBarrierCountINTEL",
           "value" : 6417,
           "parameters" : [
@@ -14910,6 +14903,13 @@
           "version" : "None"
         },
         {
+          "enumerant" : "FPGAKernelAttributesv2INTEL",
+          "value" : 6161,
+          "capabilities" : [ "FPGAKernelAttributesINTEL" ],
+          "extensions" : [ "SPV_INTEL_kernel_attributes" ],
+          "version" : "None"
+        },
+        {
           "enumerant" : "FPGAArgumentInterfacesINTEL",
           "value" : 6174,
           "extensions" : [ "SPV_INTEL_fpga_argument_interfaces" ],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index 93fab95..d30c0fe 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -193,7 +193,6 @@ namespace Spv
             SchedulerTargetFmaxMhzINTEL = 5903,
             StreamingInterfaceINTEL = 6154,
             RegisterMapInterfaceINTEL = 6160,
-            FPGAKernelAttributesv2INTEL = 6161,
             NamedBarrierCountINTEL = 6417,
         }
 
@@ -1148,6 +1147,7 @@ namespace Spv
             AtomicFloat16AddEXT = 6095,
             DebugInfoModuleINTEL = 6114,
             SplitBarrierINTEL = 6141,
+            FPGAKernelAttributesv2INTEL = 6161,
             FPGAArgumentInterfacesINTEL = 6174,
             GroupUniformArithmeticKHR = 6400,
         }
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index b974886..d7d1ec0 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -201,7 +201,6 @@ typedef enum SpvExecutionMode_ {
     SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
     SpvExecutionModeStreamingInterfaceINTEL = 6154,
     SpvExecutionModeRegisterMapInterfaceINTEL = 6160,
-    SpvExecutionModeFPGAKernelAttributesv2INTEL = 6161,
     SpvExecutionModeNamedBarrierCountINTEL = 6417,
     SpvExecutionModeMax = 0x7fffffff,
 } SpvExecutionMode;
@@ -1148,6 +1147,7 @@ typedef enum SpvCapability_ {
     SpvCapabilityAtomicFloat16AddEXT = 6095,
     SpvCapabilityDebugInfoModuleINTEL = 6114,
     SpvCapabilitySplitBarrierINTEL = 6141,
+    SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
     SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
     SpvCapabilityGroupUniformArithmeticKHR = 6400,
     SpvCapabilityMax = 0x7fffffff,
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index 9ba30b3..2036ede 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -197,7 +197,6 @@ enum ExecutionMode {
     ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
     ExecutionModeStreamingInterfaceINTEL = 6154,
     ExecutionModeRegisterMapInterfaceINTEL = 6160,
-    ExecutionModeFPGAKernelAttributesv2INTEL = 6161,
     ExecutionModeNamedBarrierCountINTEL = 6417,
     ExecutionModeMax = 0x7fffffff,
 };
@@ -1144,6 +1143,7 @@ enum Capability {
     CapabilityAtomicFloat16AddEXT = 6095,
     CapabilityDebugInfoModuleINTEL = 6114,
     CapabilitySplitBarrierINTEL = 6141,
+    CapabilityFPGAKernelAttributesv2INTEL = 6161,
     CapabilityFPGAArgumentInterfacesINTEL = 6174,
     CapabilityGroupUniformArithmeticKHR = 6400,
     CapabilityMax = 0x7fffffff,
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index 9791d5b..9cebc8d 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -197,7 +197,6 @@ enum class ExecutionMode : unsigned {
     SchedulerTargetFmaxMhzINTEL = 5903,
     StreamingInterfaceINTEL = 6154,
     RegisterMapInterfaceINTEL = 6160,
-    FPGAKernelAttributesv2INTEL = 6161,
     NamedBarrierCountINTEL = 6417,
     Max = 0x7fffffff,
 };
@@ -1144,6 +1143,7 @@ enum class Capability : unsigned {
     AtomicFloat16AddEXT = 6095,
     DebugInfoModuleINTEL = 6114,
     SplitBarrierINTEL = 6141,
+    FPGAKernelAttributesv2INTEL = 6161,
     FPGAArgumentInterfacesINTEL = 6174,
     GroupUniformArithmeticKHR = 6400,
     Max = 0x7fffffff,
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index 0c8d4cb..b4b1233 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -216,7 +216,6 @@
                     "SchedulerTargetFmaxMhzINTEL": 5903,
                     "StreamingInterfaceINTEL": 6154,
                     "RegisterMapInterfaceINTEL": 6160,
-                    "FPGAKernelAttributesv2INTEL": 6161,
                     "NamedBarrierCountINTEL": 6417
                 }
             },
@@ -1124,6 +1123,7 @@
                     "AtomicFloat16AddEXT": 6095,
                     "DebugInfoModuleINTEL": 6114,
                     "SplitBarrierINTEL": 6141,
+                    "FPGAKernelAttributesv2INTEL": 6161,
                     "FPGAArgumentInterfacesINTEL": 6174,
                     "GroupUniformArithmeticKHR": 6400
                 }
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index 6ac654d..388dee0 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -184,7 +184,6 @@ spv = {
         SchedulerTargetFmaxMhzINTEL = 5903,
         StreamingInterfaceINTEL = 6154,
         RegisterMapInterfaceINTEL = 6160,
-        FPGAKernelAttributesv2INTEL = 6161,
         NamedBarrierCountINTEL = 6417,
     },
 
@@ -1106,6 +1105,7 @@ spv = {
         AtomicFloat16AddEXT = 6095,
         DebugInfoModuleINTEL = 6114,
         SplitBarrierINTEL = 6141,
+        FPGAKernelAttributesv2INTEL = 6161,
         FPGAArgumentInterfacesINTEL = 6174,
         GroupUniformArithmeticKHR = 6400,
     },
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index c0a6819..3dd21f2 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -184,7 +184,6 @@ spv = {
         'SchedulerTargetFmaxMhzINTEL' : 5903,
         'StreamingInterfaceINTEL' : 6154,
         'RegisterMapInterfaceINTEL' : 6160,
-        'FPGAKernelAttributesv2INTEL' : 6161,
         'NamedBarrierCountINTEL' : 6417,
     },
 
@@ -1106,6 +1105,7 @@ spv = {
         'AtomicFloat16AddEXT' : 6095,
         'DebugInfoModuleINTEL' : 6114,
         'SplitBarrierINTEL' : 6141,
+        'FPGAKernelAttributesv2INTEL' : 6161,
         'FPGAArgumentInterfacesINTEL' : 6174,
         'GroupUniformArithmeticKHR' : 6400,
     },
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index ff075fb..04e84cd 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -196,7 +196,6 @@ enum ExecutionMode : uint
     SchedulerTargetFmaxMhzINTEL = 5903,
     StreamingInterfaceINTEL = 6154,
     RegisterMapInterfaceINTEL = 6160,
-    FPGAKernelAttributesv2INTEL = 6161,
     NamedBarrierCountINTEL = 6417,
 }
 
@@ -1151,6 +1150,7 @@ enum Capability : uint
     AtomicFloat16AddEXT = 6095,
     DebugInfoModuleINTEL = 6114,
     SplitBarrierINTEL = 6141,
+    FPGAKernelAttributesv2INTEL = 6161,
     FPGAArgumentInterfacesINTEL = 6174,
     GroupUniformArithmeticKHR = 6400,
 }