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author | Sidorov, Dmitry <dmitry.sidorov@intel.com> | 2022-10-17 07:29:14 -0700 |
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committer | Sidorov, Dmitry <dmitry.sidorov@intel.com> | 2022-10-17 07:29:14 -0700 |
commit | 23d4c8e5eaf90da965df87f54d559f9f6988a795 (patch) | |
tree | 3fed14877838c459ffd656da6c3cfb56cec45bbe /include/spirv | |
parent | 48d4b677a9bd28af33987580badcbe98ddbaa001 (diff) | |
download | SPIRV-Headers-23d4c8e5eaf90da965df87f54d559f9f6988a795.tar.gz SPIRV-Headers-23d4c8e5eaf90da965df87f54d559f9f6988a795.tar.bz2 SPIRV-Headers-23d4c8e5eaf90da965df87f54d559f9f6988a795.zip |
Add SPV_INTEL_runtime_aligned
Spec:
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_runtime_aligned.asciidoc
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Diffstat (limited to 'include/spirv')
-rw-r--r-- | include/spirv/unified1/spirv.bf | 2 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.core.grammar.json | 11 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.cs | 2 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.h | 2 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.hpp | 2 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.hpp11 | 2 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.json | 4 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.lua | 2 | ||||
-rw-r--r-- | include/spirv/unified1/spirv.py | 2 | ||||
-rw-r--r-- | include/spirv/unified1/spv.d | 2 |
10 files changed, 30 insertions, 1 deletions
diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf index 3b53ebe..0d6741a 100644 --- a/include/spirv/unified1/spirv.bf +++ b/include/spirv/unified1/spirv.bf @@ -451,6 +451,7 @@ namespace Spv NoCapture = 5, NoWrite = 6, NoReadWrite = 7, + RuntimeAlignedINTEL = 5940, } [AllowDuplicates, CRepr] public enum Decoration @@ -1111,6 +1112,7 @@ namespace Spv FPGABufferLocationINTEL = 5920, ArbitraryPrecisionFixedPointINTEL = 5922, USMStorageClassesINTEL = 5935, + RuntimeAlignedAttributeINTEL = 5939, IOPipesINTEL = 5943, BlockingPipesINTEL = 5945, FPGARegINTEL = 5948, diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json index d17c9c0..5837262 100644 --- a/include/spirv/unified1/spirv.core.grammar.json +++ b/include/spirv/unified1/spirv.core.grammar.json @@ -11201,6 +11201,11 @@ "enumerant" : "NoReadWrite", "value" : 7, "capabilities" : [ "Kernel" ] + }, + { + "enumerant" : "RuntimeAlignedINTEL", + "value" : 5940, + "capabilities" : [ "RuntimeAlignedAttributeINTEL" ] } ] }, @@ -14215,6 +14220,12 @@ "version" : "None" }, { + "enumerant" : "RuntimeAlignedAttributeINTEL", + "value" : 5939, + "extensions" : [ "SPV_INTEL_runtime_aligned" ], + "version" : "None" + }, + { "enumerant" : "IOPipesINTEL", "value" : 5943, "extensions" : [ "SPV_INTEL_io_pipes" ], diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs index 864ca2d..192bc61 100644 --- a/include/spirv/unified1/spirv.cs +++ b/include/spirv/unified1/spirv.cs @@ -450,6 +450,7 @@ namespace Spv NoCapture = 5, NoWrite = 6, NoReadWrite = 7, + RuntimeAlignedINTEL = 5940, } public enum Decoration @@ -1110,6 +1111,7 @@ namespace Spv FPGABufferLocationINTEL = 5920, ArbitraryPrecisionFixedPointINTEL = 5922, USMStorageClassesINTEL = 5935, + RuntimeAlignedAttributeINTEL = 5939, IOPipesINTEL = 5943, BlockingPipesINTEL = 5945, FPGARegINTEL = 5948, diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h index 120553e..234b8a3 100644 --- a/include/spirv/unified1/spirv.h +++ b/include/spirv/unified1/spirv.h @@ -456,6 +456,7 @@ typedef enum SpvFunctionParameterAttribute_ { SpvFunctionParameterAttributeNoCapture = 5, SpvFunctionParameterAttributeNoWrite = 6, SpvFunctionParameterAttributeNoReadWrite = 7, + SpvFunctionParameterAttributeRuntimeAlignedINTEL = 5940, SpvFunctionParameterAttributeMax = 0x7fffffff, } SpvFunctionParameterAttribute; @@ -1110,6 +1111,7 @@ typedef enum SpvCapability_ { SpvCapabilityFPGABufferLocationINTEL = 5920, SpvCapabilityArbitraryPrecisionFixedPointINTEL = 5922, SpvCapabilityUSMStorageClassesINTEL = 5935, + SpvCapabilityRuntimeAlignedAttributeINTEL = 5939, SpvCapabilityIOPipesINTEL = 5943, SpvCapabilityBlockingPipesINTEL = 5945, SpvCapabilityFPGARegINTEL = 5948, diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp index 77da34d..ef7d122 100644 --- a/include/spirv/unified1/spirv.hpp +++ b/include/spirv/unified1/spirv.hpp @@ -452,6 +452,7 @@ enum FunctionParameterAttribute { FunctionParameterAttributeNoCapture = 5, FunctionParameterAttributeNoWrite = 6, FunctionParameterAttributeNoReadWrite = 7, + FunctionParameterAttributeRuntimeAlignedINTEL = 5940, FunctionParameterAttributeMax = 0x7fffffff, }; @@ -1106,6 +1107,7 @@ enum Capability { CapabilityFPGABufferLocationINTEL = 5920, CapabilityArbitraryPrecisionFixedPointINTEL = 5922, CapabilityUSMStorageClassesINTEL = 5935, + CapabilityRuntimeAlignedAttributeINTEL = 5939, CapabilityIOPipesINTEL = 5943, CapabilityBlockingPipesINTEL = 5945, CapabilityFPGARegINTEL = 5948, diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11 index a9881a5..ab4d211 100644 --- a/include/spirv/unified1/spirv.hpp11 +++ b/include/spirv/unified1/spirv.hpp11 @@ -452,6 +452,7 @@ enum class FunctionParameterAttribute : unsigned { NoCapture = 5, NoWrite = 6, NoReadWrite = 7, + RuntimeAlignedINTEL = 5940, Max = 0x7fffffff, }; @@ -1106,6 +1107,7 @@ enum class Capability : unsigned { FPGABufferLocationINTEL = 5920, ArbitraryPrecisionFixedPointINTEL = 5922, USMStorageClassesINTEL = 5935, + RuntimeAlignedAttributeINTEL = 5939, IOPipesINTEL = 5943, BlockingPipesINTEL = 5945, FPGARegINTEL = 5948, diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json index a62f017..5f79390 100644 --- a/include/spirv/unified1/spirv.json +++ b/include/spirv/unified1/spirv.json @@ -474,7 +474,8 @@ "NoAlias": 4, "NoCapture": 5, "NoWrite": 6, - "NoReadWrite": 7 + "NoReadWrite": 7, + "RuntimeAlignedINTEL": 5940 } }, { @@ -1086,6 +1087,7 @@ "FPGABufferLocationINTEL": 5920, "ArbitraryPrecisionFixedPointINTEL": 5922, "USMStorageClassesINTEL": 5935, + "RuntimeAlignedAttributeINTEL": 5939, "IOPipesINTEL": 5943, "BlockingPipesINTEL": 5945, "FPGARegINTEL": 5948, diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua index c744b54..385b94b 100644 --- a/include/spirv/unified1/spirv.lua +++ b/include/spirv/unified1/spirv.lua @@ -426,6 +426,7 @@ spv = { NoCapture = 5, NoWrite = 6, NoReadWrite = 7, + RuntimeAlignedINTEL = 5940, }, Decoration = { @@ -1068,6 +1069,7 @@ spv = { FPGABufferLocationINTEL = 5920, ArbitraryPrecisionFixedPointINTEL = 5922, USMStorageClassesINTEL = 5935, + RuntimeAlignedAttributeINTEL = 5939, IOPipesINTEL = 5943, BlockingPipesINTEL = 5945, FPGARegINTEL = 5948, diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py index 81e411c..642ffee 100644 --- a/include/spirv/unified1/spirv.py +++ b/include/spirv/unified1/spirv.py @@ -426,6 +426,7 @@ spv = { 'NoCapture' : 5, 'NoWrite' : 6, 'NoReadWrite' : 7, + 'RuntimeAlignedINTEL' : 5940, }, 'Decoration' : { @@ -1068,6 +1069,7 @@ spv = { 'FPGABufferLocationINTEL' : 5920, 'ArbitraryPrecisionFixedPointINTEL' : 5922, 'USMStorageClassesINTEL' : 5935, + 'RuntimeAlignedAttributeINTEL' : 5939, 'IOPipesINTEL' : 5943, 'BlockingPipesINTEL' : 5945, 'FPGARegINTEL' : 5948, diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d index b4dd8b2..c73acb3 100644 --- a/include/spirv/unified1/spv.d +++ b/include/spirv/unified1/spv.d @@ -453,6 +453,7 @@ enum FunctionParameterAttribute : uint NoCapture = 5, NoWrite = 6, NoReadWrite = 7, + RuntimeAlignedINTEL = 5940, } enum Decoration : uint @@ -1113,6 +1114,7 @@ enum Capability : uint FPGABufferLocationINTEL = 5920, ArbitraryPrecisionFixedPointINTEL = 5922, USMStorageClassesINTEL = 5935, + RuntimeAlignedAttributeINTEL = 5939, IOPipesINTEL = 5943, BlockingPipesINTEL = 5945, FPGARegINTEL = 5948, |