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| author | Ben Ashbaugh <ben.ashbaugh@intel.com> | 2022-02-12 18:14:08 -0800 |
|---|---|---|
| committer | Ben Ashbaugh <ben.ashbaugh@intel.com> | 2022-02-12 18:14:08 -0800 |
| commit | ed206e3817d070ae64f56119b10b418c250aa208 (patch) | |
| tree | 844083ad8af552541e2b13be9fe3d042e2a1c6ff /include/spirv/unified1/spirv.hpp | |
| parent | 6a55fade62dec6a406a5a721148f88a2211cbefa (diff) | |
| download | SPIRV-Headers-ed206e3817d070ae64f56119b10b418c250aa208.tar.gz SPIRV-Headers-ed206e3817d070ae64f56119b10b418c250aa208.tar.bz2 SPIRV-Headers-ed206e3817d070ae64f56119b10b418c250aa208.zip | |
update SPIR-V headers for SPV_INTEL_split_barrier
Diffstat (limited to 'include/spirv/unified1/spirv.hpp')
| -rw-r--r-- | include/spirv/unified1/spirv.hpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp index 97a5101..a016d7d 100644 --- a/include/spirv/unified1/spirv.hpp +++ b/include/spirv/unified1/spirv.hpp @@ -1083,6 +1083,7 @@ enum Capability { CapabilityOptNoneINTEL = 6094, CapabilityAtomicFloat16AddEXT = 6095, CapabilityDebugInfoModuleINTEL = 6114, + CapabilitySplitBarrierINTEL = 6141, CapabilityMax = 0x7fffffff, }; @@ -1845,6 +1846,8 @@ enum Op { OpTypeStructContinuedINTEL = 6090, OpConstantCompositeContinuedINTEL = 6091, OpSpecConstantCompositeContinuedINTEL = 6092, + OpControlBarrierArriveINTEL = 6142, + OpControlBarrierWaitINTEL = 6143, OpMax = 0x7fffffff, }; @@ -2499,6 +2502,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { case OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; case OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; case OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; + case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; + case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; } } #endif /* SPV_ENABLE_UTILITY_CODE */ |