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authorBen Ashbaugh <ben.ashbaugh@intel.com>2023-07-19 08:43:23 -0700
committerGitHub <noreply@github.com>2023-07-19 08:43:23 -0700
commit88d56db61c3a53451a4299b5a6811fb9a994eb32 (patch)
tree1ee1839a95c5440ee69bdffa2305e706ed1fbbff /include/spirv/unified1/spirv.hpp11
parentf1ba373ef03752ee9f6f2b898bea1213f93e1ef2 (diff)
parent3ca8d522a1490db1a240aa092c629e546690ade7 (diff)
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Merge pull request #348 from asudarsa/asudarsa/add_fp_max_error_support
Add support for fp_max_error extension
Diffstat (limited to 'include/spirv/unified1/spirv.hpp11')
-rw-r--r--include/spirv/unified1/spirv.hpp112
1 files changed, 2 insertions, 0 deletions
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index 2cfc7e0..bdb6939 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -589,6 +589,7 @@ enum class Decoration : unsigned {
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ FPMaxErrorDecorationINTEL = 6170,
LatencyControlLabelINTEL = 6172,
LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
@@ -1169,6 +1170,7 @@ enum class Capability : unsigned {
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
FPGAKernelAttributesv2INTEL = 6161,
+ FPMaxErrorINTEL = 6169,
FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,