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author | Arvind Sudarsanam <arvind.sudarsanam@intel.com> | 2023-03-08 09:46:03 -0800 |
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committer | Arvind Sudarsanam <arvind.sudarsanam@intel.com> | 2023-03-08 09:46:03 -0800 |
commit | d9d7078e3b8106dba28b5d36e19da3e0f7737d6a (patch) | |
tree | ed11313c2369a4364533d46bce10466c284bd562 /include/spirv/unified1/spirv.h | |
parent | f46e295b2062a4e185ba48b0c493415ea3720718 (diff) | |
parent | 1feaf4414eb2b353764d01d88f8aa4bcc67b60db (diff) | |
download | SPIRV-Headers-d9d7078e3b8106dba28b5d36e19da3e0f7737d6a.tar.gz SPIRV-Headers-d9d7078e3b8106dba28b5d36e19da3e0f7737d6a.tar.bz2 SPIRV-Headers-d9d7078e3b8106dba28b5d36e19da3e0f7737d6a.zip |
Merge remote-tracking branch 'real-origin/main' into asudarsa/add_fp_max_error_support
Diffstat (limited to 'include/spirv/unified1/spirv.h')
-rw-r--r-- | include/spirv/unified1/spirv.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h index bb0fa79..e9ba5fb 100644 --- a/include/spirv/unified1/spirv.h +++ b/include/spirv/unified1/spirv.h @@ -200,6 +200,7 @@ typedef enum SpvExecutionMode_ { SpvExecutionModeNumSIMDWorkitemsINTEL = 5896, SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903, SpvExecutionModeStreamingInterfaceINTEL = 6154, + SpvExecutionModeRegisterMapInterfaceINTEL = 6160, SpvExecutionModeNamedBarrierCountINTEL = 6417, SpvExecutionModeMax = 0x7fffffff, } SpvExecutionMode; @@ -512,6 +513,8 @@ typedef enum SpvDecoration_ { SpvDecorationMaxByteOffsetId = 47, SpvDecorationNoSignedWrap = 4469, SpvDecorationNoUnsignedWrap = 4470, + SpvDecorationWeightTextureQCOM = 4487, + SpvDecorationBlockMatchTextureQCOM = 4488, SpvDecorationExplicitInterpAMD = 4999, SpvDecorationOverrideCoverageNV = 5248, SpvDecorationPassthroughNV = 5250, @@ -581,6 +584,8 @@ typedef enum SpvDecoration_ { SpvDecorationVectorComputeCallableFunctionINTEL = 6087, SpvDecorationMediaBlockIOINTEL = 6140, SpvDecorationFPMaxErrorINTEL = 6170, + SpvDecorationLatencyControlLabelINTEL = 6172, + SpvDecorationLatencyControlConstraintINTEL = 6173, SpvDecorationConduitKernelArgumentINTEL = 6175, SpvDecorationRegisterMapKernelArgumentINTEL = 6176, SpvDecorationMMHostInterfaceAddressWidthINTEL = 6177, @@ -1019,6 +1024,9 @@ typedef enum SpvCapability_ { SpvCapabilityRayQueryKHR = 4472, SpvCapabilityRayTraversalPrimitiveCullingKHR = 4478, SpvCapabilityRayTracingKHR = 4479, + SpvCapabilityTextureSampleWeightedQCOM = 4484, + SpvCapabilityTextureBoxFilterQCOM = 4485, + SpvCapabilityTextureBlockMatchQCOM = 4486, SpvCapabilityFloat16ImageAMD = 5008, SpvCapabilityImageGatherBiasLodAMD = 5009, SpvCapabilityFragmentMaskAMD = 5010, @@ -1146,8 +1154,11 @@ typedef enum SpvCapability_ { SpvCapabilityOptNoneINTEL = 6094, SpvCapabilityAtomicFloat16AddEXT = 6095, SpvCapabilityDebugInfoModuleINTEL = 6114, + SpvCapabilityBFloat16ConversionINTEL = 6115, SpvCapabilitySplitBarrierINTEL = 6141, + SpvCapabilityFPGAKernelAttributesv2INTEL = 6161, SpvCapabilityFPMaxErrorDecorationINTEL = 6169, + SpvCapabilityFPGALatencyControlINTEL = 6171, SpvCapabilityFPGAArgumentInterfacesINTEL = 6174, SpvCapabilityGroupUniformArithmeticKHR = 6400, SpvCapabilityMax = 0x7fffffff, @@ -1633,6 +1644,10 @@ typedef enum SpvOp_ { SpvOpRayQueryConfirmIntersectionKHR = 4476, SpvOpRayQueryProceedKHR = 4477, SpvOpRayQueryGetIntersectionTypeKHR = 4479, + SpvOpImageSampleWeightedQCOM = 4480, + SpvOpImageBoxFilterQCOM = 4481, + SpvOpImageBlockMatchSSDQCOM = 4482, + SpvOpImageBlockMatchSADQCOM = 4483, SpvOpGroupIAddNonUniformAMD = 5000, SpvOpGroupFAddNonUniformAMD = 5001, SpvOpGroupFMinNonUniformAMD = 5002, @@ -1950,6 +1965,8 @@ typedef enum SpvOp_ { SpvOpTypeStructContinuedINTEL = 6090, SpvOpConstantCompositeContinuedINTEL = 6091, SpvOpSpecConstantCompositeContinuedINTEL = 6092, + SpvOpConvertFToBF16INTEL = 6116, + SpvOpConvertBF16ToFINTEL = 6117, SpvOpControlBarrierArriveINTEL = 6142, SpvOpControlBarrierWaitINTEL = 6143, SpvOpGroupIMulKHR = 6401, @@ -2341,6 +2358,10 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy case SpvOpRayQueryConfirmIntersectionKHR: *hasResult = false; *hasResultType = false; break; case SpvOpRayQueryProceedKHR: *hasResult = true; *hasResultType = true; break; case SpvOpRayQueryGetIntersectionTypeKHR: *hasResult = true; *hasResultType = true; break; + case SpvOpImageSampleWeightedQCOM: *hasResult = true; *hasResultType = true; break; + case SpvOpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break; + case SpvOpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break; + case SpvOpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break; case SpvOpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; case SpvOpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break; case SpvOpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break; @@ -2653,6 +2674,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy case SpvOpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break; case SpvOpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break; + case SpvOpConvertFToBF16INTEL: *hasResult = true; *hasResultType = true; break; + case SpvOpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break; case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break; case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break; case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; |