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authorArvind Sudarsanam <arvind.sudarsanam@intel.com>2023-03-02 12:11:36 -0800
committerArvind Sudarsanam <arvind.sudarsanam@intel.com>2023-03-02 12:11:36 -0800
commitafe1c65aad838aa0a821e573905b7f6ebb4ab99d (patch)
tree095c78e301e73b20481286e1c1e2bec56994b6d6 /include/spirv/unified1/spirv.cs
parentaa331ab0ffcb3a67021caa1a0c1c9017712f2f31 (diff)
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Add support for SPV_INTEL_fpga_latency_control extension
Signed-off-by: Arvind Sudarsanam <arvind.sudarsanam@intel.com>
Diffstat (limited to 'include/spirv/unified1/spirv.cs')
-rw-r--r--include/spirv/unified1/spirv.cs3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index 4f203a9..4bb9c5d 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -574,6 +574,8 @@ namespace Spv
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ LatencyControlLabelINTEL = 6172,
+ LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
RegisterMapKernelArgumentINTEL = 6176,
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1146,6 +1148,7 @@ namespace Spv
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
}