1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Freescale Semiconductor, Inc.
* Copyright (C) 2015 ECA Sinters
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
* Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
*/
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <malloc.h>
#include <mmc.h>
#include <fsl_esdhc_imx.h>
#include <miiphy.h>
#include <netdev.h>
#include <asm/arch/mxc_hdmi.h>
#include <asm/arch/crm_regs.h>
#include <linux/fb.h>
#include <ipu_pixfmt.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <i2c.h>
#include "../common/mx6.h"
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
return 0;
}
int board_early_init_f(void)
{
seco_mx6_setup_uart_iomux();
return 0;
}
int board_phy_config(struct phy_device *phydev)
{
seco_mx6_rgmii_rework(phydev);
if (phydev->drv->config)
phydev->drv->config(phydev);
return 0;
}
int board_eth_init(bd_t *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
struct phy_device *phydev = NULL;
int ret = 0;
seco_mx6_setup_enet_iomux();
#ifdef CONFIG_FEC_MXC
bus = fec_get_miibus(base, -1);
if (!bus)
return -ENOMEM;
/* scan phy 4,5,6,7 */
phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
free(bus);
return -ENOMEM;
}
printf("using phy at %d\n", phydev->addr);
ret = fec_probe(bis, -1, base, bus, phydev);
if (ret) {
free(phydev);
free(bus);
printf("FEC MXC: %s:failed\n", __func__);
}
#endif
return ret;
}
#define USDHC4_CD_GPIO IMX_GPIO_NR(2, 6)
static struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC3_BASE_ADDR, 0, 4},
{USDHC4_BASE_ADDR, 0, 4},
};
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
int ret = 0;
switch (cfg->esdhc_base) {
case USDHC3_BASE_ADDR:
ret = 1; /* Assume eMMC is always present */
break;
case USDHC4_BASE_ADDR:
ret = !gpio_get_value(USDHC4_CD_GPIO);
break;
}
return ret;
}
int board_mmc_init(bd_t *bis)
{
u32 index = 0;
int ret;
/*
* Following map is done:
* (U-Boot device node) (Physical Port)
* mmc0 eMMC on Board
* mmc1 Ext SD
*/
for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
switch (index) {
case 0:
seco_mx6_setup_usdhc_iomux(3);
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
break;
case 1:
seco_mx6_setup_usdhc_iomux(4);
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
break;
default:
printf("Warning: %d exceed maximum number of SD ports %d\n",
index + 1, CONFIG_SYS_FSL_USDHC_NUM);
return -EINVAL;
}
ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
if (ret)
return ret;
}
return 0;
}
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D4__GPIO2_IO04 |
MUX_PAD_CTRL(NO_PAD_CTRL));
gpio_direction_output(IMX_GPIO_NR(2, 4), 0);
/* Set Low */
gpio_set_value(IMX_GPIO_NR(2, 4), 0);
udelay(1000);
/* Set High */
gpio_set_value(IMX_GPIO_NR(2, 4), 1);
return 0;
}
int checkboard(void)
{
puts("Board: SECO uQ7\n");
return 0;
}
|
