blob: 9d8e43e394269883bec2883bb1e0e94334473419 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2017 Andes Technology Corporation
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
#ifndef __ASM_RISCV_SYSTEM_H
#define __ASM_RISCV_SYSTEM_H
struct event;
/*
* Interrupt configuring macros.
*
* TODO
*
*/
/* Hook to set up the CPU (called from SPL too) */
int riscv_cpu_setup(void *ctx, struct event *event);
#endif /* __ASM_RISCV_SYSTEM_H */
|