From 8bf3b005ddee3eee179ec961e1c2bd0693e3b79d Mon Sep 17 00:00:00 2001 From: wdenk Date: Sat, 6 Dec 2003 23:20:41 +0000 Subject: * Patches by Stephan Linz, 3 Nov 2003: - more endianess fixes for LAN91C111 driver - CFG_HZ configuration patch for NIOS Cyclone board * Patch by Stephan Linz, 28 Oct 2003: fix PHY_INT_REG vs. PHY_MASK_REG bug in drivers/smc91111.c * Patch by Steven Scholz, 20 Oct 2003: - make "mii info " show infor for PHY at "addr" only - Endian fix for miiphy_info() --- common/miiphyutil.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) (limited to 'common/miiphyutil.c') diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 75c2df5cae..af8c7c7a31 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -47,19 +47,15 @@ int miiphy_info (unsigned char addr, unsigned char *model, unsigned char *rev) { unsigned int reg = 0; + unsigned short tmp; - /* - * Trick: we are reading two 16 registers into a 32 bit variable - * so we do a 16 read into the high order bits of the variable (big - * endian, you know), shift it down 16 bits, and the read the rest. - */ - if (miiphy_read (addr, PHY_PHYIDR2, (unsigned short *) ®) != 0) { + if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) { #ifdef DEBUG printf ("PHY ID register 2 read failed\n"); #endif return (-1); } - reg >>= 16; + reg = tmp; #ifdef DEBUG printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg); @@ -69,12 +65,13 @@ int miiphy_info (unsigned char addr, return (-1); } - if (miiphy_read (addr, PHY_PHYIDR1, (unsigned short *) ®) != 0) { + if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) { #ifdef DEBUG printf ("PHY ID register 1 read failed\n"); #endif return (-1); } + reg |= tmp << 16; #ifdef DEBUG printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); #endif -- cgit v1.2.3