From 9f074e67f5a2131336ff1838f2a82e0c2e15d33c Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Wed, 29 Oct 2014 22:33:09 +0530 Subject: powerpc/mpc85xx:Put errata number for T104x NAND boot issue When device is configured to load RCW from NAND flash IFC_A[16:31] are driven low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using IFC_A[16:31] lines are not accessible. Workaround is already in-place. Put the errata number to adhere errata handling framework. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- board/freescale/t104xrdb/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index 3822a37738..75d9d9c5fa 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -34,12 +34,12 @@ unsigned long get_board_ddr_clk(void) void board_init_f(ulong bootflag) { u32 plat_ratio, sys_clk, uart_clk; -#ifdef CONFIG_SPL_NAND_BOOT +#if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND) u32 porsr1, pinctl; #endif ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; -#ifdef CONFIG_SPL_NAND_BOOT +#if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND) /* * There is T1040 SoC issue where NOR, FPGA are inaccessible during * NAND boot because IFC signals > IFC_AD7 are not enabled. -- cgit v1.2.3