From e4c3ce7e2845d75dc1696b2875bb632993a9c51c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 14 Dec 2021 13:36:39 -0500 Subject: CONFIG_SYS_CLK_FREQ: Consistently be static or get_board_sys_clk() This CONFIG option is used in one of two ways. The first way is that it is defined to a static value, of an unsigned long size. The second way is that it is defined to something, typically a function, to determine this value at run time. However, in a few cases that function returns a static value. Change that to using the static value directly. In the case of using something at run time, convert everything to using a function of the same name and prototype. This will allow for further cleanups. Finally, we have a few cases where the function is just not used, so drop it. Signed-off-by: Tom Rini --- board/cadence/xtfpga/xtfpga.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'board/cadence') diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c index c26793d76c..d30940d7c3 100644 --- a/board/cadence/xtfpga/xtfpga.c +++ b/board/cadence/xtfpga/xtfpga.c @@ -49,7 +49,7 @@ int checkboard(void) return 0; } -int board_postclk_init(void) +unsigned long get_board_sys_clk(void) { /* * Obtain CPU clock frequency from board and cache in global @@ -58,11 +58,17 @@ int board_postclk_init(void) */ #ifdef CONFIG_SYS_FPGAREG_FREQ - gd->cpu_clk = (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ); + return (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ); #else /* early Tensilica bitstreams lack this reg, but most run at 50 MHz */ - gd->cpu_clk = 50000000UL; + return 50000000; #endif +} + +int board_postclk_init(void) +{ + gd->cpu_clk = get_board_sys_clk(); + return 0; } -- cgit v1.2.3