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2009-09-05Add support for the DevKit8000 boardFrederik Kriewitz1-0/+307
This patch adds support for the DevKit8000 board. Signed-off-by: Frederik Kriewitz <frederik@kriewitz.eu>
2009-09-01Support for the Calao TNY-A9260/TNY-A9G20 boardsAlbin Tonnerre1-0/+172
The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by Calao Systems <http://www.calao-systems.com>. Their components are very similar to the AT91SAM9260EK board, so their configuration is based on the configuration of this board. There are however some differences: different clocks, no LCD, no ethernet. They also can use SPI EEPROM to store the environment. Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-09-01arm: Kirkwood: add SYSRSTn Duration Counter SupportPrafulla Wadaskar1-0/+2
This feature can be used to trigger special command "sysrstcmd" using reset key long press event and environment variable "sysrstdelay" is set (useful for reset to factory or manufacturing mode execution) Kirkwood SoC implements a hardware-based SYSRSTn duration counter. When SYSRSTn is asserted low, a SYSRSTn duration counter is running. The counter value is stored in the SYSRSTn Length Counter Register The counter is based on the 25-MHz reference clock (40ns) It is a 29-bit counter, yielding a maximum counting duration of 2^29/25 MHz (21.4 seconds). When the counter reach its maximum value, it remains at this value until counter reset is triggered by setting bit 31 of KW_REG_SYSRST_CNT Implementation: Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be executed if pre-defined in environment variables. This feature will be disabled if "sysrstdelay" variable is unset. for-ex. setenv sysrst_cmd "echo starting factory reset; nand erase 0xa0000 0x20000; echo finish ed sysrst command;" will erase particular nand sector if triggered by this event Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-09-01Add support for the Calao SBC35-A9G20 boardAlbin Tonnerre1-0/+194
The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems <http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND flash, two USB host ports, and an USB device port. More informations can be found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936> Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
2009-09-01imx27lite: add support for imx27lite board from LogicPDIlya Yanok2-0/+264
This patch adds support for i.MX27-LITEKIT development board from LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND flash, FEC ethernet controller integrated into i.MX27. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Wolfgang Denk <wd@denx.de>
2009-09-01Remove duplicate set_crSimon Kagstrom1-30/+0
Remove duplicate set_cr set_cr is defined in both asm-arm/proc-armv/system.h and include/asm-arm/system.h. This patch removes it (and some duplicate defines) from the former. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-08-31Merge branch 'next' of ../nextWolfgang Denk62-134/+1280
2009-08-2885xx: Added PCIe support for P1 P2 RDBPoonam Aggrwal1-0/+6
Call fsl_pci_init_port() to initialize all the PCIe ports on the board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controllerPoonam Aggrwal1-0/+26
fsl_pci_init_port can be called from board specific PCI initialization routines to setup the PCI (or PCIe) controller. This will reduce code redundancy in most of the 85xx/86xx FSL board ports that setup PCI. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Added single core members of FSL P1xx/P2xx processors seriesPoonam Aggrwal1-2/+6
P1011 - Single core variant of P1020 P2010 - Single core variant of P2020 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Added CONFIG_MAX_CPUS for P1020Poonam Aggrwal1-2/+2
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Add L2SRAM Register's macro definitionMingkai Hu1-0/+5
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Fix memory test range on MPC8536DSFelix Radensky1-2/+2
With current values of CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END memory test hangs if run without arguments. Set them to sane values, so that all available 512MB of RAM excluding exception vectors at the bottom and u-boot code and stack at the top can be tested. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Removed BEDBUG support on P1_P2_RDBKumar Gala1-1/+0
To match all other 85xx platforms we are removing BEDBUG support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Added P1020 Processor Support.Poonam Aggrwal1-0/+2
P1020 is another member of QorIQ series of processors which falls in ULE category. It is an e500 based dual core SOC. Being a scaled down version of P2020 it has following differences: - 533MHz - 800MHz core frequency. - 256Kbyte L2 cache - Ethernet controllers with classification capabilities. Also the SOC is pin compatible with P2020 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Add support for P2020RDB boardPoonam Aggrwal2-1/+557
The code base adds P1 & P2 RDB platforms support. The folder and file names can cater to future SOCs of P1/P2 family. P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series. Tested following on P2020RDB: 1. eTSECs 2. DDR, NAND, NOR, I2C. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-288xxx: Removed CONFIG_NUM_CPUS from 85xx/86xxPoonam Aggrwal12-14/+14
The number of CPUs are getting detected dynamically by checking the processor SVR value. Also removed CONFIG_NUM_CPUS references from all the platforms with 85xx/86xx processors. This can help to use the same u-boot image across the platforms. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Remove unused CONFIG_CLEAR_LAW0 definesPeter Tyser3-3/+0
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-2885xx: Add a 36-bit physical configuration for MPC8536DSKumar Gala1-10/+72
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary to allow for larger memory sizes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memoryKumar Gala2-0/+2
The old PCI ATMU setup code would just mimic the PCI regions into the ATMU registers. For simple memory maps in which all memory, MMIO, etc space fit into 4G this works ok. However there are issues with we have >4G of memory as we know can't access all of memory and we need to ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with anything since we can't turn it off. We first setup outbound windows based on what the board code setup in the pci regions for MMIO and IO access. Next we place PCICSRBAR below the MMIO window. After which we try to setup the inbound windows to map as much of memory as possible. On PCIe based controllers we are able to overmap the ATMU setup since RX & TX links are separate but report the proper amount of inbound address space to the region tracking to ensure there is no overlap. On PCI based controllers we use as many inbound windows as available to map as much of the memory as possible. Additionally we changed all the CCSR register access to use proper IO accessor functions. Also had to add CONFIG_SYS_CCSRBAR_PHYS to some 86xx platforms that didn't have it defined. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIeKumar Gala1-0/+1
Change the code to use the PCIe capabilities register to determine if we are a PCIe controller or not. Additionally cleaned up some white space and formatting in the file. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_initKumar Gala1-1/+0
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_initKumar Gala1-1/+1
Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28Use common code for Matrix Vision boardsAndré Schwarz2-30/+21
Clean up existing boards (mvBC-P/MPC5200 and mvBL-M7/MPC8343) by using common code. Signed-off-by: André Schwarz <andre.schwarz@matrix-vision.de>
2009-08-28Merge branch 'next' of git://git.denx.de/u-boot-nand-flash into nextWolfgang Denk3-2/+19
2009-08-26mpc83xx: mpc8349itx - accommodate larger kernel sizes & unzero the bootdelayKim Phillips1-3/+3
apparently the ITX was missed last round. Also make bootdelay consistent with other boards, so as to give on the opportunity to fix mistakenly set bootcmd without having checked for an bootdelay zero setting first. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-26mpc83xx: match dtb filename references to their dts equivalents in the linux ↵Kim Phillips2-2/+2
kernel Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-26NAND: DaVinci: V2 Adding 4 BIT ECC supportSandeep Paulraj1-0/+10
This patch adds 4 BIT ECC support in the DaVinci NAND driver. Tested on both the DM355 and DM365. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRSTSandeep Paulraj1-0/+1
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND chips. This ECC mode is similar to NAND_ECC_HW, with the exception of read_page API that first reads the OOB area, reads the data in chunks, feeds the ECC from OOB area to the ECC hw engine and perform any correction on the data as per the ECC status reported by the engine. This patch has been accepted by Andrew Morton and can be found at http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26NAND: ADD page Parameter to all read_page/read_page_raw API'sSandeep Paulraj1-2/+2
This patch adds a new "page" parameter to all NAND read_page/read_page_raw APIs. The read_page API for the new mode ECC_HW_OOB_FIRST requires the page information to send the READOOB command and read the OOB area before the data area. This patch has been accepted by Andrew Morton and can be found at http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch WE would like this to become part of the u-boot GIT as well Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-2683xx, kmeter1: added NAND supportHeiko Schocher1-0/+6
Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26OneNAND: Remove unused read_spareramKyungmin Park1-2/+1
Remove unused read_spareram and add unlock_all as kernel does Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26OneNAND: Remove unused read_spareramKyungmin Park1-2/+1
Remove unused read_spareram and add unlock_all as kernel does Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-08-26galaxy5200: Cleanup typo and trailing whitespaceEric Millbrandt1-4/+4
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
2009-08-26Merge branch 'next' of git://www.denx.de/git/u-boot-coldfire into nextWolfgang Denk1-0/+4
2009-08-26ColdFire: Fix missing _IO_BASE which caused compile errorTsiChung Liew1-0/+4
The compile error was caused by a recent patch. Affected platforms - M5253DEMO.h, M5253EVBE.h, and M54455EVB.h. Adding the _IO_BASE automatically defined to 0 in asm-m68k/io.h if it isn't set in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-08-26Support up to 7 banks for ids as specified in JEDEC JEP106ZNiklaus Giger1-1/+9
see http://www.jedec.org/download/search/jep106Z.pdf Add some second source legacy flash chips 256x8. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-25Merge branch 'next' of git://git.denx.de/u-boot-net into nextWolfgang Denk18-59/+83
2009-08-25Merge branch 'master' into nextWolfgang Denk3-10/+16
2009-08-25Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2-2/+2
2009-08-25Convert CS8900 Ethernet driver to CONFIG_NET_MULTI APIBen Warren17-59/+79
All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900 - changed CS8900_BASE to CONFIG_CS8900_BASE - changed CS8900_BUS?? to CONFIG_CS8900_BUS?? - cleaned up line lengths - modified VCMA9 command function that accesses the device - removed MAC address initialization from lib_arm/board.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
2009-08-25arm nomadik: activate defrag choose 4k transfer block sizeAlessandro Rubini1-0/+4
This chooses 4kB data size for both TFTP and NFS, as an example about how to use support for IP fragments. Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-25Switch from per-driver to common definition of bin2bcd and bcd2binAlbin Tonnerre1-0/+5
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de>
2009-08-25Replace BCD2BIN and BIN2BCD macros with inline functionsAlbin Tonnerre2-19/+12
In the process, also remove backward-compatiblity macros BIN_TO_BCD and BCD_TO_BIN and update the sole board using them to use the new bin2bcd and bcd2bin instead Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
2009-08-25Add support for the galaxy5200Eric Millbrandt1-0/+428
Add support for the DEKA Research and Development galaxy5200 board The galaxy5200 is an Freescale mpc5200 based embedded industrial control board. Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
2009-08-25unify {CONFIG_,}ENV_IS_EMBEDDEDMike Frysinger14-19/+28
Some boards have fallen out of sync by defining CONFIG_ENV_IS_EMBEDDED manually. While it is useful to have this available to the build system, let's do it automatically rather than forcing people to opt into it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-25include/s3c24x0.h: fix S3C24X0_SPI_CHANNEL declarationWolfgang Denk1-8/+14
The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-23Blackfin: cm-bf527/cm-bf537: increase flash sectorsHarald Krapfenbauer2-2/+2
Newer revisions of these boards have slightly larger flashes, so increase the configured number of sectors so that U-Boot works on all revisions. Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-08-23start a linker script helper fileMike Frysinger1-0/+25
Start a common header file for common linker script code (such as workarounds for older linkers) rather than doing this in the build system. As fallout, we no longer execute the linker every time config.mk is included by a build file (which can easily be 70+ times), but rather only execute it once. This also fixes a bug in the major version checking by creating a macro to easily compare versions and keep people from making the same common mistake (forgetting to check major and minor together). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-08-23include/mmc.h: Fix typo in IS_SD() macroAlbin Tonnerre1-1/+1
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
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