summaryrefslogtreecommitdiff
path: root/include/pci_ids.h
AgeCommit message (Collapse)AuthorFilesLines
2022-03-25pci: Add defines for normal and subtractive PCI bridgesPali Rohár1-0/+2
Add following two new PCI class codes defines into pci_ids.h include file: PCI_CLASS_BRIDGE_PCI_NORMAL PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE And use these defines in all U-Boot code for describing PCI class codes for normal and subtractive PCI bridges. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-02net: brcm: netXtreme driverBharat Gooty1-0/+3
Broadcom bnxt L2 driver support. Used by the Broadcom iproc platforms. Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
2020-07-17include: pci_ids: Add Cavium devicesSuneel Garapati1-0/+18
Add VendorID and DeviceID for supported devices on OcteonTX/TX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-02-20pci: Add IDs for Intel high-definition audioSimon Glass1-0/+5
Add a few IDs for common HDA blocks and the ADSP used on samus. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-13nvme: Detect devices that are class Storage ExpressJon Nettleton1-0/+1
This adds support to detect the catchall PCI class for NVMe devices. It allows the drivers to work with most NVMe devices that don't need specific detection due to quirks etc. Tested against a Samsung 960 EVO drive. Signed-off-by: Jon Nettleton <jon@solid-run.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-11x86: baytrail: Add 2nd eMMC controller to the PCI probe listStefan Roese1-2/+3
With this addition, the eMMC device available on the congatec and DFI BayTrail SoM is detected correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-10-21x86: pci: Add PCI IDs for Wildcat PointGeorge McCollister1-0/+2
Add Wildcat Point AHCI and LPC PCI IDs which are present on Broadwell U based (and possibly other) boards. Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-14x86: baytrail: Add all IDE/SATA PCI device IDsBin Meng1-1/+4
The BayTrail SoC has 4 different PCI devices IDs regarding to IDE and AHCI. Add these IDs in pci_ids.h and also add the other SATA ID in the Bayley Bay and MinnowMax board configuration header. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-06-04x86: qemu: Add ATA/SATA supportBin Meng1-0/+1
Enable legacy IDE support on the pc target and AHCI support on the q35 target. Default configuration is to support the pc target. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-16x86: pci: Add PCI IDs for lynxpointSimon Glass1-0/+2
Add some new device IDs used by this haswell-based chipset. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-02-06x86: pci: Add pci ids for Quark SoCBin Meng1-0/+4
Add pci ids for Intel Quark SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-02-05x86: pci: Add PCI IDs for Minnowboard MaxSimon Glass1-0/+5
This board includes a few IDs we have not seen before. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2014-12-13x86: Add Intel Topcliff PCH device IDsBin Meng1-0/+8
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-11-25pci: Update pci_ids.h to include some missing IDsSimon Glass1-6/+181
This was taken from Linux 3.18 with some additional IDs from Chrome OS Coreboot commit 688ef385. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-28e1000: add i211 and unprogrammed i210/i211 supportMarcel Ziswiler1-0/+2
This patch adds support for i211 as well as unprogrammed aka tools only i210/i211 chip support. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2014-08-21e1000: add i210 supportMarek Vasut1-0/+7
Add i210 support to the e1000 driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
2013-11-09malta: support for coreFPGA6 boardsPaul Burton1-0/+3
This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2012-09-02pci: update pci_ids.h with a few new entriesAndrew Sharp1-0/+16
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that are somewhat relevant to u-boot. Signed-off-by: Andrew Sharp <andywyse6@gmail.com>
2011-12-09Update pci_ids.h from current Linux sourcesGabe Black1-642/+1426
This change copies over the pci_ids.h file from Linux verbatim, plus a few ids that had been added by hand. The last non-merge change hash in that file in the kernel repository was: 8930c8aa740b12ad69f44a35137bcc39bfa3dc41 and the kernel was at version 2.6.38. Signed-off-by: Gabe Black <gabeblack@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> [agust@denx.de: updated to preserve used PCI IDs] Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-22drivers: add the support for Silicon Image SATA controllerTang Yuantian1-0/+5
Add the Silicon Image series PCI Express to Serial ATA controller support, including Sil3132, Sil3131 and Sil3124. The SATA controller can be used to load kernel. The features list: - Supports 1-lane 2.5 Gbit/s PCI Express - Supports one/two/four independent Serial ATA channels - Supports Serial ATA Generation 2 transfer rate of 3.0 Gbit/s - Supports LBA28 and LBA48 Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Aaron Williams <Aaron.Williams@cavium.com> Tested-by: Lan Chunhe <b25806@freescale.com>
2011-04-11Net: Add Intel E1000 82574L PCIe card supportRoy Zang1-0/+1
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS and MPC8572 board. Add the missing contact information for future support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-28Added PCI_DEVICE_ID_PLX_9030.Horst Kronstorfer1-0/+1
Added PCI device ID for the PLXTech PCI 9030 bridge. Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
2010-06-14video: sm501: add support for SM501 chips on PCI busAnatolij Gustschin1-0/+1
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-12-13net: e1000: Add support for the Intel 82546GB controllerReinhard Arlt1-0/+1
This chip is equipped for example on the esd PMC-ETH2-GB board. So let's add it to the list of supported chips to the e1000 driver. Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-08Add Intel E1000 PCIE card supportRoy Zang1-0/+22
Based on Intel PRO/1000 Network Driver 7.3.20-k2 Add Intel E1000 PCIE card support. The following cards are added: INTEL_82571EB_COPPER INTEL_82571EB_FIBER, INTEL_82571EB_SERDES INTEL_82571EB_QUAD_COPPER INTEL_82571PT_QUAD_COPPER INTEL_82571EB_QUAD_FIBER INTEL_82571EB_QUAD_COPPER_LOWPROFILE INTEL_82571EB_SERDES_DUAL INTEL_82571EB_SERDES_QUAD INTEL_82572EI_COPPER INTEL_82572EI_FIBER INTEL_82572EI_SERDES INTEL_82572EI INTEL_82573E INTEL_82573E_IAMT INTEL_82573L INTEL_82546GB_QUAD_COPPER_KSP3 INTEL_80003ES2LAN_COPPER_DPT INTEL_80003ES2LAN_SERDES_DPT INTEL_80003ES2LAN_COPPER_SPT INTEL_80003ES2LAN_SERDES_SPT 82571EB_COPPER dual ports, 82572EI single port, 82572EI_COPPER single port PCIE cards and 82545EM_COPPER, 82541GI_LF pci cards are tested on both P2020 board and MPC8544DS board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-11Add ESD PCI vendor IDMatthias Fuchs1-0/+2
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2008-08-27mpc85xx: Add support for the MPC8536Kumar Gala1-0/+2
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We also have SERDES init code for the 8536. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-07-10e1000: add support for 82545GM 64bit PCI-X copper variantPaul Gortmaker1-0/+1
This PCI-X e1000 variant works by just adding in the correct PCI IDs in the appropriate places. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2008-06-02E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop AdapterWolfgang Grandegger1-1/+2
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-04-17Additional PCI IDs for IDE and network controllersGuennadi Liakhovetski1-0/+5
These PCI IDs are required by the Linkstation platforms. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
2008-04-13Coding Style cleanup; update CHANGELOGWolfgang Denk1-1/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-30new PHY @ e1000 - 2nd tryAndre Schwarz1-0/+1
Add 82541ER device with latest integrated IGP2 PHY. Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-26Add the Freescale PCI device IDsAndy Fleming1-0/+23
Signed-off-by: Andy Fleming <afleming@freescale.com>
2006-06-28Change Id to symbolic name for RTL8139Jin Zhengxiong1-0/+3
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2006-01-18Add VGA support (CT69000) to CPCI750 board.Stefan Roese1-0/+1
Insert missing __le32_to_cpu() for filesize in ext2fs_read_file(). Patch by Reinhard Arlt, 30 Dec 2005
2004-04-25* Patch by Christian Hohnstaedt, 23 Apr 2004:wdenk1-102/+132
JFFS2 speed enhancements: - repair header CRC calculation in jffs2_1pass.c - add eraseblock size to the partition information to skip empty eraseblocks if we find more then 4k of free space. - The JFFS2 scanner is now fast enough to remove the spinning wheel so #ifdef-ed out. - add watchdog calls in long running loops * Patch by Philippe Robin, 22 Apr 2004: Fix ethernet configuration for "versatile" board * Patch by Kshitij Gupta, 21 Apr 2004: Remove busy loop and use MPU timer fr usleep() on OMAP1510/1610 boards * Patch by Steven Scholz, 24 Feb 2004: Fix a bug in AT91RM9200 ethernet driver: The MII interface is now initialized before accessing the PHY. * Cleanup PCI ID's
2004-04-25* Patch by John Kerl, 19 Apr 2004:wdenk1-63/+536
Use U-boot's miiphy.h for PHY register names, rather than introducing a new header file. * Update pci_ids.h from linux-2.4.26 * Patch by Masami Komiya, 19 Apr 2004: Fix problem cause by VLAN function on little endian architecture without VLAN environment
2004-01-02* Cleanup lowboot code for MPC5200wdenk1-1/+0
* Minor code cleanup (coding style) * Patch by Reinhard Meyer, 30 Dec 2003: - cpu/mpc5xxx/fec.c: added CONFIG_PHY_ADDR, added CONFIG_PHY_TYPE, - added CONFIG_PHY_ADDR to include/configs/IceCube.h, - turned debug print of PHY registers into a function (called in two places) - added support for EMK MPC5200 based modules * Fix MPC8xx PLPRCR_MFD_SHIFT typo * Add support for TQM866M modules * Fixes for TQM855M with 4 MB flash (Am29DL163 = _no_ mirror bit flash) * Fix a few compiler warnings
2003-12-07* Patch by Andre Schwarz, 24 Nov 2003:wdenk1-0/+4
add support for mvblue (mvBlueLYNX and mvBlueBOX) boards * Patch by Pavel Bartusek, 21 Nov 2003: set ZMII bridge speed on 440 * Patch by Anders Larsen, 17 Nov 2003: Fix mismatched #ifdef / #endif in include/asm-arm/arch-pxa/hardware.h
2003-10-15* Patches by Xianghua Xiao, 15 Oct 2003:wdenk1-0/+3
- Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
2003-09-05* Add support for SK98xx driverwdenk1-0/+1
* Add PCI support for SL8245 board * Support IceCube board configurations with 1 x AMD AM29LV065 (8 MB) or 1 x AM29LV652 (two LV065 in one chip = 16 MB); Run IPB at 133 Mhz; adjust the MII clock frequency accordingly * Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16 MHz) to allow for more accurate baudrate settings (error now 0.7% at 115 kbps, instead of 3.5% before) * Patch by Andreas Mohr, 4 Sep 2003: Fix a lot of spelling errors
2003-06-03* Patches by Udi Finkelstein, 2 June 2003:wdenk1-0/+13
- Added support for custom keyboards, initialized by defining a board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD . - Added support for the RBC823 board. - cpu/mpc8xx/lcd.c now automatically calculates the Horizontal Pixel Count field. * Fix alignment problem in BOOTP (dhcp_leasetime option) [pointed out by Nicolas Lacressonnière, 2 Jun 2003] * Patch by Mark Rakes, 14 May 2003: add support for Intel e1000 gig cards. * Patch by Nye Liu, 3 Jun 2003: fix critical typo in MAMR definition (include/mpc8xx.h) * Fix requirement to align U-Boot image on 16 kB boundaries on PPC. * Patch by Klaus Heydeck, 2 Jun 2003 Minor changes for KUP4K configuration
2003-05-18Add support for CompactFlash on ATC boardwdenk1-0/+1
(includes support for Intel 82365 and compatible PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers)
2002-11-03Initial revisionwdenk1-0/+1524
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 17:59:31 +0000