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2020-04-24bootcount_ext: Add flag to enable/disable bootcountFrédéric Danis1-12/+34
After a successful upgrade, multiple problem during boot sequence may trigger the altbootcmd process. This patch adds a version and an upgrade_available entries to the bootcount file to enable/disable the bootcount check. When failing to read the bootcount file it will consider that bootcount is enabled, acting as previously, and update the file accordingly. The bootcount file is only saved when `upgrade_available` is true, this allows to save writes to the filesystem. Signed-off-by: Frédéric Danis <frederic.danis@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24eth: mtk-eth: add mt7531 switch support in mediatek eth driverLanden Chao2-127/+577
mt7531 is a 7-ports switch with 5 embedded giga phys, and uses the same MAC design of mt7530. The cpu port6 supports SGMII only. The cpu port5 supports RGMII or SGMII in different model. mt7531 is connected to mt7622 via both RGMII and SGMII interfaces. In this patch, mt7531 cpu port5 or port6 is configured to maximum capability to align CPU MAC setting. The dts has been committed in the commit 6efa450565cdc ("arm: dts: mediatek: add ethernet and sgmii dts node for mt7622") Signed-off-by: Landen Chao <landen.chao@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-04-24watchdog: mpc8xx_wdt: Allow selection of watchdog mode through environmentCharles Frey1-1/+9
The mpc8xx watchdog can work either in 'reset mode' or 'NMI mode'. The selection can be done at startup only. It is desirable to select the mode without rebuilding U-boot. It is also desirable to disable the watchdog without rebuilding. At watchdog startup, check environment variable 'watchdog_mode'. If it is 'off', the watchdog is not started. If it is 'nmi', the watchdog is started in NMI mode. Otherwise, it is started in reset mode which is the default mode. Signed-off-by: Charles Frey <charles.frey@c-s.fr> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2020-04-23dm: pinctrl: Use right device pointer for configuring pinctrlLokesh Vutla1-2/+2
commit 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree") converted pinctrl driver to livetree. In this conversion, the call to read pinctrl-single,pins/bits property is provided with pinctrl device pointer instead of pinctrl config pointer. Because of this none of the pins gets configured. Fix it by passing the right udevice pointer. Fixes: 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree") Reported-by: Tom Rini <trini@konsulko.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-04-22Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini1-2/+2
- mvebu bubt cmd: Add A38x support (Joel) - Clearfog: Fix SCSI boot duplication (Joel) - Armada-37xx: Fix DDR PHY clock divider values (Marek)
2020-04-22Merge tag 'mmc-2020-4-22' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini8-16/+160
- iproc_sdhci memory leak fix and enable R1B resp quirk - more mmc cmds and several mmc updates from Heinirich - Use bounce buffer for tmio sdhci - Alignment check for tmio sdhci
2020-04-22drivers: mmc: rpmb: do not build for SPLHeinrich Schuchardt1-1/+1
RPMB support is used by the 'mmc rpmb' command and by the OP-TEE support. We do not need it in SPL. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-22mmc: tmio: sdhi: Implement get_b_max functionMarek Vasut2-10/+37
Implement get_b_max() for the Renesas R-Car SDHI controller driver, limit the b_max per hardware capabilities such that select Gen2 controllers have 16bit block transfer limit, the rest has 32bit block transfer limit and on Gen3, the block transfer limit on addresses above the 32bit boundary is set to 1/4 of the malloc area. Originally, on Gen3, the block transfers above the 32bit area were limited to PIO only, which resulted in (R8A7795 Salvator-X , HS200 eMMC): => time mmc read 0x0000000700000000 0 0x10000 time: 0.151 seconds => time mmc read 0x0000000700000000 0 0x100000 time: 11.090 seconds with bounce buffer in place and b_max adjustment in place: => time mmc read 0x0000000700000000 0 0x10000 time: 0.156 seconds => time mmc read 0x0000000700000000 0 0x100000 time: 2.349 seconds Note that the bounce buffer does mallocate and free the bounce buffer for every transfer. Experiment which removes this results in further increase of read speed, from 2.349s to 2.156s per 512 MiB of data, which is not such a significant improvement anymore. It might however be interesting to have bounce buffer directly in the MMC core or even block core. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2020-04-22mmc: Add option to adjust b_max before long readMarek Vasut2-2/+30
Add getter function which permits adjusting the maximum number of blocks that could be read in a single sustained read transfer based on the location of the source/target buffer and length, before such transfer starts. This is mainly useful on systems which have various DMA restrictions for different memory locations, e.g. DMA limited to 32bit addresses, and where a bounce buffer is used to work around such restrictions. Since the U-Boot bounce buffer is mallocated, it's size is limited by the malloc area size, and the read transfer to such a buffer must also be limited. However, as not all areas are limited equally, the b_max should be adjusted accordinly as needed to avoid degrading performance unnecessarily. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2020-04-22mmc: tmio: sdhi: Use bounce buffer to avoid DMA limitationsMarek Vasut2-0/+78
The R-Car SDHI DMA controller has various restrictions. To work around those restrictions without falling back to PIO, implement bounce buffer with custom alignment check function which tests for those limitations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2020-04-22drivers: mmc: iproc_sdhci: move host.mmc init before sdhci_setup_cfgRayagonda Kokatanur1-5/+5
move host.mmc before sdhci_setup_cfg Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
2020-04-22drivers: mmc: iproc_sdhci: fix compilation warningRayagonda Kokatanur1-1/+3
set_ios_post return type changed from void to int, correcting the same to fix compilation warning. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
2020-04-22drivers: mmc: iproc_sdhci: enable broken R1B response quirkBharat Kumar Reddy Gooty1-1/+1
Enable SDHCI_QUIRK_BROKEN_R1B quirk. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-04-22drivers: mmc: iproc_sdhci: fix possible memory leakBharat Kumar Reddy Gooty1-3/+5
Free the pointer variable 'iproc_sdhci' upon failure to fix possible memory leak. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-04-22cmd: mmc: provide boot area protection commandHeinrich Schuchardt1-0/+5
Provide command 'mmc wp' to power on write protect boot areas on eMMC devices. The B_PWR_WP_EN bit in the extended CSD register BOOT_WP is set. The boot area are write protected until the next power cycle occurs. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-22mmc: export mmc_send_ext_csd()Heinrich Schuchardt1-1/+1
Export function mmc_send_ext_csd() for reading the extended CSD register. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-22clk: armada-37xx-periph: fix DDR PHY clock divider valuesMarek Behún1-2/+2
Register value table for DDR PHY clock divider are wrong. They should be 0 or 1 for divide-by-2 or divide-by-4, respectively. Not 1 or 2. Current values do not make sense, since 2 cannot be achieved, because the register is only 1 bit long (mask is set to 1). This fixes clk dump reporting DDR PHY clock rate differently from Linux. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-21Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini1-0/+2
- Backplane support and bug fixes
2020-04-21Merge tag 'for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2cTom Rini6-2/+1065
i2c changes for 2020.07 - add new i2c driver for Broadcom iproc-based socs - fix cmd: eeprom: Staticize eeprom_i2c_bus - i2c: muxes: pca954x: add PCA9546 variant
2020-04-21mmc: tmio: sdhi: Add DMA transfer address alignment check at writingHiroyuki Yokoyama1-3/+5
In R-Car Gen 3, there is a DMA controller restriction of SDHI. When the transfer exceeding the 4 kByte boundary is performed while the DRAM address is not 128 byte aligned, the bus is occupied. This patch avoids this. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-04-20Merge branch '2020-04-17-master-imports'Tom Rini9-14/+211
- Further cleanups for 'make refcheckdocs' - Another BTRFS fix. - Support for automatic decompression of images with booti as well as unlz4 command for manual decompression.
2020-04-20Merge tag 'u-boot-amlogic-20200420' of ↵Tom Rini3-23/+67
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - enable DM_RNG on meson boards - fix SMBIOS info on Odroid-C2 - Fix video output on GXBB/GXL/GXM boards - add USB gadget support for GXL/GXM boards
2020-04-20Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini10-68/+384
2020-04-20phy: meson-gxl-usb: add set_mode call to force switch to peripheral modeNeil Armstrong2-18/+56
Add set_mode function in the Amlogic GXL PHYs that will be called by the arch code to switch PHYs from/to gadget mode. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20generic-phy: add generic_phy_get_by_node()Neil Armstrong1-5/+11
Add generic_phy_get_by_node() to get a PHY phandle from a node instead of a udevice. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com> [narmstrong: fixed by including ofnode.h in generic-phy.h]
2020-04-20drivers: i2c: add brcm iproc I2C driver supportRayagonda Kokatanur4-0/+1057
Add I2C driver support for Broadcom iproc-based socs. Signed-off-by: Arjun Jyothi <arjun.jyothi@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-04-20i2c: muxes: pca954x: add PCA9546 variantChris Packham2-2/+8
This adds the PCA9546 4-channel i2c bus switch. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-04-18clk: imx: add i.IMXRT1020 clk driverGiulio Benetti3-0/+244
Add i.MXRT1020 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18pmic: pfuze100: Change error message level to debugFabio Estevam1-1/+1
In some cases U-Boot runs the same binary on different board versions. In wandboard, for example, there are versions with the PFUZE100 PMIC populated and others without it. When the PMIC is not present, it is not really useful to get PMIC error, so change the error message level to debug instead. Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Heiko Schocher <hs@denx.de>
2020-04-18video: mxsfb: enable setting ENABLE negative polarityGiulio Benetti1-0/+3
ENABLE signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18video: mxsfb: enable setting PIXDATA on negative edgeGiulio Benetti1-0/+2
DOTCLK signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18video: mxsfb: enable setting VSYNC negative polarityGiulio Benetti1-0/+2
VSYNC signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18video: mxsfb: enable setting HSYNC negative polarityGiulio Benetti1-4/+10
HSYNC signal can now be flipped according to display_flags bitmaks by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18video: mxsfb: refactor for using display_timingsGiulio Benetti1-31/+23
struct display_timings provides more informations such clock and DE polarity, so let's refactor the code to use struct display_timings instead of struct ctfb_res_modes, so we'll become able to get clock and DE polarity settings and set register according to them in the next patch. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18video: mxsfb: add support for i.MXRTGiulio Benetti1-0/+1
Add support for i.MXRT by adding CONFIG_IMXRT in register structure and adding .compatible = "fsl,imxrt-lcdif". Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18video: mxsfb: add support for DM CLKGiulio Benetti1-5/+25
Allow using DM CLK instead of mxs_set_lcdclk() so we can avoid to implement a special function to set lcd clock on i.MXRT. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18sunxi: display: use common video_ctfb_mode_to_display_timing()Giulio Benetti1-31/+2
Since video_ctfb_mode_to_display_timing() has been implemented by moving sunxi_ctfb_mode_to_display_timing() to video_modes.c and it's meant to be used by other video subsystem, let's use it instead of local sunxi_ctfb_mode_to_display_timing(). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18videomodes: add helper function to convert from ctfb to display_timingGiulio Benetti2-0/+40
This function converts from "struct ctf_res_modes" to "struct display_timing". Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18clk: imx: clk-imxrt1050: add set_parent() callbackGiulio Benetti1-0/+19
Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-04-18clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPLGiulio Benetti1-1/+8
mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18clk: imx: clk-imxrt1050: fix typo in clock name "video:"Giulio Benetti1-1/+1
"video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18clk: imx: pllv3: add enable_bitGiulio Benetti1-0/+9
pllv3 PLLs have powerdown/up bits but enable bits too. Specifically "enable bit" enable the pll output, so when dis/enabling pll by setting/clearing power_bit we must also set/clear enable_bit. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-17doc: fix references to driver-modelHeinrich Schuchardt4-4/+4
Fix some errors pointed out by 'make refcheckdocs'. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17tee: optee: use dev_info in print_os_revisionPatrick Delaunay1-6/+7
Display TEE version at information level; this patch replaces debug() call to dev_info() in print_os_revision() function. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-04-17block: ide: use definitions from include/libata.hHeinrich Schuchardt1-4/+4
Currently ATA commands are defined both in include/libata.h and include/ata.h. Use the command definitions from include/libata.h where applicable. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17mediatek: pwm: add pwm driver for MediaTek SoCsSam Shih3-0/+196
This driver support the standard PWM API for MediaTek MT7623, MT7622 and MT7629 SoCs Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-04-17net: fm: fix build error when not using nandFrancois Gervais1-0/+2
If CONFIG_CMD_NAND is disabled, get_nand_dev_by_index() is not accessible. This fix allows the build to succeed in this case. Signed-off-by: Francois Gervais <fgervais@distech-controls.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-16test: pinmux: add pincontrol-gpio for pin configurationPatrick Delaunay1-0/+196
Add a simple pincontrol associated to the sandbox gpio driver, that allows to check pin configuration with the command pinmux. The pinmux test is also updated to test behavior with 2 pincontrols. Example to check LED pin configuration: => pinmux list | Device | Driver | Parent | pinctrl-gpio | sandbox_pinctrl_gpio | root_driver | pinctrl | sandbox_pinctrl | root_driver => pinmux dev pinctrl-gpio => pinmux status a0 : gpio input . a1 : gpio input . a2 : gpio input . a3 : gpio input . a4 : gpio input . a5 : gpio output . a6 : gpio output . ... Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16test: dm: update test for pins configuration in gpioPatrick Delaunay1-20/+66
Add tests for new API set_dir_flags and set_dir_flags and associated code in gpio uclass. Test support for new flags GPIO_OPEN_DRAIN, GPIO_OPEN_SOURCE GPIO_PULL_UP and GPIO_PULL_DOWN. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16gpio: sandbox: cleanup binding supportPatrick Delaunay1-5/+8
Cleanup binding support, use the generic binding by default (test u-class gpio_xlate_offs_flags function) and add specific binding for added value. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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