summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)AuthorFilesLines
2019-09-16mtd: spi-nor: add missing SST26* flash IC protection opsEugeniy Paltsev2-0/+182
Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without proper testing/investigations which results in a regressions for SST26 flash series. Add missing SST26* flash IC protection ops which were introduced previously by Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs protection ops) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16mtd: spi: Drop sf.cJagan Teki3-72/+1
spi_write_then_read, will manage to do the respective spi_xfer based on the tx_buf, rx_buf so drop the legacy spi_flash_read/write/cm code. Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16mtd: spi_dataflash: Use spi read then writeJagan Teki1-9/+13
Now, we have spi_write_then_read routine that would handle spi_xfer handling based on the tx_buf and rx_buf parameters. So, replace individual flash read/write/cmd transfer call with spi_write_then_read. Cc: Egnite GmbH <info@egnite.de> Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu> Cc: Ilko Iliev <iliev@ronetix.at> Cc: Marek Vasut <marex@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Alison Wang <alison.wang@nxp.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: Add spi_write_then_readJagan Teki1-0/+24
Add support for SPI synchronous write followed by read, this is common interface call from spi-nor to spi drivers. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2019-09-16spi: Kconfig: Unmark DEPRECATED for MXS_SPILukasz Majewski1-1/+0
MXS_SPI driver now partially converted into driver-model, so unmark the DEPRECATED option for the same. Signed-off-by: Lukasz Majewski <lukma@denx.de> [jagan: update the commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: soft_spi: Fix data abort if slave is not probedChristophe Kerello1-2/+2
In case spi_get_bus_and_cs callback is used, spi bus is first probed then slave devices are probed. To avoid a data abort in soft_spi probe function, we need to check that (slave != NULL). If slave is NULL, cs_flags and clk_flags will be initialized with respectively GPIOD_ACTIVE_LOW and 0. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: mvebu_a3700_spi: Fix clock prescale computationMarek Behún1-3/+2
The prescaler value computation can yield wrong result if given 0x1f at the beginning: the value is computed to be 0x20, but the maximum value the register can hold 0x1f, so the actual stored value in this case is 0, which is obviously wrong. Set the upper bound of the value to 0x1f with the min macro. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-13soc: ti: k3-navss-ringacc: fix k3_nav_ringacc_ring_reset_dmaVignesh Raghavendra1-1/+3
In case dma_ring_reset_quirk is not set the k3_ringacc_ring_reset_dma will just exit without ring reset. Fix it, by adding ring reset call in case dma_ring_reset_quirk is not. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-09-11rockchip: clk: rk3399: remove clk_enable()Kever Yang1-37/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11rockchip: clk: rk3368: remove clk_enable()Kever Yang1-19/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11rockchip: clk: rk3328: remove clk_enable()Kever Yang1-12/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11rockchip: clk: rk3288: remove clk_enable()Kever Yang1-23/+0
There is no real driver for clk enable/disable now, and we actually don't need it now, remove it so that not waste CPU cycles and code size. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11usb: ohci-generic: don't probe fail if there is no clk_enable() opsKever Yang1-1/+1
Some clock driver do not have a clk_enable() call back, and we should not treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk() do not return fail if ret value is '-ENOSYS' Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-11usb: ehci-generic: don't probe fail if there is no clk_enable() opsKever Yang1-1/+1
Some clock driver do not have a clk_enable() call back, and we should not treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk() do not return fail if ret value is '-ENOSYS' Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-10usb: xhci-dwc3: Add support for dis_u2_susphy_quirkNeil Armstrong1-0/+3
This quirk is necessary for the Amlogic GXL SoCs otherwise the Port 2 PHY doesn't get out of suspend and U-Boot resets the board after: XHCI timeout on event type 33... cannot recover. BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()! BUG! This quirk is also handled in the dwc3 core code, but until the xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here to fix USB support on the Amlogic libretech-cc and libretech-ac board when a device is only plugged in the OTG port. Cc: Yuri Frolov <crashing.kernel@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-08Merge tag 'mmc-9-6-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini15-57/+206
Bug fixes to mmc_spi Add Aspeed SD driver Fix dw_mmc timeout calculation Fix timeout values passed to mmc_wait_dat0 sdhci dt caps/mask update [trini: Fix evb-ast2500_defconfig CONFIG_MMC line] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-09-07Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini4-65/+113
- Initial DM conversion
2019-09-06Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-bootTom Rini2-7/+17
- fix mailbox status register used for polling - fix bcm2835_sdhost to wait long enough for a transfer to complete - increase kernel image size from 8 MB to 64 MB on arm64 - add support for RPi4 - add prefixes for raspberry pi related stuff to git-mailrc
2019-09-06mmc: bcm283x: Add support for bcm2711 device in bcm2835_sdhciMatthias Brugger1-2/+10
The bcm2711 has two emmc controllers. The difference is the clocks they use. Add support for the second emmc controller. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Andrei Gherzan <andrei@balena.io>
2019-09-06mmc: bcm2835-host: Fix wait_transfer_completeRaul Benet1-5/+7
Function bcm_2835_wait_transfer_complete() is not waiting long enough. The previous code was claiming to wait for ~1 seconds, but as it depends on register reads it's time actually varies. Some cards require wait times of up to ~56 ms to perform the command 'saveenv' on an EXT4 partition. Re-implement the loop exit condition to use get_timer() which allows to specify the wait time in more reliable manner. Set the maximum wait time to the originally intended 1 second. Signed-off by: Raul Benet <raul.benet_at_kaptivo.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06mmc: sdhci: Add support for dt caps & caps maskT Karthik Reddy1-9/+14
The sdhci capabilities registers can be incorrect. The sdhci-caps-mask and sdhci-caps dt properties specify which bits of the registers are incorrect and what their values should be. This patch makes the sdhci driver use those properties to correct the caps. Also use "dev_read_u64_default" instead of "dev_read_u32_array" for caps mask. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-09-06dm: core: Add functions to read 64-bit dt propertiesT Karthik Reddy2-1/+11
This patch adds functions dev_read_u64_default & dev_read_u64 to read unsigned 64-bit values from devicetree. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-05dm: mmc_spi: Fix NULL pointer dereference in mmc_spi_bind()Bin Meng1-15/+20
The mmc_spi driver's priv is not available in its bind phase(). Use platdata instead. Fixes: 05e35d429745 ("mmc: mmc_spi: Re-write driver using DM framework") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-09-05mmc: dw_mmc: fix timeout calculate methodKever Yang1-2/+3
There are two cases not been considered: - use uint for timeout, it will overflow when size bigger than 512KB for it *8*1000 at the beginning, but we may use size up to 32MB; The 'timeout' will overflow if size bigger than 51.2MB after this fix, which should be enough for U-Boot; - The timeout is using clock speed for data rate, but the device may not have such high speed, eg. clock is 52MHz while the device write speed may be less than 10MB/s, and we may use up to 150MHz clock. Fix them in this patch, the max timeout is about 6500 when size is 32MB after fix. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-05mmc: Add Aspeed SD controller driverEddie James3-0/+102
Add support for the Aspeed SD host controller engine. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-09-05clk: aspeed: Add support for SD clockEddie James2-0/+29
Add code to enable the SD clock on the ast2500 SoC. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-09-05mmc: Rename timeout parameters for clarificationSam Protsenko5-26/+27
It's quite hard to figure out time units for various function that have timeout parameters. This leads to possible errors when one forgets to convert ms to us, for example. Let's rename those parameters correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues further. While at it, add time units info as comments to struct mmc fields. This commit doesn't change the behavior, only renames parameters names. Buildman should report no changes at all. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-09-05mmc: Fix timeout values passed to mmc_wait_dat0()Sam Protsenko1-2/+2
mmc_wait_dat0() expects timeout argument to be in usec units. But some overlying functions operate on timeout in msec units. Convert timeout from msec to usec when passing it to mmc_wait_dat0(). This fixes 'avb' commands on BeagleBoard X15, because next chain was failing: get_partition() -> mmc_switch_part() -> __mmc_switch() -> mmc_wait_dat0() when passing incorrect timeout from __mmc_switch() to mmc_wait_dat0(). Fixes: bb98b8c5c06a ("mmc: During a switch, poll on dat0 if available and check the final status") Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com> Tested-by: Eugeniu Rosca <rosca.eugeniu@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-09-05dm: mmc: remove unused U_BOOT_DRIVER(mmc)Andy Yan1-4/+0
When look through the code, I found this bare metal drives is not used, so remove it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-09-04net: macb: Fix rx buffer cache handlingStefan Roese1-2/+4
With commit c6d07bf440bc ("net/macb: increase RX buffer size for GEM") ethernet support does not work any more with d-cache enabled on the AT91SAM. The reason is, that MACB_RX_BUFFER_SIZE was changed from 4096 to 128 but this change was not refected in the rx_buffer flush and invalidate functions, as these also use this macro. This patch now fixes this by calculating the rx buffer size correctly again in those functions. With this change, ethernet works again reliably on my AT91SAM board. Signed-off-by: Stefan Roese <sr@denx.de> Fixes: c6d07bf440bc ("net/macb: increase RX buffer size for GEM") Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: designware: drop compatible altr, socfpga-stmmacRalph Siemsen1-1/+0
The same compatible = "altr,socfpga-stmmac" appears in both drivers/net/designware.c and drivers/net/dwmac_socfgpa.c, creating ambiguity in which driver will be bound. For Intel/Altera SoC devices, dwmac_socfpga.c is the correct driver. So drop the compatible string from designware.c. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04Revert "net: macb: Fixed reading MII_LPA register"Bin Meng1-1/+1
This reverts commit 1b0c9914cc75d1570359181ebd493cd5746cb0ed. Commit 1b0c9914cc75 ("net: macb: Fixed reading MII_LPA register") causes 100Mbps does not work any more with SiFive FU540 GEM on the HiFive Unleashed board. Revert it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: fsl_enet_mdio: fix missing terminator in PCI ID arrayAlex Marginean1-0/+1
It was missing in the original submission and not having it in place causes issues with probing of PCI devices. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: dwc_et_qos: update weak function board_interface_eth_initPatrick Delaunay1-13/+3
Align the board and driver prototype for board_interface_eth_init to avoid execution issue (the interface_type parameter is defined as int or phy_interface_t). To have a generic weak function (it should be reused by other driver) I change the prototype to use directly udevice. This prototype is added in netdev.h to allow compilation check and avoid warning when compiling with W=1 on file board/st/stm32mp1/stm32mp1.c warning: no previous prototype for 'board_interface_eth_init'\ [-Wmissing-prototypes] int board_interface_eth_init(int interface_type, .... ^~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: dwc_eth_qos: Change eqos_ops function to staticPatrick Delaunay1-6/+6
This patch solves many warnings when compiling with W=1: warning: no previous prototype for '....' [-Wmissing-prototypes] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: pfe_eth: undefined return valueHeinrich Schuchardt1-2/+1
Do not use random value from stack as return value of pfe_phy_write(). Indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04test: dm_mdio: avoid out of bounds accessHeinrich Schuchardt1-2/+2
SANDBOX_PHY_REG_CNT is not an allowable index for the array u16 reg[SANDBOX_PHY_REG_CNT]. Identified by cppcheck. Fixes: b47edf8069cc ("test: dm_mdio: add a 2nd register to the emulated PHY") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: mvpp2: support setting hardware addresses from ethernet coreMatt Pelland1-0/+8
mvpp2 already has support for setting MAC addresses but this functionality was not exposed to the ethernet core. This commit exposes this functionality so that MAC address assignments stored in U-Boot's environment are correctly applied before Linux boots. Signed-off-by: Matt Pelland <mpelland@starry.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: add marvell MDIO driverAlex Marginean3-0/+247
This patch adds a separate driver for the MDIO interface of the Marvell Ethernet controllers based on driver model. There are two reasons to have a separate driver rather than including it inside the MAC driver itself: *) The MDIO interface is shared by all Ethernet ports, so a driver must guarantee non-concurrent accesses to this MDIO interface. The most logical way is to have a separate driver that handles this single MDIO interface, used by all Ethernet ports. *) The MDIO interface is the same between the existing mv643xx_eth driver and the new mvneta/mvpp2 driver. Even though it is for now only used by the mvneta/mvpp2 driver, it will in the future be used by the mv643xx_eth driver as well. This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE 802.3 Clause 45. This patch also adds device tree binding for marvell MDIO driver. Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers/fsl-mc: Create Kconfig file to manage driver specific configs betterFlorinel Iordache2-0/+26
Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: driver for MDIO muxes controlled over I2CAlex Marginean3-0/+117
This driver is used for MDIO muxes driven over I2C. This is currently used on Freescale LS1028A QDS board, on which the physical MDIO MUX is controlled by an on-board FPGA which in turn is configured through I2C. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-04Revert "drivers: net: driver for MDIO muxes controlled over I2C"Joe Hershberger2-9/+0
This reverts commit d9a9174fa5687521035b2ec82cce86cdcf4f36e6.
2019-09-03Merge tag 'for-v2019.10-v2' of ↵Tom Rini1-0/+18
https://gitlab.denx.de/u-boot/custodians/u-boot-i2c i2c bugfixes for 2019.10 take 2 - i2c: mxc: add CONFIG_CLK support If CONFIG_CLK is enabled use clk framework for clock settings.
2019-09-03dm: cache: add v5l2 cache controller driverRick Chen3-0/+196
Add a v5l2 cache controller driver that is usually found on Andes RISC-V ae350 platform. It will parse the cache settings from the dtb. In this version tag and data ram control timing can be adjusted by the requirement from the dtb. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03dm: cache: Add enable and disable ops for sandbox and testRick Chen1-0/+13
Add cache enable and disable ops for test coverage. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03dm: cache: Add enable and disable ops for cache uclassRick Chen1-0/+20
Add cache enable/disable ops to the DM cache uclass driver Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: cpu: Skip unavailable hart in the get_count() opBin Meng1-0/+4
We should not count in hart that is marked as not available in the device tree in riscv_cpu_get_count(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-09-02pci: sh7751: Convert to DM and DT probingMarek Vasut1-58/+106
Convert the SH7751 PCI driver to DM and add DT probing. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2019-09-02dm: core: Decouple DM from DTMarek Vasut3-7/+7
Some of the DM functions depend on OF_CONTROL, which is incorrect. DM and DT are orthogonal. Add macro guards around such functions to avoid compiling them in when DM is enabled, while OF_CONTROL is not. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org>
2019-09-02i2c: mxc: add CONFIG_CLK supportPeng Fan1-0/+18
When CONFIG_CLK enabled, use CLK UCLASS for clk related settings. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> hs: removed hunk in mxc_i2c_probe() as not longer in code
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 19:22:42 +0000