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2024-08-09i2c: imx_lpi2c: Support read transfers longer than 256 bytesFedor Ross1-25/+47
The TXFIFO register of LPI2C only has one byte length, and if the length of the data that needs to be read exceeds 256 bytes, it needs to be written to TXFIFO multiple times. Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
2024-08-09i2c: imx_lpi2c: Replace hard-coded bus speed value with bus->speed_hzFedor Ross1-6/+9
Instead of using the hard-coded bus speed value I2C_SPEED_STANDARD_RATE, use the actual configured bus speed. This way the bus speed doesn't change suddenly after calling the imx_lpi2c_probe_chip() function for example. Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
2024-08-09i2c: imx_lpi2c: Fix a typo in bus_i2c_receiveFedor Ross1-1/+1
Fix a typo in a debug message. It should be 'for' not 'fot' . Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
2024-08-09i2c: samsung: Support platforms other than EXYNOS4 and EXYNOS5David Virag4-6/+53
Newer Samsung SoCs (including newer Exynos, ExynosAuto, Google Tensor) still use these IPs, or slightly newer versions of it. Make these drivers available on these platforms by guarding EXYNOS4/EXYNOS5 specific code behind their configs, and using CCF for clocks on other platforms. Tested S3C I2C driver on Exynos7885. This along with extended clock driver should enable S3C I2C on Exynos850. Signed-off-by: David Virag <virag.david003@gmail.com> Tested-by: Henrik Grimler <henrik@grimler.se> Reviewed-by: Heiko Schocher <hs@denx.de>
2024-08-09i2c: samsung: Drop s3c24x0 specific code.David Virag2-12/+0
This has been dead code for many years now. Remove it. Signed-off-by: David Virag <virag.david003@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2024-08-09i2c: mux: Fix error path in i2c-arb-gpioMichal Simek1-7/+4
There is no reason to use goto and just call return. Better is to call return directly which is done for some if/else parts. Also make no sense to setup ret to -ETIMEDOUT and then to 0. Return timeout directly. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2024-08-09i2c: pca954x: Remove pointer to GDMichal Simek1-3/+0
There is no reason to have any pointer to GD that's why remove it. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2024-07-23arm: ti: Remove omap4 platform supportTom Rini1-1/+1
There are no longer any OMAP4 platforms in U-Boot, remove the related functionality. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-22drivers: i2c: Remove duplicate newlinesMarek Vasut7-7/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2024-07-08i2c: mediatek: add support for optional arb and pmic clockChristian Marangi1-0/+30
Add support for optional arb and pmic clock for i2c provided in upstream linux DTSI. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini49-49/+12
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini49-12/+49
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07i2c: Remove <common.h> and add needed includesTom Rini49-49/+12
Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-23i2c: Add support for Qualcomm Generic Interface (GENI) I2C controllerNeil Armstrong3-0/+586
Add Support for the Qualcomm Generic Interface (GENI) I2C interface found on newer Qualcomm SoCs. The Generic Interface (GENI) is a firmware based Qualcomm Universal Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple bus protocols depending on the firmware type loaded at early boot time based on system configuration. It also supports the "I2C Master Hub" which is a single function Wrapper that only FIFO mode I2C. It replaces the fixed-function QUP Wrapper found on older SoCs. The geni-se.h containing the generic GENI Serial Engine registers defines is imported from Linux. Only FIFO mode is implemented, neither SE DMA nor GPI DMA are implemented. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-02Merge patch series "ARM: renesas: Rename R-Mobile to Renesas"Tom Rini1-1/+1
Marek Vasut <marek.vasut+renesas@mailbox.org> says: Rename R-Mobile to Renesas all over the place because the chips are made by Renesas, while only a subset of them is from the R-Mobile line.
2024-03-02ARM: renesas: Rename ARCH_RMOBILE to ARCH_RENESASMarek Vasut1-1/+1
Rename ARCH_RMOBILE to ARCH_RENESAS because all the chips are made by Renesas, while only a subset of them is from the R-Mobile line. Use the following command to perform the rename: " $ git grep -l 'ARCH_RMOBILE' | xargs -I {} sed -i 's@ARCH_RMOBILE@ARCH_RENESAS@g' {} " Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-02-28i2c: rzg2l: Add I2C driver for RZ/G2L familyPaul Barker3-0/+632
This driver supports the I2C module on the Renesas RZ/G2L (R9A07G044) SoC, also known as the RIIC module. This patch is based on both the u-boot driver in the Renesas RZ BSP 3.0.5 release [1] (commit 7fcc1fdc2534), and the Linux v6.7 driver (commit 0dd3ee311255). Support for deblocking the I2C bus is included as this may be needed after triggering a reset via the Power Management IC (PMIC) over I2C (the PMIC asserts the reset line before the SoC completes the I2C write transaction with obvious bus locking effects). If the SDA line is observed to be low during initialisation, we automatically attempt to deblock. [1]: https://github.com/renesas-rz/renesas-u-boot-cip Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-01-29treewide: Remove clk_freeSean Anderson6-12/+1
This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2023-11-30Merge branch 'staging' of ↵Tom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-tegra into next Device tree improvents for Paz00 and DM PMIC convertion of recently merged Tegra boards.
2023-11-27i2c: Bugfix in i2c_get_chip_by_phandle()Philip Oberfichtner1-1/+1
The "i2cbcdev" sneaked in when implementing this function for the bootcounter use case. Obviously the intention was to use prop_name instead. Fixes: b483552773 (i2c: Implement i2c_get_chip_by_phandle()) Signed-off-by: Philip Oberfichtner <pro@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2023-11-16treewide: use linux/time.h for time conversion definesIgor Prusov1-6/+5
Now that we have time conversion defines from in time.h there is no need for each driver to define their own version. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> #at91 Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> #qcom geni Reviewed-by: Stefan Bosch <stefan_b@posteo.net> #nanopi2 Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-31i2c: Implement i2c_get_chip_by_phandle()Philip Richard Oberfichtner1-0/+75
This new function enhances the i2c_get_chip*() toolbox by implementing a variant that does not require a chip_addr. Instead, the desired device is pointed to by a phandle. Signed-off-by: Philip Richard Oberfichtner <pro@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-30i2c: designware_i2c: adjust timing calculationHeinrich Schuchardt1-4/+15
In SPL probing of the designware_i2c device on the StarFive VisionFive 2 board fails with dw_i2c: mode 0, ic_clk 1000000, speed 100000, period 10 rise 1 fall 1 tlow 5 thigh 4 spk 0 dw_i2c: bad counts. hcnt = -4 lcnt = 4 device_probe: i2c@12050000 failed to probe -22 When changing the offset for the high phase from 7 to 3 the device is probed correctly. This now matches the value from the Linux driver. Without this fix the memory size of the StarFive VisionFive 2 board cannot be read from EEPROM. Fixes: e71b6f6622d6 ("i2c: designware_i2c: Rewrite timing calculation") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-30i2c: nuvoton: remove standard mode onlyJim Liu1-5/+0
first version is only support standard mode. remove this judgment to support standard/fast/fast plus mode. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Changes for v2: - add commit message Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-22sunxi: introduce NCAT2 generation modelAndre Przywara1-1/+2
Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org>
2023-10-22pinctrl: sunxi: remove GPIO_EXTRA_HEADERAndre Przywara2-2/+2
U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org>
2023-10-17lib: acpi: Fix linking SPL when ACPIGEN is enabledSean Anderson1-1/+1
lib/acpi/acpigen.o is only compiled into SPL when SPL_ACPIGEN is enabled. Update several files which reference these functions accordingly. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17spl: Allow enabling SPL_OF_REAL and SPL_OF_PLATDATA at the same timeSean Anderson1-1/+1
Sandbox unit tests in U-Boot proper load a test device tree to have some devices to work with. In order to do the same in SPL, we must enable SPL_OF_REAL. However, we already have SPL_OF_PLATDATA enabled. When generating platdata from a devicetree, it is expected that we will not need devicetree access functions (even though SPL_OF_CONTROL is enabled). This expectation does not hold for sandbox, so allow user control of SPL_OF_REAL. There are several places in the tree where conditions involving OF_PLATDATA or OF_REAL no longer function correctly when both of these options can be selected at the same time. Adjust these conditions accordingly. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-02Merge branch 'next'Tom Rini6-8/+13
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-24common: Drop linux/printk.h from common headerSimon Glass5-0/+5
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-22drivers: mediatek: Fix error handling in mtk_i2c_do_transferFrancois Berder1-1/+1
Errors were handled only if an I2C transfer timed out and received a NACK which is very unlikely. This commit changes the condition such that errors are handled if an I2C transfer times out or received a NACK. Signed-off-by: Francois Berder <fberder@outlook.fr> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-08-21Merge tag 'v2023.10-rc3' into nextTom Rini1-0/+42
Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-15i2c: mvtwsi: reset controller if stuck in "bus error" stateSam Edwards1-0/+42
The MVTWSI controller can act either as a master or slave device. When acting as a master, the FSM is driven by the CPU. As a slave, the FSM is driven by the bus directly. In what is (apparently) a safety mechanism, if the bus transitions our FSM in any improper way, the FSM goes to a "bus error" state (0x00). I could find no documented or experimental way to get the FSM out of this state, except for a controller reset. Since U-Boot only uses the MVTWSI controller as a bus master, this feature only gets in the way: we do not care what happened on the bus previously as long as the bus is ready for a new transaction. So, when trying to start a new transaction, check for this state and reset the controller if necessary. Note that this should not be confused with the "deblocking" technique (used by the `i2c reset` command), which involves pulsing SCL repeatedly if SDA is found to be held low, in an attempt to force the bus back to an idle state. This patch only resets the controller in case something else had previously upset it, and (in principle) results in no externally-observable change in behavior. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-08-09Kconfigs: Correct default of "0" on hex type entriesTom Rini1-8/+8
It is not a parse error to have a default value of "0" for a "hex" type entry, instead of "0x0". However, "0" and "0x0" are not treated the same even by the tools themselves. Correct this by changing the default value from "0" to "0x0" for all hex type questions that had the incorrect default. Fix one instance (in two configs) of a default of "0" being used on a hex question to be "0x0". Remove the cases where a defconfig had set a value of "0x0" to be used as the default had been "0". Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-03i2c: mediatek: fix I2C usability for MT7981Weijie Gao1-2/+43
MT7981 actually uses MediaTek I2C controller v3 instead of v1. This patch adds support for I2C controller v3 fix fixes the I2C usability for MT7981. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-02i2c: designware: Add Kconfig for designware_i2c_pci.cMinda Chen2-3/+10
As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive JH7110) contain Designware i2c and PCI but do not use ACPI, This file cannot be compiled. So add a new Kconfig for designware_i2c_pci.c, which depends on ACPIGEN Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-31i2c: i2c-gpio: Correctly handle new {sda, scl}-gpios bindingsChris Packham1-1/+1
gpio_request_list_by_name() returns the number of gpios requested. Notably it swallows the underlying -ENOENT when the "gpios" property does not exist. Update the i2c-gpio driver to check for ret == 0 before trying the new sda-gpios/scl-gpios properties. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2023-06-12Merge tag v2023.07-rc4 into nextTom Rini3-9/+11
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-05I2C: cdns: Fix broken retry mechanism on arbitration lost.Andrea Merello1-2/+3
In the current implementation, in case of I2C arbitration lost, a retry is attempted; the message counter and pointer are reset to the original values and the I2C xfer process is restart from the beginning. However the message counter and message pointer are respectively decremented and incremented by one before attempting any transfer, causing the 1st transfer not to be actually retried (in case of a single transfer, nothing is actually retried at all). This patch fixes this: in case of retry, the 1st transfer is also retried. Tested on a ZynqMP Kria board, with upstream older u-boot, but the involved file and underlying logic seem basically the same. Signed-off-by: Andrea Merello <andrea.merello@iit.it>
2023-06-05i2c: rockchip: De-initialize the bus after start bit failureOndrej Jirman1-3/+4
Failure can happen when i2c is used without initializing pinctrl properly, which U-Boot happily allows in SPL. Without this fix, further I2C access would fail, even after proper pinctrl initialization. Signed-off-by: Ondrej Jirman <megi@xff.cz> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-05-31arm: Remove ti816x_evm board and ti816x SoC supportTom Rini1-1/+0
This platform is currently unmaintained and untested, so remove it. Further, as it is the only TI816X SoC example, remove related files as well. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-06drivers: use dev_read_addr_ptr when cast to pointerJohan Jonker2-4/+4
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-11i2c: fsl_i2c: fix m68k transfertsAngelo Dureghello1-7/+9
This driver is actually used for powerpc and m68k/ColdFire. On ColdFire SoC's, interrupt flag get not set if IIEN flag (mbcr bit6, interrupt enabled) is not set appropriately before each transfert. As a result, the transfert hangs forever waiting for IIEN. This patch set IIEN before each transfert, while considering this fix as not harming powerpc arch. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-04-11i2c: imx_lpi2c: Fix misuse the IS_ENABLED for DM clockYe Li1-2/+2
The IS_ENABLED, which does not consider SPL build, should be replaced by CONFIG_IS_ENABLED. For the case that we only enable DM CLK for u-boot but not in SPL, the IS_ENABLED(CONFIG_CLK) still returns true, then cause clock failure. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-11i2c: correct I2C deblock logicHaibo Chen1-2/+2
Current code use dm_gpio_get_value() to get SDA and SCL value, and the value depends on whether DTS file config the GPIO_ACTIVE_LOW. In ususal case for i2c GPIO, DTS need to set GPIO_ACTIVE_LOW for SCL/SDA pins. So here the logic is not correct. And we must not use GPIOD_ACTIVE_LOW in client code include the dm_gpio_set_dir_flags(), it is DTS's responsibility for this flag. So remove GPIOD_ACTIVE_LOW here. Fixes: aa54192d4a87 ("dm: i2c: implement gpio-based I2C deblock") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Alexander Kochetkov <al.kochet@gmail.com <mailto:al.kochet@gmail.com>>
2023-04-11i2c: designware_i2c: remove apparently redundant read of 'i2c, speeds' DT ↵Rasmus Villemoes1-14/+0
property This code first figures out if there is an i2c,speeds property, if so its size in u32s, and then reads the value into the local speeds[] array. Both 'size' and 'speeds' are completely unused thereafter. It's not at all clear what this is supposed to do. Of course, it could be seen as a sanity check that the DT node does have an i2c,speeds property with an appropriate number of elements, but for that one wouldn't actually need to read it into speeds[]. Also, I can't find anywhere else in the U-Boot code which makes use of values from that property (this is is the only C code referencing "i2c,speeds"), so it seems pointless to insist that it's there. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-04-07i2c: rcar_i2c: Add R-Car Gen4 supportHai Pham2-1/+2
Add support for R-Car Gen4 SoCs into the driver. While I2C on R-Car Gen4 does support some extra features (Slave Clock Stretch Select), for now it is treated the same as I2C on R-Car Gen3, which let us share the same driver. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use RCAR_64 Kconfig Reviewed-by: Heiko Schocher <hs@denx.de>
2023-03-18i2c: rcar_i2c: Sort Kconfig depends list ascendingMarek Vasut1-1/+1
Sort the list of "depends" symbols in ascending order. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-03-18i2c: rcar_iic: Sort Kconfig depends list ascendingMarek Vasut1-1/+1
Sort the list of "depends" symbols in ascending order. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-03-02sandbox: Tidy up I2C optionsSimon Glass1-0/+20
At present we enable the sandbox I2C driver for all builds. Add a separate Kconfig option to control this, so that it can be disabled in TPL, where it is not needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>