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2022-01-07riscv: sifive: Fix OF_BOARD boot failureBin Meng2-2/+2
When using QEMU to have a quick test of booting U-Boot S-mode payload directly without the needs of preparing the SPI flash or SD card images for SiFive Unleashed board, as per the instructions [1], it currently does not boot any more. This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE, hence we need to add the OF_BOARD logic in board_fdt_blob_setup(). [1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards") Fixes: d6f8ab30a2af ("treewide: Remove OF_PRIOR_STAGE") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-02riscv: Enable SPI flash env for SiFive Unmatched.Thomas Skibo1-0/+1
Enable saving environment to SPI flash memory on SiFive Unmatched. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02riscv: Support booting SiFive Unmatched from SPI.Thomas Skibo1-0/+3
Configure SPI flash devices into SPL. Add SPI boot option to spl.c. Document how to format flash for booting. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-27sandbox: Remove OF_HOSTFILEIlias Apalodimas2-2/+4
OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-20board: sifive: Fix -Wint-to-pointer-cast warningBin Meng2-2/+2
The following warning is seen in unleashed.c in a 32-bit build: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Cast with uintptr_t. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20board: sifive: Fix a potential build warning in board_fdt_blob_setup()Bin Meng2-4/+4
Commit 47d73ba4f4a4 ("board: sifive: overwrite board_fdt_blob_setup in u-boot proper") added a board-specific implementation of board_fdt_blob_setup() which takes a pointer as the return value, but it does not return anything if CONFIG_OF_SEPARATE is not enabled. This will cause a build warning seen when testing booting S-mode U-Boot directly from QEMU, per the instructions in [1]: board/sifive/unleashed/unleashed.c: In function ‘board_fdt_blob_setup’: board/sifive/unleashed/unleashed.c:125:1: warning: control reaches end of non-void function [-Wreturn-type] Return &_end as the default case. [1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-16Merge tag 'v2021.10-rc4' into nextTom Rini2-16/+5
Prepare v2021.10-rc4 Signed-off-by: Tom Rini <trini@konsulko.com> # gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate] # Conflicts: # board/Arcturus/ucp1020/spl.c # cmd/mvebu/Kconfig # common/Kconfig.boot # common/image-fit.c # configs/UCP1020_defconfig # configs/sifive_unmatched_defconfig # drivers/pci/Kconfig # include/configs/UCP1020.h # include/configs/sifive-unmatched.h # lib/Makefile # scripts/config_whitelist.txt
2021-09-11riscv: sifive: unleashed: Add genimage config filesBin Meng2-0/+38
This adds genimage [1] config files for generating SD card and spi-nor images, which can be programmed to an SD card or SPI flash and boot from there. The same images will be used for U-Boot CI testing for this board. [1] https://github.com/pengutronix/genimage Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-07board: sifive: use ccache driver instead of helper functionZong Li2-16/+5
Invokes the common cache_init function to initialize ccache. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-17board: sifive: overwrite board_fdt_blob_setup in u-boot properZong Li2-0/+22
Add board_fdt_blob_setup to return the device tree location which is passed by prior stage in u-boot proper. The generic board_fdt_blob_setup always returns _end, it mignt be ok because u-boot SPL would currently put the dtb there, but it would be broken if we put the dtb to another place and assigned the location into a1 register for u-boot proper. Use the location passed by prior stage would make more sence, because we actually pass the location to u-boot proper and want to use that one, rather than the dtb which in _end. We can't use CONFIG_OF_PRIOR_STAGE because it doens't distinguish the implementation of u-boot SPL and u-boot proper, so u-boot SPL need to reply on the prior stage to pass device tree location as well, but we don't pass the DT from boot rom now. In addition, when CONFIG_OF_PRIOR_STAGE is enabled, the u-boot-spl.bin and u-boot.itb won't include the device tree. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-08-17board: sifive: compile stuff only related to SPL in SPL buildZong Li2-3/+4
As (3581811dc26f "riscv: sifive/fu540: Move SPL related functions to spl.c"), we put the SPL stuff in spl.c, we don't need to compile unleashed.c and unmatched.c in SPL build. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass1-3/+3
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-1/+1
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21board: sifive: unmatched: reset USB hub, PCIe-USB bridge, and ULPI device in SPLVincent Chen1-0/+36
Ensure USB hub, PCIe-USB bridge, and ULPI device to be reset even if the rebooting is without power-cycling. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-21board: sifive: unmatched: refine GEMGXL initialized function in SPLVincent Chen1-19/+39
Create a new function spl_reset_device_by_gpio to reset the device whose reset pin is connected to the GPIO. Then, using this function to initialize GEMGXL. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-21board: sifive: drop stuff related to unmatched revision 1Zong Li1-26/+2
This patch reverts the following commits: - 4b4159d0f3 ("riscv: dts: add dts for unmatched rev1") - ffe9a394df ("board: sifive: support spl multi-dtb on unmatched board") We won't plan to support unmatched that the revision below 3 in u-boot, so they can be dropped because they might be useless. Changed in v2: - rebase codebase to the latest master branch Signed-off-by: Zong Li <zong.li@sifive.com> Suggested-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-21board: sifive: remove the command for setting serial numberZong Li1-22/+1
We wouldn't like to allow user to change the serial number, so remove the command for changing serial number in EEPROM. Signed-off-by: Zong Li <zong.li@sifive.com> Suggested-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-06board: sifive: support spl multi-dtb on unmatched boardZong Li1-2/+26
There are two revisions of unmatched board with different DDR timing, we'd like to support multi-dtb mechanism in SPL, then it selects the right DTB at runtime according to PCB revision in I2C EEPROM. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-06board: sifive: Add an interface to get PCB revisionZong Li1-0/+32
There are different DDR parameter settings for different board revisions. Add a new interface to get the PCB revision to determine which DT should be selected at runtime. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-06riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controllerZong Li1-0/+1
Enable the Opencores I2C controller on FU740 Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-06board: sifive: unmatched: add initial support for a platform ID EEPROMZong Li2-0/+543
Add initial support for the PCB description EEPROM for SiFive HiFive Unmatched boards. This implementation is refactored based on Paul Walmsley's porting and adopt the suggestions from David Abdurachmanov. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-05-31board: sifive: add HiFive Unmatched board supportGreen Wan6-0/+179
Add defconfig and board support for HiFive Unmatched. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-19riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng1-0/+1
At present SiFive Unleashed board uses the Makefile to create the FIT, using USE_SPL_FIT_GENERATOR, which is deprecated as per the Makefile warning. Update to use binman instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08riscv: sifive: Rename fu540 board to unleashedBin Meng5-9/+9
In preparation to add SiFive Unmatched board support, let's rename the existing fu540 board to unleashed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass1-1/+1
In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-28riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controllerPragnesh Patel1-0/+1
Enable support for SiFive FU540 Opencores I2C master controller. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14riscv: sifive/fu540: Move SPL related functions to spl.cBin Meng2-34/+32
It's better to keep all SPL related functions in the same spl.c. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14riscv: sifive/fu540: Drop NET_RANDOM_ETHADDRBin Meng1-1/+0
This option was enabled during the earlier U-Boot porting time. Now we already have the OTP driver in place and the unique MAC address is read from the OTP, there is no need to turn on this option. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC levelBin Meng1-22/+0
All FU540 driver related options should be in the SoC level Kconfig. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14riscv: sifive/fu540: spl: Rename soc_spl_init()Bin Meng1-1/+1
spl_soc_init() seems to be a better name, as all SPL functions names start from the spl_ prefix. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14riscv: sifive/fu540: spl: Drop our own version of board_init_f()Bin Meng1-18/+1
Use the generic board_init_f() provided by the RISC-V library codes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24Revert "Revert "riscv: sifive: fu540: Add gpio-restart support""Bin Meng1-0/+2
This reverts commit 23da3c682a84a2ad67a67287979dd4f5259ff607. Now the build failure of sifive_fu540_defconfig board has been fixed, revert this "revert patch". Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-07-24sifive: fu540: Mark the default env as SPI flashJagan Teki1-0/+1
Mark the default U-Boot environment as SPI flash since this is an on board flash device. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24sifive: fu540: Add runtime boot mode detectionJagan Teki1-6/+19
Add support to detect boot mode at runtime for SiFive FU540 boards. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24riscv: sifive: fu540: Enable SiFive PWM driverPragnesh Patel1-0/+2
This patch enables SiFive PWM driver for the SiFive Unleashed board. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-06Revert "riscv: sifive: fu540: Add gpio-restart support"Tom Rini1-2/+0
As part of merging the next branch in to master, the sifive_fu540 will fail to link: riscv64-linux-ld.bfd: lib/built-in.o: in function `panic_finish': lib/panic.c:28: undefined reference to `do_reset' make[2]: *** [spl/u-boot-spl] Error 1 make[1]: *** [spl/u-boot-spl] Error 2 make: *** [sub-make] Error 2 And while the "fix the build" option of enabling CONFIG_SPL_SYSRESET may solve the issue, it is unclear that it is the correct path exactly. For the moment, I am reverting this commit and take a "revert the revert" and proper fix as soon as it's available. This reverts commit cdae446461191714d692190da1ad4344398adc57. Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bin.meng@windriver.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-03riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel1-1/+9
Add L2 cache node to enable all cache ways from U-Boot proper. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-03riscv: sifive: fu540: Add gpio-restart supportBin Meng1-0/+2
The HiFive Unleashed board wires GPIO pin#10 to the input of the system reset signal. This adds gpio reboot support. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-06-04sifive: fu540: Add sample SD gpt partition layoutJagan Teki1-0/+2
This is a sample GPT partition layout for SD card, right now three important partitions are added to make the system bootable. partition layout: Part Start LBA End LBA Name Attributes Type GUID Partition GUID 1 0x00000022 0x00000821 "loader1" attrs: 0x0000000000000000 type: 5b193300-fc78-40cd-8002-e86c45580b47 guid: cbcbef44-e627-42bc-b134-93b6f3784b8c 2 0x00000822 0x00002821 "loader2" attrs: 0x0000000000000000 type: 2e54b353-1271-4842-806f-e436d6af6985 guid: f54eba28-d8de-4852-978d-1a673777e2ae 3 0x00002822 0x00020821 "rootfs" attrs: 0x0000000000000004 type: 0fc63daf-8483-4772-8e79-3d69d8477de4 type: linux guid: 9561df46-8d55-4799-a83b-cfee9ef6ff93 Note: - loader1 would be fsbl or spl - loader2 would be U-Boot or U-Boot proper Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-06-04riscv: sifive: fu540: add SPL configurationPragnesh Patel4-1/+108
Add a support for SPL which will boot from L2 LIM (0x0800_0000) and then SPL will boot U-Boot FIT image (OpenSBI FW_DYNAMIC + u-boot.bin) from MMC boot devices. SPL related code is leveraged from FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel1-1/+1
Add SiFive fu540 cpu to support RISC-V arch Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04sifive: fu540: add ddr driverPragnesh Patel1-0/+2
Add driver for fu540 to support ddr initialization in SPL. This driver is based on FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04riscv: sifive: fu540: Use OTP DM driver for serial environment variablePragnesh Patel2-73/+42
Use the OTP DM driver to set the serial environment variable. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-02fu540: Remove ARCH= references from documentationTom Rini1-0/+1
When building U-Boot we select the architecture via Kconfig and not ARCH being passed in via the environment or make cmdline. While in here, add the doc file to the MAINTAINERS entry. Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-05-26sifive: fix palmer's email addressPragnesh Patel1-1/+1
Fix Palmer's email address Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-05-18common: Drop linux/bug.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18command: Remove the cmd_tbl_t typedefSimon Glass1-0/+1
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-30sifive: fu540: Enable spi-nor flash supportJagan Teki1-0/+3
HiFive Unleashed A00 support is25wp256 spi-nor flash, So enable the same and add test result log for future reference. Tested on SiFive FU540 board. Thanks to Sagar for various use cases and tests. [QUAD mode in dt with spi-tx-bus-width: <4>] pp opcode = 0x34 [QUAD MODE] read opcode = 0x6c [QUAD MODE] erase opcode = 0x21 SPI-NOR: 1. erase entire flash: Pass 2. write entire flash: Pass 3. read entire flash: Pass 4. cmp 32MiB read back data: Pass 5. MMC: Booted Linux and dtb from mmc [SPI MODE in dt with spi-tx-bus-width: <1>] pp opcode = 0x12 [SPI MODE] read opcode = 0xc [SPI MODE] erase opcode = 0x21 SPI-NOR: 1. erase entire flash: Pass 2. write entire flash: Pass 3. read entire flash: Pass 4. cmp 32MiB read back data: Pass 5. MMC: Booted Linux and dtb from mmc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
2019-10-18configs: fu540: enable gpio driverSagar Shrikant Kadam1-0/+3
Enable the DM based GPIO driver for FU540-C000 SoC. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-30 21:42:37 +0000