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2021-08-11riscv: qemu: Enable MTD NOR flash supportBin Meng1-0/+2
Enable support to the 2 NOR flashes on the QEMU RISC-V virt machine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-18efi_capsule: Move signature from DTB to .rodataIlias Apalodimas2-44/+0
The capsule signature is now part of our DTB. This is problematic when a user is allowed to change/fixup that DTB from U-Boots command line since he can overwrite the signature as well. So Instead of adding the key on the DTB, embed it in the u-boot binary it self as part of it's .rodata. This assumes that the U-Boot binary we load is authenticated by a previous boot stage loader. Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-05-18efi_loader: capsule: Remove the check for capsule_authentication_enabled ↵Sughosh Ganu1-6/+0
environment variable The current capsule authentication code checks if the environment variable capsule_authentication_enabled is set, for authenticating the capsule. This is in addition to the check for the config symbol CONFIG_EFI_CAPSULE_AUTHENTICATE. Remove the check for the environment variable. The capsule will now be authenticated if the config symbol is set. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-15ppc: qemu: Create a virtual memory mapping of the platform busBin Meng2-0/+35
QEMU ppce500 target can dynamically instantiate an eTSEC device on a platform bus if "-device eTSEC" is given to QEMU. It is presented as a "simple-bus" in the device tree, with an additional compatible string "qemu,platform". Let's create a virtual memory mapping for it in misc_init_r(), in preparation to adding eTSEC support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-12qemu: arm: select QFW, MMIO on qemu-armAsherah Connor1-0/+2
Select CMD_QFW and QFW_MMIO in the qemu-arm board (covers arm and arm64). Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-12x86: qemu: move QFW to its own uclassAsherah Connor1-0/+1
We move qfw into its own uclass and split the PIO functions into a specific driver for that uclass. The PIO driver is selected in the qemu-x86 board config (this covers x86 and x86_64). include/qfw.h is cleaned up and documentation added. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-05ppc: qemu: Move board directory from board/freescale to board/emulationBin Meng4-0/+342
board/emulation is the place for other QEMU targets like x86, arm, riscv. Let's move the qemu-ppce500 board codes there. List me as a co-maintainer for this board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-0/+1
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-31efi: capsule: Add support for uefi capsule authenticationSughosh Ganu2-0/+49
Add support for authenticating uefi capsules. Most of the signature verification functionality is shared with the uefi secure boot feature. The root certificate containing the public key used for the signature verification is stored as part of the device tree blob. The root certificate is stored as an efi signature list(esl) file -- this file contains the x509 certificate which is the root certificate. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31qemu: common: Set dfu_alt_info variable for the platformSughosh Ganu3-0/+70
The dfu framework uses the dfu_alt_info environment variable to get information that is needed for performing the firmware update. Add logic to set the dfu_alt_info for the qemu arm64 platform to reflect the two mtd partitions created for the u-boot env and the firmware image. This can be subsequently extended for other qemu architectures which need this variable set. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31qemu: common: Add support for dynamic mtdparts for the platformSughosh Ganu4-0/+107
Add support for setting the default values for mtd partitions on the platform. This would be used for updating the firmware image using uefi capsule update with the dfu mtd backend driver. Currently, values have been defined for the qemu arm64 platform, with default values defined for the mtd partitions based on the NOR flash. This can be subsequently extended for other qemu architectures which need mtdparts set. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31qemu: arm: Initialise virtio devices in board_late_initSughosh Ganu1-0/+5
On the qemu arm platform, the virtio devices are initialised in the board_init function, which gets called before the initr_pci. With this sequence, the virtio block devices on the pci bus are not initialised. Move the initialisation of the virtio devices to board_late_init which gets called after the call to initr_pci. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-11-17riscv: enable SATA disk on QEMU RISC-VHeinrich Schuchardt1-0/+7
Allow attaching a virtual SATA disk to QEMU RISC-V by implying AHCI, AHCI_PCI, CMD_SCSI, DM_SCSI, PCI_INIT_R, SCSI, SCSI_AHCI. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-11-17riscv: sort SPECIFIC_OPTIONSHeinrich Schuchardt1-19/+19
Sort implied options in BOARD_SPECIFIC_OPTIONS in the same sequence as in .config. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-09-01x86: qemu: Remove dead codeAndy Shevchenko3-9/+1
start.S does nothing and can be safely removed. Makefile is still being used by the build system, so simply replace the rule in it. We use stub C-file like it's done for other boards. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-29arm: qemu: override flash accessors to use virtualizable instructionsArd Biesheuvel1-0/+45
Some instructions in the ARM ISA have multiple output registers, such as ldrd/ldp (load pair), where two registers are loaded from memory, but also ldr with indexing, where the memory base register is incremented as well when the value is loaded to the destination register. MMIO emulation under KVM is based on using the architecturally defined syndrome information that is provided when an exception is taken to the hypervisor. This syndrome information describes whether the instruction that triggered the exception is a load or a store, what the faulting address was, and which register was the destination register. This syndrome information can only describe one destination register, and when the trapping instruction is one with multiple outputs, KVM throws an error like kvm [615929]: Data abort outside memslots with no valid syndrome info on the host and kills the QEMU process with the following error: U-Boot 2020.07-rc3-00208-g88bd5b179360-dirty (Jun 06 2020 - 11:59:22 +0200) DRAM: 1 GiB Flash: error: kvm run failed Function not implemented R00=00000001 R01=00000040 R02=7ee0ce20 R03=00000000 R04=7ffd9eec R05=00000004 R06=7ffda3f8 R07=00000055 R08=7ffd9eec R09=7ef0ded0 R10=7ee0ce20 R11=00000000 R12=00000004 R13=7ee0cdf8 R14=00000000 R15=7ff72d08 PSR=200001d3 --C- A svc32 QEMU: Terminated This means that, in order to run U-Boot in QEMU under KVM, we need to avoid such instructions when accessing emulated devices. For the flash in particular, which is a hybrid between a ROM (backed by a read-only KVM memslot) when in array mode, and an emulated MMIO device (when in write mode), we need to take care to only use instructions that KVM can deal with when they trap. So override the flash read accessors that are used when running on QEMU under KVM. Note that the the 64-bit wide read and write accessors have been omitted: they are never used when running under QEMU given that it does not emulate CFI flash that supports it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-29arm: qemu: implement enable_caches()Ard Biesheuvel1-0/+7
Add an override for enable_caches to enable the I and D caches, along with the cached 1:1 mapping of all of DRAM. This is needed for running U-Boot under virtualization with QEMU/kvm. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2020-07-24riscv: qemu: Add syscon reboot and poweroff supportBin Meng1-0/+4
This adds syscon reboot and poweroff support to QEMU RISC-V. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-05-18common: Drop log.h from common headerSimon Glass2-0/+2
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop image.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-23Revert "riscv: qemu: clear kernel-start/-end in device tree as workaround ↵Lukas Auer2-40/+0
for BBL" The commit was added as a workaround required in QEMU when using BBL as the supervisor binary interface (SBI) for Linux. We are now using OpenSBI to provide the SBI, the workaround is therefore not required anymore and can be removed. This reverts commit 897206c5cc5c6ac0dc2ab851044e42baada3785b. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-01-07efi: qemu: arm64: Add efi_rng_protocol implementation for the platformSughosh Ganu1-0/+42
Add support for the EFI_RNG_PROTOCOL routines for the qemu arm64 platform. EFI_RNG_PROTOCOL is an uefi boottime service which is invoked by the efi stub in the kernel for getting random seed for kaslr. The routines are platform specific, and use the virtio-rng device on the platform to get random data. The feature can be enabled through the following config CONFIG_EFI_RNG_PROTOCOL Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Changed SPDX header to use /* instead of //. Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-12-02common: Move some board functions out of common.hSimon Glass1-0/+1
A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-08-26riscv: qemu: Fix kconfig build warningBin Meng1-0/+1
When 'make qemu-riscv64_defconfig', there is a build warning: board/emulation/qemu-riscv/Kconfig:24: warning: config symbol defined without type Fix it by specifying the config symbol type to 'hex'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-08-26riscv: qemu: add SPL configurationLukas Auer3-0/+29
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The configurations are meant to help the development of SPL on RISC-V. The configurations enable RAM as the only SPL boot device. Images must be loaded at address 0x80200000. In the default boot flow, U-Boot SPL starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is then started in supervisor mode by OpenSBI. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-08-11env: Move env_set_hex() to env.hSimon Glass1-0/+1
Move env_set_hex() over to the new header file along with env_set_addr() which uses it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-18qemu-riscv: enable VIRTIO_PCIDavid Abdurachmanov1-0/+1
libvirt v.5.3.0 with QEMU 4.0.0 or above uses PCI automatically and thus devices (network, storage, etc) are connected via PCI. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-05riscv: qemu: Enable e1000 and nvme supportBin Meng1-0/+2
Since we have added the PCI support to the 'virt' target, enable e1000 and NVME as alternate network and storage devices for these virtio based devices. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-06-05riscv: qemu: Enable PCI host ECAM generic driverBin Meng1-0/+4
QEMU 4.0.0 'virt' target integrates a generic ECAM PCI host. Enable the driver for it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit systemAnup Patel1-1/+2
For 32bit system, the OpenSBI (or BBL) will jump to 0x80400000 address in S-mode whereas for 64bit system it will jump to 0x80200000 address in S-mode. Currently, the S-mode U-Boot sets SYS_TEXT_BASE to 0x80200000 for both 32bit and 64bit system. This breaks S-mode U-Boot for 32bit system. This patch sets different SYS_TEXT_BASE for 32bit and 64bit system so that S-mode U-Boot works fine for both. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Tested-by: Karsten Merker <merker@debian.org>
2019-04-08riscv: qemu: enable SMPLukas Auer1-0/+1
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27riscv: Rename cpu/qemu to cpu/genericAnup Patel1-2/+2
The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-18riscv: qemu: Imply SIFIVE_SERIAL for emulationAnup Patel1-0/+1
This patch enables SiFive UART driver for QEMU RISC-V emulation by implying SIFIVE_SERIAL on BOARD_SPECIFIC_OPTIONS. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-18riscv: qemu: Add platform-specific Kconfig optionsBin Meng1-0/+1
Add the QEMU RISC-V platform-specific Kconfig options, to include CPU and timer drivers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-05riscv: Add S-mode defconfigs for QEMU virt machineAnup Patel1-0/+2
This patch adds S-mode defconfigs for QEMU virt machine so that we can run u-boot in S-mode on QEMU using M-mode runtime firmware (BBL or equivalent). Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05riscv: qemu: Use different SYS_TEXT_BASE for S-modeAnup Patel1-1/+2
When u-boot runs in S-mode, the M-mode runtime firmware (BBL or equivalent) uses memory range in 0x80000000 to 0x80200000. Due to this, we cannot use 0x80000000 as SYS_TEXT_BASE when running in S-mode. Instead for S-mode, we use 0x80200000 as SYS_TEXT_BASE. Even Linux RISC-V kernel ignores/reserves memory range 0x80000000 to 0x80200000 because it runs in S-mode. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-11-26riscv: qemu: clear kernel-start/-end in device tree as workaround for BBLLukas Auer2-0/+40
QEMU specifies the location of Linux (supplied with the -kernel argument) in the device tree using the riscv,kernel-start and riscv,kernel-end properties. We currently rely on the SBI implementation of BBL to run Linux and therefore embed Linux as payload in BBL. This causes an issue, because BBL detects the kernel properties in the device tree and ignores the Linux payload as a result. Work around this issue by clearing the kernel properties in the device tree before booting Linux. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-26riscv: qemu: detect and boot the kernel passed by QEMULukas Auer2-0/+30
QEMU embeds the location of the kernel image in the device tree. Store this address in the environment as variable kernel_start. It is used in the board-local distro boot command QEMU to boot the kernel with the U-Boot device tree. The QEMU boot command is added as the first boot target device. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-11-26riscv: qemu: use device tree passed by prior boot stageLukas Auer1-11/+0
QEMU provides a device tree, which is passed to U-Boot using register a1. We are now able to directly select the device tree with the configuration CONFIG_OF_PRIOR_STAGE. Replace the hard-coded address in qemu-riscv with it. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2018-11-14x86: qemu: Imply virtio PCI transport and device driversBin Meng1-0/+3
Add virtio drivers for QEMU x86 targets. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14arm: qemu: Enumerate virtio bus during early bootBin Meng2-0/+14
Currently devices on the virtio bus is not automatically enumerated, which means peripherals on the virtio bus are not discovered by their drivers. This uses board_init() to do the virtio enumeration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14arm: qemu: Add a Kconfig in the board directoryBin Meng1-0/+9
This adds a Kconfig file in the board directory, so that some board-specific options can be specified there. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14riscv: qemu: Include some useful commandsBin Meng1-0/+8
With the virtio net and blk drivers, we can do more stuff with some useful commands. Imply those in the board Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14riscv: qemu: Enumerate virtio bus during early bootBin Meng2-0/+12
Currently devices on the virtio bus is not automatically enumerated, which means peripherals on the virtio bus are not discovered by their drivers. This uses board_init() to do the virtio enumeration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-03riscv: Add QEMU virt board supportBin Meng4-0/+57
This adds QEMU RISC-V 'virt' board target support, with the hope of helping people easily test U-Boot on RISC-V. The QEMU virt machine models a generic RISC-V virtual machine with support for the VirtIO standard networking and block storage devices. It has CLINT, PLIC, 16550A UART devices in addition to VirtIO and it also uses device-tree to pass configuration information to guest software. It implements RISC-V privileged architecture spec v1.10. Both 32-bit and 64-bit builds are supported. Support is pretty much preliminary, only booting to U-Boot shell with the UART driver on a single core. Booting Linux is not supported yet. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-09-05ARM: qemu-arm: Fix qemu_arm64_defconfig for QEMU 3.0Tuomas Tynkkynen1-1/+17
QEMU 3.0 introduced additional memory-mapped regions for PCI-E ECAM and MMIO. Thus we need to add them to our MMU map or U-Boot will crash with a Synchronous Abort during PCI-E probing when it tries to access the unmapped ECAM memory area. Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-07-19lib: fdtdec: Rename routine fdtdec_setup_memory_size()Siva Durga Prasad Paladugu1-1/+1
This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-06-17x86: Drop QEMU-specific EFI payload supportBin Meng2-5/+3
Now that we have generic EFI payload support for all x86 boards, drop the QEMU-specific one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26ARM: qemu-arm: Bump RAM size in AArch64 MMU tableTuomas Tynkkynen1-1/+1
Now that PCI devices work with highmem-enabled QEMU emulation, bump up the RAM size in the MMU tables to gain access to the full 255 GB of RAM potential instead of the puny 3 GB. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
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