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2020-06-04Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini17-24/+1841
- Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01") Move sbi_probe_extension() out of CONFIG_SBI_V01. - SiFive FU540 support SPL.
2020-06-04Merge tag 'u-boot-atmel-fixes-2020.07-a' of ↵Tom Rini1-0/+8
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel fixes for 2020.07 cycle This set includes just two small commits that fix a build warning and add a missing serial node.
2020-06-04riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01Bin Meng1-18/+19
sbi_probe_extension() is an API defined in SBI v0.2, not v0.1. Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-06-04riscv: sbi: Remove sbi_spec_versionBin Meng2-5/+0
U-Boot defaults to use SBI v0.2. Howerver there is a global variable sbi_spec_version that stills refers to v0.1. Since it is not used anywhere, let's remove it. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-06-04riscv: sifive: fu540: add SPL configurationPragnesh Patel4-0/+46
Add a support for SPL which will boot from L2 LIM (0x0800_0000) and then SPL will boot U-Boot FIT image (OpenSBI FW_DYNAMIC + u-boot.bin) from MMC boot devices. SPL related code is leveraged from FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel7-0/+135
Add SiFive fu540 cpu to support RISC-V arch Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linuxPragnesh Patel2-1/+45
This sync has changes required to use GPIO in U-Boot and U-Boot SPL. Sync dts from linux v5.7-rc2 commit: "riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file" (sha1: 0a91330b2af9f71ceeeed483f92774182b58f6d9) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04riscv: sifive: dts: fu540: set ethernet clock ratePragnesh Patel1-0/+5
Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps, Earlier this is done by FSBL. With this change We can remove the ethernet clock rate code from FSBL. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04riscv: sifive: dts: fu540: add U-Boot dmc nodePragnesh Patel1-0/+9
Add dmc node to enable ddr driver. dmc is used to initialize the memory controller. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04sifive: dts: fu540: Add DDR controller and phy register settingsPragnesh Patel1-0/+1489
Add DDR controller and phy register settings, taken from fsbl (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04riscv: sifive: dts: fu540: Add board -u-boot.dtsi filesPragnesh Patel2-0/+76
Devicetree files in FU540 platform is synced from Linux, like other platforms does. Apart from these U-Boot in FU540 would also require some U-Boot specific node like clint. So, create board specific -u-boot.dtsi files. This would help of maintain U-Boot specific changes separately without touching Linux dts(i) files which indeed easy for syncing from Linux between releases. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04riscv: Add _image_binary_end for SPLPragnesh Patel1-0/+1
For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04riscv: sifive: fu540: Use OTP DM driver for serial environment variablePragnesh Patel2-0/+16
Use the OTP DM driver to set the serial environment variable. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-03Merge tag 'efi-2020-07-rc4' of ↵Tom Rini1-0/+9
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-07-rc4 This patch series addresses the following issues: * allow compiling with clang * add missing function descriptions to the HTML documentation * simplify the validation of UEFI images * validate load options in the UEFI boot manager In a preparatory patch a structure definition is moved.
2020-06-03Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini1-9/+9
- H6 emac support - USB PHY H6 logic alignment
2020-06-03efi_loader: allow compiling with clangHeinrich Schuchardt1-0/+9
On ARM systems gd is stored in register r9 or x18. When compiling with clang gd is defined as a macro calling function gd_ptr(). So we can not make assignments to gd. In the UEFI sub-system we need to save gd when leaving to UEFI binaries and have to restore gd when reentering U-Boot. Define a new function set_gd() for setting gd and use it in the UEFI sub-system. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Tom Rini <trini@konsulko.com>
2020-06-02ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCIMasahiro Yamada1-0/+1
arch/arm/include/asm/system.h declares psci_arch_init(), but it is surrounded by #ifdef CONFIG_ARMV8_PSCI. psci_arch_init() is called for CONFIG_ARMV7_PSCI too. Add the missing function declaration. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-06-01Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini12-100/+223
- Corrected some FSP-M/FSP-S settings for Chromebook Coral - ICH SPI driver and mrccache fixes for obtaining the SPI memory map - Fixed various warnings generated by latest version IASL when compiling ACPI tables
2020-06-02x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridgeBin Meng1-1/+1
PCI Firmware specification requires _UID() and doesn't require _ADR() to be set. Replace latter by former. This fixes the following warning reported by ACPICA 20200430: Warning 3073 - Multiple types (Device object requires either a _HID or _ADR, but not both) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02x86: baytrail: acpi: Replace _ADR() by _UID() in description of PCI host bridgeBin Meng1-1/+1
PCI Firmware specification requires _UID() and doesn't require _ADR() to be set. Replace latter by former. This fixes the following warning reported by ACPICA 20200430: Warning 3073 - Multiple types (Device object requires either a _HID or _ADR, but not both) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02x86: baytrail: acpi: Create buffers outside of the methodsBin Meng1-12/+12
Create buffers outside of the methods as ACPICA 20200430 complains about this: Remark 2173 - Creation of named objects within a method is highly inefficient, use globals or method local variables instead (\_SB.PCI0.LPCB.IURT._CRS) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02x86: tangier: acpi: Drop _HID() where enumerated by _ADR()Andy Shevchenko1-1/+0
ACPICA complains that either _HID() or _ADR() should be used. For General Purpose DMA we may not drop the _ADR() because the device is enumerated by PCI. Thus, simple drop _HID(). Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: tangier: acpi: Drop _ADR() where _HID() is presentAndy Shevchenko1-1/+0
ACPICA complains that either _HID() or _ADR() should be used. Drop _ADR() where _HID() is present. Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: tangier: acpi: Replace _ADR() by _UID() in description of PCI host bridgeAndy Shevchenko1-1/+1
PCI Firmware specification requires _UID() and doesn't require _ADR() to be set. Replace latter by former. Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: tangier: acpi: Create buffers outside of the methodsAndy Shevchenko1-46/+49
Create buffers outside of the methods as ACPICA 20200214 complains about this: Remark 2173 - Creation of named objects within a method is highly inefficient, use globals or method local variables instead Reported-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: apl: Add hex offsets for registers in FSP-SSimon Glass1-0/+72
When comparing hex dumps it is useful to see the offsets of the registers. Add them in where they correspond to a multiple of 16. Possibly it would be useful to have a a command to output the FSP values in human-readable form, making use of the fsp_bindings implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: coral: Correct some FSP-S settingsSimon Glass1-7/+3
Some settings were modified slightly in the device-tree conversion. Return these to their original values. This includes some audio settings and a few others that have changed. Note that we still rely on the FSP defaults for most values, so there is no need to specify a value if the FSP default is suitable. This makes WiFi work again. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: apl: Add hex offsets for registers in FSP-MSimon Glass1-2/+15
When comparing hex dumps it is useful to see the offsets of the registers. Add them in where they correspond to a multiple of 16. Possibly it would be useful to have a a command to output the FSP values in human-readable form, making use of the fsp_bindings implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: coral: Correct some FSP-M settingsSimon Glass1-0/+5
Some settings were modified slightly in the device-tree conversion. Return these to their original values. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: mrccache: Allow use before driver model is activeSimon Glass2-21/+29
The change to avoid searching the device tree does not work on boards wich don't have driver model set up this early, for example minnowmax. Put back the old code (converted to livetree) as a fallback for these devices. Also update the documentation. This is tested on minnowmax, link, samus and coral. Fixes: 87f1084a630 (x86: Adjust mrccache_get_region() to use livetree) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02x86: spl: Print the error on SPL failureSimon Glass1-2/+2
The error code is often useful to figure out what is going on. Printing it does not increase code size much, so print out the error and then hang. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02x86: spi: Add a way to access the SPI mapping via registersSimon Glass2-5/+33
At present the PCI BDF (bus/device/function) is needed to access the SPI mapping, since the registers are at BAR0. This doesn't work when PCI auto-config has not been done yet, since BARs are unassigned. Add another way to find the mapping, using the MMIO base, if the caller knows this. Also add a missing function comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-01sunxi: Silence warning about non-static inline functionSamuel Holland1-9/+9
When compiling with CONFIG_SPL_SERIAL=n, gcc warns about mbus_configure_port not being marked as static: In file included from include/common.h:34, from arch/arm/mach-sunxi/dram_sunxi_dw.c:11: include/log.h:185:4: warning: 'printf' is static but used in inline function 'mbus_configure_port' which is not static 185 | printf(pr_fmt(fmt), ##args); \ | ^~~~~~ include/log.h:192:2: note: in expansion of macro 'debug_cond' 192 | debug_cond(_DEBUG, fmt, ##args) | ^~~~~~~~~~ arch/arm/mach-sunxi/dram_sunxi_dw.c:100:2: note: in expansion of macro 'debug' 100 | debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); | ^~~~~ Fix this by updating the function accordingly. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01Merge tag 'u-boot-stm32-20200528' of ↵Tom Rini3-4/+29
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - stm32mp15: fix DT on DHCOR SOM and avenger96 board - stm32mp15: re-enable KS8851 on DHCOM
2020-05-31Merge tag 'u-boot-rockchip-20200531' of ↵Tom Rini11-10/+1179
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix mmc of path after syncfrom kernel dts; - Add dwc3 host support with DM for rk3399; - Add usb2phy and typec phy for rockchip platform; - Migrate board list doc to rockchip.rst; - Add rk3399 Pinebook Pro board support; - Update dram_init in board_init and add memory node in SPL;
2020-05-31rockchip: spl: do full dram_init instead of only probingHeiko Stuebner1-5/+4
Parts of later SPL may need RAM information as well, so do full dram_init() call, which includes the existing dram probing but also initializes the ram information in gd. dram_init() from sdram.c does the following steps: - uclass_get_device(UCLASS_RAM, ...) like the current code - ret = ram_get_info(dev, &ram); - gd->ram_size = ram.size; CONFIG_SPL_RAM already makes sure that sdram.c gets compiled and thus no other variant of dram_init() can exist. So it's the same functionality as before and only adds that the SPL now aquires knowledge about the amount of available ram, which it didn't know about before. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31rockchip: Add initial support for the Pinebook Pro laptop from Pine64.Peter Robinson2-0/+51
Specification: - Rockchip RK3399 - 4GB Dual-Channel LPDDR4 - eMMC socket - mSD card slot - 128Mbit (16Mb) SPI Flash - AP6256 for 11AC WiFi + BT5 - 14 inch 1920*1080 eDP MiPi display - Camera - USB 3.0, 2.0 ports - Type-C port with alt-mode display (DP 1.2) and 15W charge - DC 5V/3A - optional PCIe slot for NVMe SSD drive Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31arm: dts: rockchip: Add initial DT for Pinebook ProPeter Robinson2-0/+1097
Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30ARM: dts: rk3399-evb: usb3.0 host supportFrank Wang1-0/+13
Configure 'tcphy1' and 'usbdrd_dwc3_1' nodes to support USB3.0 host for Rockchip RK3399 Evaluation Board. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29arm: mach-rockchip: bind sub-nodes for rk3399_sysconFrank Wang1-0/+3
There are some sub-nodes under the grf DT, so add bind callback function in rk3399 syscon driver to scan them recursively. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29arm64: dts: rk3399-nanopi4: Add u-boot,spl-boot-orderJagan Teki1-0/+6
Add u-boot,spl-boot-order as sdhci and sdmmc for booting from eMMC and SD card. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29rockchip: Fix spl mmc boot device ofpathJagan Teki4-5/+5
Linux v5.7-rc1 dts(i) sync has changed the sdmmc node from dwmmc@fe320000 to mmc@fe320000 and this ofpath is being used in rockchip spl bootdevice code. So, update the ofpath with a new node name and prefix "same-as-spl" to missing u-boot,spl-boot-order. Bug log: U-Boot SPL 2020.07-rc2-00256-g9c5fef5774 (May 24 2020 - 20:20:43 +0530) Trying to boot from MMC2 mmc_load_image_raw_sector: mmc block read error Trying to boot from MMC1 mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices Fixes: 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux" Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29arm: dts: meson-gxl: fix USB gadget by adding missing nodes for U-BootNeil Armstrong5-4/+24
The khadas-vim, khadas-vim2, libretech-ac & libretech-*-pc boards were missing DT tweak to enable USB gadget. Add them to their -u-boot.dtsi files and include the right gxl-u-boot.dtsi. Fixes: a19e8a0f03 ("arm: dts: meson-gxl: Add USB Gadget nodes for U-Boot") Reported-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-05-29arm: dts: khadas-vim3: include meson-g12-common-u-boot.dtsi to enable HDMI ↵Neil Armstrong1-0/+2
output Include the common g12 u-boot tweaks to permit enabling video output tweaks on Khadas VIM3 boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-05-28ARM: dts: stm32: Disable SDR104 mode on AV96Marek Vasut1-1/+0
Disable SDR104 mode until we know it is really stable. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-28ARM: dts: stm32: Repair I2C2 operation on AV96Marek Vasut1-3/+3
The I2C2 uses different pinmux on AV96, use correct pinmux and also add comments about the I2C being present on the "low-speed" expansion connector X6. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-28ARM: dts: stm32: Add alternate pinmux for I2C2 pinsMarek Vasut1-0/+17
Add another mux option for I2C2 pins, this is used on AV96 board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-28ARM: stm32: Hog GPIO PF7 high on DHCOR to unlock SPI NOR nWPMarek Vasut1-0/+9
The SPI NOR nWP line is connected to GPIO PF7 on the SoM, pull the GPIO line high by default to clear SPI NOR WP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-27Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini5-105/+132
- Fix SPI boot on ds414 (Ezra) - Fix PHY mode definition on armada-3720-uDPU (Jakov) - Convert CRS305-1G-4S to generic version (Luka)
2020-05-27cbfs: Don't require the CBFS size with cbfs_init_mem()Simon Glass1-2/+1
The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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