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2016-03-14dm: Use uclass_first_device_err() where it is usefulSimon Glass8-24/+14
Use this new function in places where it simplifies the code. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-10Merge git://git.denx.de/u-boot-rockchipTom Rini3-9/+9
2016-03-10rockchip: rk3288: correct sdram settingChris Zhong1-7/+7
The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2, and it expects uboot to store the value using a same protocol. But now the ddr setting value is different with DMC, so if you enable the DMC, system would crash in kernel. Correct the sdram setting here, according to the requirements of kernel. [0] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/ chromeos-3.14/drivers/clk/rockchip/clk-rk3288-dmc.c Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-03-10rockchip: make configure_emmc() empty for Firefly-RK3288FUKAUMI Naoki1-1/+1
on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for Firefly-RK3288. (it's fine for Rock2) $ gcc --version gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204 Copyright (C) 2015 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. $ ./tools/mkimage -n rk3288 -T rksd -d spl/u-boot-spl-dtb.bin u-boot-spl-dtb.img Warning: SPL image is too large (size 0x80d0) and will not boot to reduce size of SPL image, this patch makes configure_emmc() empty for Firefly-RK3288 as same as Rock2. Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-By: Vagrant Cascadian <vagrant@debian.org>
2016-03-10rockchip: rk3036: change ddr frequency to 400MLin Huang1-1/+1
emac may use dpll as clock parent, and it request the clock frequency multiples of 50, so change ddr frequency to 400M. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-03-09MIPS: fix mips_cache fallback without __builtin_mips_cacheMatthias Schiffer1-1/+1
The "R" constraint supplies the address of an variable in a register. Use "r" instead and adjust asm to supply the content of addr in a register instead. Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations") Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-03-08sandbox: Fix building with LLVMTom Rini2-1/+7
- The macro __BIGGEST_ALIGNMENT__ is gcc-specific. If it is not defined we'll just assume 16. This is correct for at least the common cases and LLVM does not provide an equivalent macro. - When linking U-Boot we're passing -T to the linker, and while gcc will just pass this along with LLVM we need to be specific. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-03-08omap3: Use raw SPL by default for mmc1Alexander Graf1-2/+0
Now that we fall back to the FS code path when we don't find u-boot at the raw sector offset, there is no good reason to not default to raw boot. With this patch, I can successfully boot u-boot from a raw sector offset on beagle-xm. Signed-off-by: Alexander Graf <agraf@suse.de>
2016-03-09ARM: uniphier: allow debug_ll_init() to do nothing for unknown SoCsMasahiro Yamada1-0/+1
This function should just return for unknown SoCs rather than writing unexpected values to registers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-09ARM: uniphier: fix build error when CONFIG_CMD_DDRMPHY_DUMP=yMasahiro Yamada1-16/+2
The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data"). Fixes: 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-02colibri-vf: Disable pull-up configuration in GPIO pin muxBhuvanchandra DV1-1/+1
During very early boot-ROM execution the pinmux configuration isi in Hi-Z state. If pull-up is enabled on GPIO pad's there will be a short period of toggle from high to low on the IO when GPIO is set low during boot. To avoid this glitch, disable pull-up configuration in GPIO pinmux. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
2016-02-29sniper: Various minor cleanups, missing Kconfig configs and reorganisationPaul Kocialkowski1-1/+1
This introduces some minor cleanups, regarding aspects such as board name, code and headers organization as well as deprecated and missing config options. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-29ARM: start.S: fix typoYuichiro Goto7-7/+7
Fix typo in comment about position of 'A' bit in several start.S. Signed-off-by: Yuichiro Goto <goto.yuichiro@espark.co.jp>
2016-03-01ARM: uniphier: fix warnings reported by aarch64 compilerMasahiro Yamada3-4/+6
The UniPhier SoC family has not supported ARMv8 yet, but these would cause warnings if they were compiled with a 64bit compiler. Before adding the ARMv8 support really, fix them now. Because UniPhier SoCs do not support Large Physical Address Extension, casting "phys_addr_t" into "unsigned long" would carry the address as is. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-01ARM: uniphier: prepare directory structure for ARMv8 SoC supportMasahiro Yamada11-11/+22
Before adding ARMv8 support, this commit refactors the directory structure. Move ARMv7 specific files to arch/arm/mach-uniphier/arm32 to avoid a mess by mixture of ARMv7 and ARMv8 code. Also move the "select CPU_V7" to the lower-level menu because we will have to select ARM64 instead of CPU_V7 for ARMv8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rename PH1-LD10/PH1-sLD11 to PH1-LD20/PH1-LD11Masahiro Yamada3-14/+14
Due to the company's awful projecting, PH1-LD10 and PH1-sLD11 have been renamed to PH1-LD20 and PH1-LD11, respectively. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework UniPhier SoC select in KconfigMasahiro Yamada1-34/+28
The chains of "depends on <SoC_name>" in the current Kconfig is clumsy. The idea here is to allow users to choose a SoC group first (SoC group consists of some SoCs that can coexist in one binary). Then, allow to enable/disable each SoC support in the selected SoC group. This makes the Kconfig menu clearer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rename variable for DRAM controller base addressMasahiro Yamada4-114/+113
Rename the variable that contains the base address for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: deprecate umc_dram_init_{start, poll}Masahiro Yamada4-23/+18
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused macros for UMC base addressesMasahiro Yamada1-11/+0
These macros are no longer used. These base addresses are SoC-dependent, so they should not be placed in the header. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework DRAM size handling in UMC init codeMasahiro Yamada2-15/+15
Currently, DRAM size is converted twice: size in byte -> size in Gbit -> enum Optimize the code by converting the "size in byte" into enum directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-Pro4 UMC init code with "for" loopMasahiro Yamada1-55/+59
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-LD4 UMC init code with "for" loopMasahiro Yamada1-41/+49
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize PH1-sLD8 UMC init code with "for" loopMasahiro Yamada1-40/+43
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for PH1-LD4Masahiro Yamada1-24/+55
Move frequency-dependent register settings to arrays for clean-up. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: support more DRAM use cases for PH1-sLD8Masahiro Yamada1-6/+40
Support DDR3-1600 / 512MB DDR size. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for PH1-sLD8Masahiro Yamada1-8/+29
Move frequency-dependent register settings to arrays for clean-up. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor DDR-PHY init codeMasahiro Yamada1-30/+40
The if-else statements for the frequency-dependent register settings seem clumsy. Moving them to arrays would make it cleaner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused argument of ph1_ld4_ddrphy_init()Masahiro Yamada5-16/+10
The DDR PHY settings no longer depend on the DRAM size. Drop the argument from the init function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: merge DDR PHY init code for 3 SoCsMasahiro Yamada7-167/+14
Now these three are almost the same. The only difference is the DTPR1 register dependency on the DRAM size, but it can be ignored. (It has already been ignored in PH1-sLD8 and PH1-Pro4.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add a field to specify DDR3+Masahiro Yamada9-35/+44
Add a field to distinguish DDR3+ from (standard) DDR3. It also allows to delete CONFIG_DDR_STANDARD (this is not a software configuration, but a board attribute). Default DDR3 spec for each SoC: PH1-LD4, PH1-sLD8: DDR3+ Others: DDR3 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: disable debug circuit clocks for PH1-Pro4Masahiro Yamada1-2/+2
These settings control the clocks around the memory controller. The debug ability is unneeded once it works properly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settingsMasahiro Yamada4-60/+0
These settings were used only for the PH1-sLD3 and older SoCs. The PH1-LD4 and newer one just ignore them because their DDR-PHY take care of such timing parameters instead. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: refactor UMC init code for ProXstream2Masahiro Yamada1-45/+64
Currently, a dummy value is defined for the UMC_SPCCTLA register when the DRAM size is zero. This seems weird because the controller does not need setting in the first place if the size is zero. Also, redefine enum dram_size to represent the DRAM size per 16-bit unit. This makes things simpler because the channel 0 and 1 are connected with 32-bit width DRAM, while the channel 2 is connected with 16-bit width one. I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_* for consistency) while I am here because SIZE_* might be easily mixed-up with the macros in include/linux/sizes.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: use pr_err() where possibleMasahiro Yamada2-5/+5
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: optimize ProXstream2 UMC init code with "for" loopMasahiro Yamada1-22/+11
Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: rework struct uniphier_board_dataMasahiro Yamada11-114/+161
This commit reworks "struct uniphier_board_data" with an array of DRAM channel data in it. It will allow further cleanups by means of "for" statements that iterate over the DDR channels. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: remove unused umc_polling()Masahiro Yamada1-9/+0
This function is unused. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: default to environment in eMMCMasahiro Yamada1-0/+5
Of the several boot devices supported, it looks like the eMMC is the most commonly used. Enable CONFIG_ENV_IS_IN_MMC by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add a command to find the first MMC (non-SD) deviceMasahiro Yamada1-0/+34
UniPhier SoC family supports both (e)MMC boot and SD card boot; however, both of them are handled in the same uclass. When booting from the eMMC, we want to know the device number of the (e)MMC, not SD. This command is useful to find the first MMC (non-SD) device. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: add eMMC boot supportMasahiro Yamada4-0/+61
Export device nodes needed for eMMC boot (eMMC node, pinctrl, and clock) to the SPL DTB. CONFIG_SUPPORT_EMMC_BOOT is also necessary to use "mmc partconf" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: dts: uniphier: add SD/MMC host controller nodesMasahiro Yamada17-0/+217
This host controller is available for all UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: enable UniPhier SD/MMC host driverMasahiro Yamada1-0/+1
Enable the driver in all UniPhier defconfig files and add some needed defines to the common files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: dts: uniphier: add GPIO controller nodesMasahiro Yamada6-0/+938
Make the GPIO driver really active. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29ARM: uniphier: enable GPIO command and driver for UniPhier SoCsMasahiro Yamada1-0/+1
This allows to use the "gpio" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-02-29gpio: do not include <asm/arch/gpio.h> for UniPhierMasahiro Yamada1-0/+2
I implemented a GPIO driver based on Driver Model for the UniPhier SoC family, but I could not find any good reason why such SoC specific GPIO headers are needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-02-29ARM: dts: uniphier: rework System Bus nodesMasahiro Yamada2-19/+20
Follow the changes of DTS in Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-24Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini4-9/+18
2016-02-24Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini16-133/+805
2016-02-24microblaze: Add missing chosen nodeMichal Simek1-0/+2
fdtgrep requires /chosen node to be specified or at least more nodes which stays in DTS to generate output. Error message: ./tools/fdtgrep -b u-boot,dm-pre-reloc -RT dts/dt.dtb -n /chosen -O dtb | ./tools/fdtgrep -r -O dtb - -o spl/u-boot-spl.dtb -P pinctrl-0 -P pinctrl-names -P clocks -P clock-names -P interrupt-parent Error: FDT_ERR_BADMAGIC This patch add empty chosen node to keep fdtgrep happy and pass compilation for in tree DTS file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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