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path: root/arch/arm/mach-stm32mp/spl.c
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2023-05-06arm: stm32mp: spl: fix function with fdt_addr_t inputJohan Jonker1-1/+1
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so fix ofnode_get_addr_size function with fdt_addr_t input to be able to handle both sizes for stm32mp SoC in spl.c file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17arm: stm32mp: move code for STM32MP15xPatrick Delaunay1-0/+1
Move code and defines only needed for CONFIG_STM32MP15x in stm32mp15x.c when low level init without TFABOOT is supported. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-04spl: mmc: extend spl_mmc_boot_mode() to take mmc argumentAndre Przywara1-1/+1
Platforms can overwrite the weak definition of spl_mmc_boot_mode() to determine where to load U-Boot proper from. For most of them this is a trivial decision based on Kconfig variables, but it might be desirable the probe the actual device to answer this question. Pass the pointer to the mmc struct to that function, so implementations can make use of that. Compile-tested for all users changed. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Ley Foon Tan <ley.foon.tan@inte.com> (for SoCFPGA) Acked-by: Lokesh Vutla <lokeshvutla@ti.com> (for OMAP and K3) Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-24arm: stm32mp: Fix USB boot device reportMarek Vasut1-1/+1
In case the SoC reports the boot device type is USB, it means the SPL was loaded via BootROM DFU mode. Currently the spl_boot_device() returns boot device as USB host, change it to DFU instead, so the SPL can continue the DFU boot and load U-Boot via DFU. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-07-27stm32mp1: spl: Configure TrustZone controller for OP-TEEAlexandru Gagniuc1-0/+92
OP-TEE is very particular about how the TZC should be configured. When booting an OP-TEE payload, an incorrect TZC configuration will result in a panic. Most information can be derived from the SPL devicetree. The only information we don't have is the split between TZDRAM and shared memory. This has to be hardcoded. The rest of the configuration is fairly easy, and only requires 3 TZC regions. Configure them. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-0/+1
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-13arm: stm32mp: migrate trace to log macroPatrick Delaunay1-7/+9
Change debug and pr_ macro to log macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25SPL: stm32mp1: fix spl_mmc_boot_partition not definedRichard Genoud1-0/+2
spl_mmc_boot_partition is only defined when CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is defined. Signed-off-by: Richard Genoud <richard.genoud@posteo.net> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-10-21stm32mp: limit size of cacheable DDR in pre-reloc stagePatrick Delaunay1-1/+2
In pre-reloc stage, U-Boot marks cacheable the DDR limited by the new config CONFIG_DDR_CACHEABLE_SIZE. This patch allows to avoid any speculative access to DDR protected by firewall and used by OP-TEE; the "no-map" reserved memory node in DT are assumed after this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE. Without security, in basic boot, the value is equal to STM32_DDR_SIZE. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-28arm: stm32mp: use correct weak function name spl_board_prepare_for_linuxPatrick Delaunay1-1/+1
Replace the function spl_board_prepare_for_boot_linux by the correct name of the weak function spl_board_prepare_for_linux defined in spl.h. This patch avoids warning with W=1 option: u-boot/arch/arm/mach-stm32mp/spl.c:150:6: warning: no previous prototype for ‘spl_board_prepare_for_boot_linux’ [-Wmissing-prototypes] Fixes: dc7e5f190de5 ("arm: stm32mp: activate data cache on DDR in SPL") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-18common: Drop log.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-14arm: stm32mp: activate data cache on DDR in SPLPatrick Delaunay1-0/+19
Activate cache on DDR to improve the accesses to DDR used by SPL: - CONFIG_SPL_BSS_START_ADDR - CONFIG_SYS_SPL_MALLOC_START Cache is configured only when DDR is fully initialized, to avoid speculative access and issue in get_ram_size(). Data cache is deactivated at the end of SPL, to flush the data cache and the TLB. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14arm: stm32mp: spl: update error management in board_init_fPatrick Delaunay1-3/+3
Call hang when an error is detected for probe of any driver needed for console or DDR init: clk, reset and pincontrol NB: previous behavior with a return in board_init_f() was not correct; DDR is not initialized and SPL execution can't continue Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14board: stm32mp1: support boot from spi-nandPatrick Delaunay1-0/+2
Manage BOOT_FLASH_SPINAND, with boot_device="spi-nand" and treat this value in bootcmd_stm32mp. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14ARM: stm32: Add board_early_init_f() to SPLMarek Vasut1-0/+11
Add weak implementation of board_early_init_f() hook into the STM32MP1 SPL. This can be used to read out e.g. configuration straps before initializing the DRAM. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-22spl: mmc: Rename spl_boot_partition() to spl_mmc_boot_partition()Harald Seiler1-1/+1
This function is only relevant to the MMC driver so calling it spl_boot_partition() might be confusing. Rename it to spl_mmc_boot_partition() to make its purpose more clear (and bring it in line with spl_mmc_boot_mode()). Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-22spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()Harald Seiler1-1/+1
The function's name is misleading as one might think it is used generally to select the boot-mode when in reality it is only used by the MMC driver to find out in what way it should try reading U-Boot Proper from a device (either using a filesystem, a raw sector/partition, or an eMMC boot partition). Rename it to spl_mmc_boot_mode() to make it more obvious what this function is about. Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move hang() to the same header as panic()Simon Glass1-0/+1
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-12stm32mp1: spl: hang with trace when DDR init failedPatrick Delaunay1-2/+2
When DDR initialization failed, print error message and stop the SPL execution. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: spl: add spl_display_printPatrick Delaunay1-0/+17
SPL displays the board model from device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-12stm32mp1: update boot mode managementPatrick Delaunay1-2/+16
- export the function get_bootmode() and reused it in spl code - manage uart instance by alias (prepare v4.19 binding) - solve issue on nand instance - restore console for uart boot Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-26stm32mp1: remove the second TAMP_BOOT_CONTEXT updatePatrick Delaunay1-3/+0
The register TAMP_BOOT_CONTEXT is already updated in get_bootmode() in cpu.c and no need to be done twice. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-07SPDX: Convert all of our multiple license tags to Linux Kernel styleTom Rini1-2/+1
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have multiple licenses (in these cases, dual license) declared in the SPDX-License-Identifier tag. In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B" as per the Linux Kernel style document. Note that parenthesis are allowed so when they were used before we continue to use them. Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-06stm32mp1: select boot device and partitionPatrick Delaunay1-0/+30
Bootrom loads SPL from SDCARD or eMMC according BootPin selection. Then SPL loads U-Boot on the same mmc device with the following predefined GPT partitioning: on SDCARD: gpt partitioning 1: SPL 2: SPL#2 3: U-Boot 4: bootable partition on eMMC: The 2 boot partitions are used for SPL (2 copy) boot1: SPL boot2: SPL#2 The user partition use gpt partitioning 1: U-Boot 2: bootable partition This patch select the correct SPL partition (3 for SDCARD on mmc0 and 1 for eMMC on mmc1) according the BootRom information saved in TAMP register and based on configuration flasg: - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new) => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot And the correct boot_targets is selected according the environment variables boot_device and boot_instance, with preboot command, to search the bootable partition with kernel on this device (generic distro support). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19arm: stm32: add new architecture for STM32MP familyPatrick Delaunay1-0/+60
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A - support for stm32mp157 SOC - SPL is used as first boot stage loader - using driver model for all the drivers, even in SPL - all security feature are deactivated (ETZC and TZC) - reused STM32 MCU drivers when it is possible Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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