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2017-08-11Kconfig: Drop CONFIG_CMD_PCA953X_INFOSimon Glass13-22/+0
It does not seem worth having an option to enable another sub-command in this legacy driver. Drop this option so that the sub-command is always available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_PCA953X to KconfigSimon Glass26-12/+22
This converts the following to Kconfig: CONFIG_CMD_PCA953X Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_ONENAND to KconfigSimon Glass20-20/+19
This converts the following to Kconfig: CONFIG_CMD_ONENAND Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_MTDPARTS_SPREAD to KconfigSimon Glass3-1/+11
This converts the following to Kconfig: CONFIG_CMD_MTDPARTS_SPREAD Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [trini: Make this a bool not a string] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-11Convert CONFIG_CMD_MMC_SPI to KconfigSimon Glass10-7/+12
This converts the following to Kconfig: CONFIG_CMD_MMC_SPI Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Kconfig: Sort the device-access commandsSimon Glass1-130/+130
These are currently not quite in alphabetical order. Before adding more, sort them. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Kconfig: Drop CONFIG_CMD_MEMSimon Glass3-5/+2
This is not actually used in U-Boot. Most likely it means CONFIG_CMD_MEMORY so change all occurences to that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11Convert CONFIG_CMD_MAX6957 to KconfigSimon Glass4-2/+8
This converts the following to Kconfig: CONFIG_CMD_MAX6957 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11board: ks2: README: Update NAND wordingCooper Jr., Franklin1-2/+2
Traditional KS2 devices supported NAND via the AEMIF peripheral. However, 66AK2G doesn't use the AEMIF but rather the GPMC for NAND. Therefore, clarify some statements to indicate only certain devices have AEMIF and in other places just say NAND instead of AEMIF NAND Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Roger Quadros <rogerq@ti.com>
2017-08-11at91, smartweb: use SPL_SYS_MALLOC_F_LENHeiko Schocher2-3/+1
commit f1896c45cb2f: spl: make SPL and normal u-boot stage use independent SYS_MALLOC_F_LEN introduced independent SYS_MALLOC_F_LEN for SPL and U-Boot. Use it on the smartweb board, as above commit broke the smartweb board. Signed-off-by: Heiko Schocher <hs@denx.de>
2017-08-11OMAP3: omap3logic: Fix DDR Pin MuxAdam Ford1-1/+1
The 512 MB DDR version of SOM's use CS0 and CS1. CS1 is not correctly setup in the pin muxing. This causes erratic behavior on suspend/resume This fix has been tested on both 256 and 512 MB DDR versions. Signed-off-by: Adam Ford <aford173@gmail.com>
2017-08-11travis-ci: Emulate 'make tests'Tom Rini1-0/+9
The 'tests' target will run sandbox, sandbox_spl and sandbox_flattree in test.py and in the case of sandbox_spl ensure that we just run the specific tests for that build. Update our matrix to perform similar test.py runs. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-11configs: Resync with savedefconfigTom Rini74-175/+72
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-11Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini29-61/+88
2017-08-10Merge git://git.denx.de/u-boot-i2cTom Rini34-38/+43
2017-08-10Merge git://www.denx.de/git/u-boot-marvellTom Rini1-98/+89
2017-08-10i2c: designware: Allow sending restart conditionsMarek Vasut1-1/+2
Allow sending restart conditions upon direction change as this is required by some chips. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denxx.de>
2017-08-10Convert CONFIG_SYS_I2C_OMAP24XX to KconfigAdam Ford26-28/+12
This converts the following to Kconfig: CONFIG_SYS_I2C_OMAP24XX Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-10net: mvpp2x: Set BM poll size once during priv probeStefan Chulski1-4/+1
Set BM poll size once during priv probe and do not overwrite it during port probe procedure. Pool is common for all CP ports. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: remove TX drain from transmit routineStefan Chulski1-21/+0
TX drain in transmit procedure could cause issues due to race between drain procedure and transmition of descriptor between AGGR TXQ and physical TXQ. TXQ will be cleared before moving to Linux by stop procedure. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Set BM pool high addressStefan Chulski1-0/+6
MVPP22 driver support 64 Bit arch and require BM pool high address configuration. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Remove IRQ configuration from U-BootStefan Chulski1-45/+1
Remove IRQ configuration from U-Boot PP driver. U-Boot don't use interrupts and configuration of IRQ in U-Boot caused crashes in Linux shared interrupt mode. Also interrupt use is redundant in RX routine since a single RX queue is used. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: remove MBUS configurations from MvPP22 driverStefan Chulski1-5/+6
MBUS driver were replaced by AXI in PPv22 and relevant only for PPv21. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: decrease size of AGGR_TXQ and CPU_DESC_CHUNKStefan Chulski1-2/+2
U-boot use single physical tx queue with size 16 descriptors. So aggregated tx queue size should be equal to physical tx queue and cpu descriptor chunk(number of descriptors delivered from physical tx queue to aggregated tx queue by one chunk) shouldn't be larger than physical tx queue. Fix: Set AGGR_TXQ and CPU_DESC_CHUNK to be 16 descriptors, same as physical TXQ. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: fix BM configuration overrun issueStefan Chulski1-8/+17
Issue: BM counters were overrun by probe that called per Network interface and caused release of wrong number of buffers during remove procedure. Fix: Use probe_done and num_ports to call init and remove procedure once per communication controller. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Enable GoP packet padding in TXStefan Chulski1-12/+0
This patch enables padding of packets shorter than 64B in TX(set by default). Disabling of padding causes crashes on MACCIATO board. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: fix phy connected to wrong mdio issueStefan Chulski1-1/+25
A8K marvell SoC has two South Bridge communication controllers(CP0 and CP1). Each communication controller has packet processor ports and MDIO. On MACHIATOBin board ports from CP1 are connected to mdio on CP0. Issue: Wrong base address is assigned to MDIO interface during probe. Fix: Get MDIO address from PHY handler parent base address. This should be refined in the future when MDIO driver is implemented. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Add GPIO configuration supportStefan Chulski1-0/+31
This patch add GPIO configuration support in mvpp2x driver. Driver will handle 10G SFP gpio reset and SFP TX disable. GPIO pins should be set in device tree. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-09armv8: ls2080a: Increase env sector size for qspi bootSantan Kumar1-1/+1
Increase env sector size from 64kb to 256kb for qspi boot. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09fsl-lsch2: csu: correct the workaround A-010315Hou Zhiqiang2-11/+11
The implementation of function set_pcie_ns_access() uses a wrong argument. The structure array ns_dev has a member 'ind' which is initialized by CSU_CSLX_*. It should use the 'ind' directly to address the PCIe's CSL register (CSL_base + CSU_CSLX_PCIE*). Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier if dpl appliedSantan Kumar1-2/+9
In fsl_mc_ldpaa_exit(), in case of mc is booted and dpl is applied, it should return earlier without executing dpbp_exit(). Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Acked-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board: ls2080ardb: Add fsl_fdt_fixup_flashSantan Kumar1-0/+28
IFC and QSPI are muxed on board. Add fsl_fdt_fixup_flash() to disable IFC node in dts if QSPI is enabled, or disable QSPI node in dts if otherwise. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09config: ls1012aqds: Enable USB EHCI support for ls1012aqdsRajesh Bhagat3-1/+4
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com> [YS: Revise subject, remove commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09mmc: fsl_esdhc: not always setting esdhc fdt status to okayYang Li1-2/+0
We shouldn't always change the status to okay. There could be situations that the esdhc is intentionally disabled in the device tree. Signed-off-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09PCI: layerscape: Fix assigning wrong address to LS2088A pcie cfg1 spaceHou Zhiqiang1-0/+3
This bug is brought by the commit 3d8553f0a3 (pci: layerscape: add LS2088A series SoC pcie support), which only updated cfg_res.start and did not update the .end field. This causes fdt_resource_size() getting wrong value when calculate the cfg1 space address. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Revise subject and commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09dm: arm: ls1021a: Move to driver model for USBAlison Wang12-0/+12
This patch enables driver model for USB in defconfigs for LS1021A platforms. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09fsl-lsch2: csu: remove multiple calling functionHou Zhiqiang4-13/+0
Function enable_layerscape_ns_access() is alreayd called soc-wide. Remove duplicated calling from individual boards. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Add commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09armv8/fsl-lsch2: correct the config description of DSPI clock dividerHou Zhiqiang1-1/+1
It is derived from Platform clock instead of Platform PLL frequency. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board:ls2080ardb: Update execution of config_board_muxSantan Kumar1-13/+14
Function config_board_mux() reads env variable 'hwconfig' which is only available after relocation for QSPI boot. Move calling config_board_mux() to misc_init_r(). Signed-off-by: Santan Kumar <santan.kumar@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board/ls2080ardb: Disable SD-related GPIO programmingSantan Kumar1-16/+2
Smart voltage translator is removed from LS2080ARDB/LS2088ARDB RevF boards. It is only used on LS2081ARDB. Programming GPIO is only required for LS2081ARDB. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09armv8: ls1046ardb: update core frequency to 1800MHZQianyu Gong2-2/+2
Update the default core frequency to 1800MHZ for best performance under SD boot and eMMC boot. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09driver: mmc: fsl_esdhc: Fix compiling warningYork Sun1-0/+2
Commit 4483b7eb added variable vqmmc_dev but only uses it under CONFIG_DM_REGULATOR. Add the same macro to variable declaration to get rid of compiling warning. Signed-off-by: York Sun <york.sun@nxp.com>
2017-08-09Configs: Migrate CONFIG_SYS_I2C_OMAP34XX to CONFIG_SYS_I2C_OMAP24XXAdam Ford24-24/+22
The driver is for all boards 24XX and up, so let's eliminate the extra option called CONFIG_SYS_I2C_OMAP34XX since the driver checks for CONFIG_OMAP34XX we don't need CONFIG_SYS_I2C_OMAP34XX. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-09i2c: at91: Add missing probe function to device driverWenyou.Yang@microchip.com1-2/+24
Add missing probe function to the device driver to active a device. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-08Merge git://git.denx.de/u-boot-x86Tom Rini16-87/+380
2017-08-08Merge git://www.denx.de/git/u-boot-cfi-flashTom Rini1-2/+0
2017-08-08Merge git://www.denx.de/git/u-boot-marvellTom Rini1-3/+8
2017-08-08configs: Finish migration of PHY_GIGETom Rini427-98/+350
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-08x86: Add defconfig for theadorable-x86-conga with PCIe x4 blobsStefan Roese2-0/+56
This defconfig uses the PCIe x4 binary blobs from the congatec BIOS. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08x86: conga: theadorable-x86-conga-qa3-e3845_defconfig: Misc defconfig updatesStefan Roese1-3/+3
- Disable debug UART - Enable more partition support Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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