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2021-05-24checkpatch: require quotes around section name in the __section() macroMarek BehĂșn1-1/+1
2021-05-24regmap: fix a serious pointer casting bugMarek BehĂșn1-2/+57
2021-05-24test: Avoid random numbers in dm_test_devm_regmap()Simon Glass1-2/+1
2021-05-24pylibfdt: Rework "avoid unused variable warning" linesTom Rini1-2/+2
2021-05-23Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini25-377/+452
2021-05-21pinctrl: renesas: Implement unlock register masksMarek Vasut2-21/+20
2021-05-21pinctrl: renesas: Fix R-Car Gen2 help textMarek Vasut1-5/+5
2021-05-21pinctrl: renesas: Deduplicate KconfigMarek Vasut1-69/+5
2021-05-21gpio: renesas: Pass struct udevice to rcar_gpio_set_direction()Marek Vasut1-7/+6
2021-05-21clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handlingMarek Vasut1-43/+43
2021-05-21clk: renesas: Add register pointers into struct cpg_mssr_infoHai Pham3-45/+65
2021-05-21clk: renesas: Introduce enum clk_reg_layoutHai Pham1-0/+6
2021-05-21clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()Hai Pham4-6/+8
2021-05-21clk: renesas: Make reset controller modemr register offset configurableMarek Vasut20-5/+21
2021-05-21clk: renesas: Add support for RPCD2 clockHai Pham2-5/+17
2021-05-21clk: renesas: Fix Realtime Module Stop Control Register offsetsHai Pham1-1/+1
2021-05-21clk: renesas: Fix incorrect return RPC clk_get_rateHai Pham1-1/+1
2021-05-21clk: renesas: Reinstate RPC clock on R-Car D3/E3Marek Vasut2-0/+18
2021-05-21clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12Marek Vasut7-163/+212
2021-05-21clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12Marek Vasut5-9/+6
2021-05-21clk: renesas: Synchronize RZ/G2 tables with Linux 5.12Marek Vasut3-5/+26
2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini3-100/+165
2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini27-114/+219
2021-05-20arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode "2500base-x"Stefan Roese1-2/+2
2021-05-20net: mvpp2: add explicit sgmii-2500 supportMarcin Wojtas1-16/+12
2021-05-20net: mvpp2: allow MDIO registration for fixed linksStefan Chulski1-4/+13
2021-05-20net: mvpp2: fix missing switch case breakBen Peled1-0/+2
2021-05-20net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REGBen Peled1-3/+0
2021-05-20net: mvpp2: AN Bypass in 1000 and 2500 basex modeBen Peled1-2/+4
2021-05-20net: mvpp2: Fix 2.5G GMII_SPEED configurationsStefan Chulski1-1/+2
2021-05-20net: mvpp2: remove redundant SMI address configurationMarcin Wojtas1-12/+0
2021-05-20net: mvpp2: add 1000BaseX and 2500BaseX ppv2 supportStefan Chulski1-5/+112
2021-05-20net: mvpp2: add CP115 port1 10G/5G SFI supportStefan Chulski1-58/+17
2021-05-20phy: introduce 1000BaseX and 2500BaseX modesStefan Chulski1-0/+4
2021-05-19Merge tag 'xilinx-for-v2021.07-rc3' of https://source.denx.de/u-boot/custodia...Tom Rini28-24/+3797
2021-05-19riscv: ae350: Increase malloc size for binman spl flowRick Chen4-0/+4
2021-05-19riscv: Drop USE_SPL_FIT_GENERATORBin Meng9-109/+1
2021-05-19riscv: ae350: Switch to use binman to generate u-boot.itbBin Meng7-0/+13
2021-05-19riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng6-0/+22
2021-05-19riscv: dts: Sort build targets in alphabetical orderBin Meng1-1/+1
2021-05-19binman: Support packaging U-Boot for scenarios like OF_BOARD or OF_PRIOR_STAGEBin Meng3-1/+44
2021-05-19lib: kconfig: Limit BINMAN_FDT for OF_SEPARATE or OF_EMBEDBin Meng1-1/+1
2021-05-19riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng4-0/+73
2021-05-19makefile: Pass OpenSBI blob to binman make rulesBin Meng1-0/+1
2021-05-19binman: Add support for RISC-V OpenSBI fw_dynamic blobBin Meng4-0/+57
2021-05-19binman: test: Rename 172_fit_fdt.dts to 170_fit_fdt.dtsBin Meng2-5/+5
2021-05-19binman: Correct the comment for ATF entry typeBin Meng1-1/+1
2021-05-19binman: Correct '-a' description in the docBin Meng1-2/+2
2021-05-19common: kconfig: Correct a typo in SPL_LOAD_FITBin Meng1-1/+1
2021-05-19xilinx: zynqmp: Enable DM_RTC/emul driver/cmd date/gettime and efi settimeMichal Simek1-0/+4