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2022-01-13board: sama7g5ek: set blue led on at boot timeMihai Sain1-0/+9
Set blue led on at boot time in order to highlight that u-boot is loaded. Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2022-01-13i2c: at91: add compatible with microchip,sam9x60-i2cEugen Hristev1-0/+6
Add compatible and data platform struct for sam9x60 SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-01-12Merge branch '2022-01-12-pci-updates'Tom Rini19-171/+117
- PCI code clean up and bug fixes from Pali
2022-01-12pci: sh7751: Fix access to config space via PCI_CONF1_ADDRESS() macroPali Rohár1-27/+2
sh7751 platform uses standard format of Config Address for PCI Configuration Mechanism #1. Commit 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") which did conversion of PCI sh7751 driver to DM, broke access to config space as that commit somehow swapped device and function bits in config address. Fix all these issues by using new U-Boot macro PCI_CONF1_ADDRESS() which calculates Config Address correctly. Also remove nonsense function sh7751_pci_addr_valid() which was introduced in commit 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") probably due to workarounded issues with mixing/swapping device and function bits of config address which probably resulted in non-working access to some devices. With correct composing of config address there should not be such issue anymore. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macroPali Rohár1-4/+3
mcf5445x platform uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12x86: pci: Use PCI_CONF1_ADDRESS() macroPali Rohár1-2/+2
x86 platform uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: sh7780: Use PCI_CONF1_ADDRESS() macroPali Rohár1-4/+4
PCI sh7780 driver uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mediatek: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-9/+8
PCI mediatek driver uses extended format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-4/+6
PCI fsl driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: tegra: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-8/+3
PCI tegra driver uses extended format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address function. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-13/+4
PCI mvebu driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: msc01: Use PCI_CONF1_ADDRESS() macroPali Rohár2-14/+2
PCI msc01 driver uses standard format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-2/+2
PCI mpc85xx driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: gt64120: Use PCI_CONF1_ADDRESS() macroPali Rohár2-17/+2
PCI gt64120 driver uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: Add standard PCI Config Address macrosPali Rohár1-0/+45
Lot of PCI and PCIe controllers are using standard Config Address for PCI Configuration Mechanism #1 or its extended version. So add PCI_CONF1_ADDRESS() and PCI_CONF1_EXT_ADDRESS() macros into U-Boot's pci.h header file which can be suitable for most PCI and PCIe controller drivers. Drivers do not have to invent their own macros and can use these new U-Boot macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: When disabling pref MEM set all base bitsPali Rohár1-1/+1
It is common to set all base address bits to one and all limit address bits to zero for disabling address forwarding. Forwarding is disabled when base address is higher than limit address, so this change should not have any effect. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: Disable I/O forwarding during autoconfiguration if unsupportedPali Rohár1-0/+8
If U-Boot does not have any I/O resource for assignment then disable I/O forwarding in PCI bridge autoconfiguration code. Default initial state of PCI bridge IO registers is unspecified, therefore they can be in enabled if U-Boot does not touch them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: Fix register for determining type of IO base addressPali Rohár1-1/+1
Function dm_pciauto_prescan_setup_bridge() configures base address registers, therefore it should read type of IO from base address registers (and not from limit address registers). Note that base and limit address registers should have same type, so this change is just usage correction and has no functional change on correctly working hardware. Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macroPali Rohár1-41/+20
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macroPali Rohár1-14/+3
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-12pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macroPali Rohár1-6/+1
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2022-01-12vexpress64: Remove unused macro XR3PCI_ECAM_OFFSETPali Rohár1-4/+0
Macro XR3PCI_ECAM_OFFSET is unused and in case it would be needed in future it can be replaced by standard PCIE_ECAM_OFFSET macro from pci.h file. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-11Merge https://source.denx.de/u-boot/custodians/u-boot-mmcTom Rini4-396/+260
2022-01-12mmc: unconditionally define mmc_deinit()Heinrich Schuchardt1-5/+0
We want to replace '#ifdef' by 'if (IS_ENABLED(CONFIG_...))' in our code. Therefore functions should be defined unconditionally even if they are not implemented. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: dwmmc: return a proper error code when busyJohn Keeping1-1/+1
When failing to send a command because the hardware is busy, return EBUSY to indicate the cause instead of just -1. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: set sysctl register for clock initializationSean Anderson1-1/+1
[ fsl_esdhc commit 263ddfc3454ead3a988adef39b962479adce2b28 ] The initial clock setting should be through sysctl register only, while the mmc_set_clock() will call mmc_set_ios() introduce other configurations like bus width, mode, and so on. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: Replace more #ifdefs by ifSean Anderson1-83/+69
This builds on the previous patch by converting yet more preprocessor macros to C ifs. This is split off so that the changes adapted from Micheal's patch may be clearly distinguished from the ones I have authored myself. MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO needs some -ENOSYS stubs when it isn't defined. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED()Sean Anderson2-108/+97
[ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ] Make the code cleaner and drop the old-style #ifdef constructs where it is possible. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: simplify esdhc_setup_data()Sean Anderson1-33/+48
[ fsl_esdhc commit 7e48a028a42c111ba38a90b86e5f57dace980fa0 ] First, we need the waterlevel setting for PIO mode only. Secondy, both DMA setup code is identical for both directions, except for the data pointer. Thus, unify them. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: use dma-mapping APISean Anderson1-35/+15
[ fsl_esdhc commit b1ba1460a445bcc67972a617625d0349e4f22b31 ] Use the dma_{map,unmap}_single() calls. These will take care of the flushing and invalidation of caches. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfersSean Anderson1-27/+6
[ fsl_esdhc commit da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ] SDMA can only do DMA with 32 bit addresses. This is true for all architectures (just doesn't apply to 32 bit ones). Simplify the code and remove unnecessary CONFIG_FSL_LAYERSCAPE. Also make the error message more concise. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix mmc->clock with actual clockSean Anderson1-0/+1
[ fsl_esdhc commit 30f6444d024a74ee48aa6969c1531aecd3c59deb ] Fix mmc->clock with actual clock which is divided by the controller, and record it with priv->clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: drop redundant code for non-removable featureSean Anderson1-21/+13
[ fsl_esdhc commit commit 08197cb8dff7cd097ab07a325093043c39d19bbd ] Drop redundant code for non-removable feature. "non-removable" property has been read in mmc_of_parse(). Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ] Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: clean up bus width configuration codeSean Anderson1-57/+26
[ fsl_esdhc commit 07bae1de382723b94244096953b05225572728cd ] This patch is to clean up bus width setting code. - For DM_MMC, remove getting "bus-width" from device tree. This has been done in mmc_of_parse(). - For non-DM_MMC, move bus width configuration from fsl_esdhc_init() to fsl_esdhc_initialize() which is non-DM_MMC specific. And fix up bus width configuration to support only 1-bit, 4-bit, or 8-bit. Keep using 8-bit if it's not set because many platforms use driver without providing max bus width. - Remove bus_width member from fsl_esdhc_priv structure. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ converted if statement to switch ] Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix voltage validationSean Anderson2-28/+19
[ fsl_esdhc commit 5b05fc0310cd933acf76ee661577c6b07a95e684 ] Voltage validation should be done by CMD8. Current comparison between mmc_cfg voltages and host voltage capabilities is meaningless. So drop current comparison and let voltage validation is through CMD8. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: remove redundant DM_MMC checkingSean Anderson1-2/+0
[ fsl_esdhc commit 2913926f3b3dec282f8773e3c02377c9600d8267 ] Remove redundant DM_MMC checking which is already in DM_MMC conditional compile block. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMCSean Anderson1-32/+1
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already support it, so let's force to use it. - Drop non-BLK support for DM_MMC introduced by below patch. 66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). - Use DM_MMC instead of BLK for conditional compile. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-10Merge branch 'next'Tom Rini1624-10859/+25229
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-10Prepare v2022.01v2022.01Tom Rini1-1/+1
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-10.mailmap: add Atish Patra, Anup PatelHeinrich Schuchardt1-0/+2
Both have left Western Digital. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-10lib/rsa: avoid -Wdiscarded-qualifiersHeinrich Schuchardt1-1/+1
The return type of EVP_PKEY_get0_RSA() is const struct rsa_st *. Our code drops the const qualifier leading to In file included from tools/lib/rsa/rsa-sign.c:1: ./tools/../lib/rsa/rsa-sign.c: In function ‘rsa_add_verify_data’: ./tools/../lib/rsa/rsa-sign.c:631:13: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] 631 | rsa = EVP_PKEY_get0_RSA(pkey); | ^ Add a type conversion. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-09Merge tag 'u-boot-amlogic-20220107' of ↵Tom Rini77-414/+1827
https://source.denx.de/u-boot/custodians/u-boot-amlogic into next - disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs - meson64_android: add board specific env settings, in order to support VIM3/L for android - add changes to support VIM3/L android boot by using meson64_android.h config
2022-01-08Merge branch '2022-01-08-further-important-updates'Tom Rini16-8/+84
- Further udoo_neo fixes, nitrogen6x mmc pinctrl fix - dwc2_udc_otg fix - Make imx8mq be consistent with yesterdays imx8 fixes
2022-01-08imx8mq: Generate a single bootable flash.bin againPatrick Wildt3-3/+19
All i.MX8MQ boards have been converted to binman, which makes it necessary to flash both flash.bin and u-boot.itb to get a bootable system. Prior to the conversion, only flash.bin was needed. Such new requirement breaks existing distro mechanisms to generate the final binary because the extra u-boot.itb is now required. Generate a final flash.bin that can be used again as a single bootable binary to keep the original behavior. After this change the SPL binary is called spl.bin, which is a more descriptive name for its purpose, and can still be used standalone (for example, for secure boot purposes). Also update imx8mq_evk.rst to remove the u-boot.itb copy step. This is a cherry-pick of 028abfd9b157 ("imx8mm-evk: Generate a single bootable flash.bin again") adjusted to apply to i.MX8MQ. Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-01-08nitrogen6x: add missing pinctrl to fix mmcGary Bisson6-0/+12
Since commit f7ac30b042d, the pin muxing for mmc was removed from the board file to be managed by DM_MMC which requires PINCTRL to work. It made the change for sabrelite but nitrogen configs were forgotten. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2022-01-08usb: gadget: dwc2_udc_otg: set ep's desc during enable/disableGary Bisson1-0/+2
Fastboot support has been broken on platforms using dwc2 controller since the gadget gets its max packet size from it. This patch is the equivalent of 723fd5668ff which fixed the same issue but for the chipidea controller. Fixes: 27c9141b111 ("usb: gadget: fastboot: use correct max packet size") Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2022-01-08udoo: Select CMD_DMFabio Estevam1-0/+1
CMD_DM is useful for showing the whole DM tree. Enable it via "imply CMD_DM". Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08udoo: Increase CONFIG_ENV_OFFSETFabio Estevam1-1/+1
Increase CONFIG_ENV_OFFSET to avoid the environment region to overlap with U-Boot proper. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08udoo: Adjust the SD card device numberingFabio Estevam2-2/+3
After the conversion to DM the SD card shows up as 'mmc 2' device. Adjust the 'mmcdev' and the distro command 'func' accordingly. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08udoo: Call gpio_request()Fabio Estevam1-0/+8
Calling gpio_request() prior to its usage is now mandatory. This fixes the following GPIO errors: U-Boot SPL 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300) Trying to boot from MMC1 U-Boot 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300) CPU: Freescale i.MX6Q rev1.2 at 792 MHz Reset cause: WDOG Model: Udoo i.MX6 Quad Board Board: Udoo Quad DRAM: 1 GiB MMC: FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial gpio@20a0000: set_dir_flags: error: gpio GPIO2_31 not reserved gpio@20a4000: set_dir_flags: error: gpio GPIO3_23 not reserved gpio@20b0000: set_dir_flags: error: gpio GPIO6_24 not reserved gpio@20b0000: set_dir_flags: error: gpio GPIO6_25 not reserved gpio@20b0000: set_dir_flags: error: gpio GPIO6_27 not reserved gpio@20b0000: set_dir_flags: error: gpio GPIO6_28 not reserved gpio@20b0000: set_dir_flags: error: gpio GPIO6_29 not reserved gpio@20a4000: set_value: error: gpio GPIO3_23 not reserved Net: Could not get PHY for FEC0: addr -2 No ethernet found. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 14:59:59 +0000