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Diffstat (limited to 'arch/arm/dts/socfpga_n5x-u-boot.dtsi')
-rw-r--r--arch/arm/dts/socfpga_n5x-u-boot.dtsi26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/dts/socfpga_n5x-u-boot.dtsi b/arch/arm/dts/socfpga_n5x-u-boot.dtsi
index d377ae5f69..e27a64651e 100644
--- a/arch/arm/dts/socfpga_n5x-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_n5x-u-boot.dtsi
@@ -12,16 +12,16 @@
memory {
#address-cells = <2>;
#size-cells = <2>;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
soc {
- u-boot,dm-pre-reloc;
+ bootph-all;
ccu: cache-controller@f7000000 {
compatible = "arteris,ncore-ccu";
reg = <0xf7000000 0x100900>;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
clocks {
@@ -42,7 +42,7 @@
&clkmgr {
compatible = "intel,n5x-clkmgr";
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&gmac0 {
@@ -85,7 +85,7 @@
};
&memclkmgr {
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&mmc {
@@ -107,13 +107,13 @@
};
&qspi {
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&rst {
compatible = "altr,rst-mgr";
altr,modrst-offset = <0x20>;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&sdr {
@@ -121,7 +121,7 @@
resets = <&rst DDRSCH_RESET>;
clocks = <&memclkmgr>;
clock-names = "mem_clk";
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&spi0 {
@@ -134,7 +134,7 @@
&sysmgr {
compatible = "altr,sys-mgr", "syscon";
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&timer0 {
@@ -155,7 +155,7 @@
&uart0 {
clocks = <&clkmgr N5X_L4_SP_CLK>;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&uart1 {
@@ -165,17 +165,17 @@
&usb0 {
clocks = <&clkmgr N5X_USB_CLK>;
disable-over-current;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&usb1 {
clocks = <&clkmgr N5X_USB_CLK>;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&watchdog0 {
clocks = <&clkmgr N5X_L4_SYS_FREE_CLK>;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&watchdog1 {