diff options
556 files changed, 4602 insertions, 4502 deletions
@@ -180,7 +180,6 @@ static int API_get_timer(va_list ap) return 0; } - /***************************************************************************** * * pseudo signature: @@ -230,7 +229,6 @@ static int API_dev_enum(va_list ap) return 0; } - static int API_dev_open(va_list ap) { struct device_info *di; @@ -262,7 +260,6 @@ static int API_dev_open(va_list ap) return err; } - static int API_dev_close(va_list ap) { struct device_info *di; @@ -297,7 +294,6 @@ static int API_dev_close(va_list ap) return err; } - /* * pseudo signature: * @@ -376,7 +372,6 @@ static int API_dev_write(va_list ap) return err; } - /* * pseudo signature: * @@ -462,7 +457,6 @@ static int API_dev_read(va_list ap) return 0; } - /* * pseudo signature: * diff --git a/api/api_storage.c b/api/api_storage.c index 3d2d9d6ef4..c663e7df94 100644 --- a/api/api_storage.c +++ b/api/api_storage.c @@ -26,7 +26,6 @@ #define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0) - #define ENUM_IDE 0 #define ENUM_USB 1 #define ENUM_SCSI 2 @@ -144,7 +143,6 @@ static int dev_stor_get(int type, int *more, struct device_info *di) return found; } - /* returns: ENUM_IDE, ENUM_USB etc. based on struct blk_desc */ static int dev_stor_type(struct blk_desc *dd) @@ -159,7 +157,6 @@ static int dev_stor_type(struct blk_desc *dd) return ENUM_MAX; } - /* returns: 0/1 whether cookie points to some device in this group */ static int dev_is_stor(int type, struct device_info *di) @@ -167,7 +164,6 @@ static int dev_is_stor(int type, struct device_info *di) return (dev_stor_type(di->cookie) == type) ? 1 : 0; } - static int dev_enum_stor(int type, struct device_info *di) { int found = 0, more = 0; @@ -293,7 +289,6 @@ static int dev_stor_is_valid(int type, struct blk_desc *dd) return 0; } - int dev_open_stor(void *cookie) { int type = dev_stor_type(cookie); @@ -307,7 +302,6 @@ int dev_open_stor(void *cookie) return API_ENODEV; } - int dev_close_stor(void *cookie) { /* @@ -317,7 +311,6 @@ int dev_close_stor(void *cookie) return 0; } - lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start) { int type; @@ -341,7 +334,6 @@ lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start #endif /* defined(CONFIG_BLK) */ } - lbasize_t dev_write_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start) { struct blk_desc *dd = (struct blk_desc *)cookie; diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h index c818b8bdae..39f361293f 100644 --- a/arch/arc/include/asm/io.h +++ b/arch/arc/include/asm/io.h @@ -77,7 +77,6 @@ static inline void sync(void) #define __arch_putl(v, a) ({ __comp_b(); *(volatile u32 *)(a) = (v); __comp_b(); }) #define __arch_putq(v, a) ({ __comp_b(); *(volatile u64 *)(a) = (v); __comp_b(); }) - /* * We add memory barriers for __raw_readX / __raw_writeX accessors same way as * it is done for readX and writeX accessors as lots of U-Boot driver uses @@ -93,7 +92,6 @@ static inline void sync(void) #define __raw_readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; }) #define __raw_readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; }) - static inline void __raw_writesb(unsigned long addr, const void *data, int bytelen) { diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c index 07ab04b7b0..0e100e6f13 100644 --- a/arch/arm/cpu/arm926ejs/cpu.c +++ b/arch/arm/cpu/arm926ejs/cpu.c @@ -44,7 +44,6 @@ int cleanup_before_linux (void) disable_interrupts(); - /* turn off I/D-cache */ icache_disable(); dcache_disable(); diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c index f25a8674de..36c557d4a8 100644 --- a/arch/arm/cpu/armv7/arch_timer.c +++ b/arch/arm/cpu/armv7/arch_timer.c @@ -49,7 +49,6 @@ unsigned long long get_ticks(void) return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; } - ulong timer_get_boot_us(void) { if (!gd->arch.timer_rate_hz) diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c index b769c45110..fa8af1b694 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c @@ -84,7 +84,6 @@ static int peri_clk_enable(struct clk *c, int enable) struct bcm_clk_gate *gate = &cd->gate; void *base = (void *)c->ccu_clk_mgr_base; - debug("%s: %s\n", __func__, c->name); clk_get_rate(c); /* Make sure rate and sel are filled in */ diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c index 3f2e021a30..71b3a9277b 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c @@ -84,7 +84,6 @@ static int peri_clk_enable(struct clk *c, int enable) struct bcm_clk_gate *gate = &cd->gate; void *base = (void *)c->ccu_clk_mgr_base; - debug("%s: %s\n", __func__, c->name); clk_get_rate(c); /* Make sure rate and sel are filled in */ diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 74a2dcbc11..dccf2fb3eb 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -224,7 +224,6 @@ void enable_caches(void) } #endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ - uint get_svr(void) { struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 45af766207..7265e55425 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -83,7 +83,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \ rk3288-vyasa.dtb dtb-$(CONFIG_ROCKCHIP_RK3368) += \ - rk3368-lion-haikou.dtb \ rk3368-sheep.dtb \ rk3368-geekbox.dtb \ rk3368-px5-evb.dtb \ @@ -150,7 +149,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-385-atl-x530.dtb \ armada-385-atl-x530DP.dtb \ armada-385-db-88f6820-amc.dtb \ - armada-385-synology-ds116.dtb \ armada-385-thecus-n2350.dtb \ armada-385-turris-omnia.dtb \ armada-388-clearfog.dtb \ diff --git a/arch/arm/dts/armada-385-synology-ds116.dts b/arch/arm/dts/armada-385-synology-ds116.dts deleted file mode 100644 index 82a0373f7f..0000000000 --- a/arch/arm/dts/armada-385-synology-ds116.dts +++ /dev/null @@ -1,291 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) -/* - * Device Tree file for Synology DS116 NAS - * - * Copyright (C) 2017 Willy Tarreau <w@1wt.eu> - */ - -/dts-v1/; -#include "armada-385.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Synology DS116"; - compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; /* 1 GB */ - }; - - soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 - MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 - MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 - MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - clock-frequency = <100000>; - - eeprom@57 { - compatible = "atmel,24c64"; - reg = <0x57>; - }; - }; - - serial@12000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; - }; - - serial@12100 { - /* A PIC16F1829 is connected to uart1 at 9600 bps, - * and takes single-character orders : - * "1" : power off // already handled by the poweroff node - * "2" : short beep - * "3" : long beep - * "4" : turn the power LED ON - * "5" : flash the power LED - * "6" : turn the power LED OFF - * "7" : turn the status LED OFF - * "8" : turn the status LED ON - * "9" : flash the status LED - * "A" : flash the motherboard LED (D8) - * "B" : turn the motherboard LED OFF - * "C" : hard reset - */ - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; - status = "okay"; - }; - - poweroff@12100 { - compatible = "synology,power-off"; - reg = <0x12100 0x100>; - clocks = <&coreclk 0>; - }; - - ethernet@70000 { - pinctrl-names = "default"; - phy = <&phy0>; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - status = "okay"; - }; - - mdio@72004 { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - - phy0: ethernet-phy@1 { - reg = <1>; - }; - }; - - sata@a8000 { - pinctrl-names = "default"; - pinctrl-0 = <&sata0_pins>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - sata0: sata-port@0 { - reg = <0>; - target-supply = <®_5v_sata0>; - }; - }; - - bm@c8000 { - status = "okay"; - }; - - usb3@f0000 { - usb-phy = <&usb3_0_phy>; - status = "okay"; - }; - - usb3@f8000 { - usb-phy = <&usb3_1_phy>; - status = "okay"; - }; - }; - - bm-bppi { - status = "okay"; - }; - - gpio-fan { - compatible = "gpio-fan"; - gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>, - <&gpio1 17 GPIO_ACTIVE_HIGH>, - <&gpio1 16 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = < 0 0 - 1500 1 - 2500 2 - 3000 3 - 3400 4 - 3700 5 - 3900 6 - 4000 7>; - #cooling-cells = <2>; - }; - - gpio-leds { - compatible = "gpio-leds"; - - /* The green part is on gpio0.20 which is also used by - * sata0, and accesses to SATA disk 0 make it blink so it - * doesn't need to be declared here. - */ - orange { - gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; - label = "ds116:orange:disk"; - default-state = "off"; - }; - }; - }; - - usb3_0_phy: usb3_0_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <®_usb3_0_vbus>; - #phy-cells = <0>; - }; - - usb3_1_phy: usb3_1_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <®_usb3_1_vbus>; - #phy-cells = <0>; - }; - - reg_usb3_0_vbus: usb3-vbus0 { - compatible = "regulator-fixed"; - regulator-name = "usb3-vbus0"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci0_vbus_pins>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; - }; - - reg_usb3_1_vbus: usb3-vbus1 { - compatible = "regulator-fixed"; - regulator-name = "usb3-vbus1"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci1_vbus_pins>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>; - }; - - reg_sata0: pwr-sata0 { - compatible = "regulator-fixed"; - regulator-name = "pwr_en_sata0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - enable-active-high; - regulator-boot-on; - gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>; - }; - - reg_5v_sata0: v5-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-sata0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <®_sata0>; - }; - - reg_12v_sata0: v12-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v12.0-sata0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - vin-supply = <®_sata0>; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>; - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "macronix,mx25l6405d", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <50000000>; - m25p,fast-read; - - /* Note: there is a redboot partition table despite u-boot - * being used. The names presented here are the same as those - * found in the FIS directory. There is also a small device - * tree in the last 64kB of the RedBoot partition which is not - * enumerated. The MAC address and the serial number are listed - * in the "vendor" partition. - */ - partition@0 { - label = "RedBoot"; - reg = <0x00000000 0x000f0000>; - read-only; - }; - - partition@c0000 { - label = "zImage"; - reg = <0x000f0000 0x002d0000>; - }; - - partition@390000 { - label = "rd.gz"; - reg = <0x003c0000 0x00410000>; - }; - - partition@7d0000 { - label = "vendor"; - reg = <0x007d0000 0x00010000>; - read-only; - }; - - partition@7e0000 { - label = "RedBoot config"; - reg = <0x007e0000 0x00010000>; - read-only; - }; - - partition@7f0000 { - label = "FIS directory"; - reg = <0x007f0000 0x00010000>; - read-only; - }; - }; -}; - -&pinctrl { - /* use only one pin for UART1, as mpp20 is used by sata0 */ - uart1_pins: uart-pins-1 { - marvell,pins = "mpp19"; - marvell,function = "ua1"; - }; - - xhci0_vbus_pins: xhci0_vbus_pins { - marvell,pins = "mpp58"; - marvell,function = "gpio"; - }; - xhci1_vbus_pins: xhci1_vbus_pins { - marvell,pins = "mpp59"; - marvell,function = "gpio"; - }; -}; diff --git a/arch/arm/dts/bcm283x-u-boot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi index 8c17c6f6a5..ec0f93dd85 100644 --- a/arch/arm/dts/bcm283x-u-boot.dtsi +++ b/arch/arm/dts/bcm283x-u-boot.dtsi @@ -6,25 +6,6 @@ * (C) Copyright 2016 Fabian Vogt <fvogt@suse.com> */ -/ { - smbios { - compatible = "u-boot,sysinfo-smbios"; - smbios { - system { - manufacturer = "raspberrypi"; - product = "rpi"; - }; - baseboard { - manufacturer = "raspberrypi"; - product = "rpi"; - }; - chassis { - manufacturer = "raspberrypi"; - }; - }; - }; -}; - &uart0 { skip-init; bootph-all; diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi index 9ecb305274..b3d237c869 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi @@ -173,6 +173,17 @@ status = "disabled"; }; +&usb0 { + dr_mode = "peripheral"; + /* Since role switching is not supported in U-Boot */ + /delete-property/ extcon; + bootph-pre-ram; +}; + +&usbss0 { + bootph-pre-ram; +}; + /* Verdin UART_2 */ &wkup_uart0 { bootph-all; diff --git a/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi new file mode 100644 index 0000000000..39bb66c4fc --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +#include "rk3328-u-boot.dtsi" + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + + baseboard { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + + chassis { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + }; + }; +}; + +&u2phy_host { + phy-supply = <&vcc_host_5v>; +}; + +&vcc_host_5v { + /delete-property/ regulator-always-on; + /delete-property/ regulator-boot-on; +}; + +&vcc_sd { + bootph-pre-ram; +}; diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi index d314bfad6f..8e82f6a6f1 100644 --- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -1,43 +1,4 @@ // SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2020 Radxa - */ -#include "rk3328-u-boot.dtsi" +#include "rk3328-rock-pi-e-base-u-boot.dtsi" #include "rk3328-sdram-ddr3-666.dtsi" - -/ { - smbios { - compatible = "u-boot,sysinfo-smbios"; - - smbios { - system { - manufacturer = "radxa"; - product = "rock-pi-e_rk3328"; - }; - - baseboard { - manufacturer = "radxa"; - product = "rock-pi-e_rk3328"; - }; - - chassis { - manufacturer = "radxa"; - product = "rock-pi-e_rk3328"; - }; - }; - }; -}; - -&u2phy_host { - phy-supply = <&vcc_host_5v>; -}; - -&vcc_host_5v { - /delete-property/ regulator-always-on; - /delete-property/ regulator-boot-on; -}; - -&vcc_sd { - bootph-pre-ram; -}; diff --git a/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi new file mode 100644 index 0000000000..4d89ae54e6 --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3328-rock-pi-e-base-u-boot.dtsi" +#include "rk3328-sdram-ddr4-666.dtsi" diff --git a/arch/arm/dts/rk3328-rock-pi-e-v3.dts b/arch/arm/dts/rk3328-rock-pi-e-v3.dts new file mode 100644 index 0000000000..f1c1c36a99 --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-v3.dts @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include "rk3328-rock-pi-e.dts" diff --git a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi deleted file mode 100644 index a3c2b707e9..0000000000 --- a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi +++ /dev/null @@ -1,119 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -#include "rk3368-u-boot.dtsi" - -/ { - config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ - }; - - chosen { - stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = &emmc, &sdmmc; - }; - - smbios { - compatible = "u-boot,sysinfo-smbios"; - - smbios { - system { - manufacturer = "rockchip"; - product = "sheep_rk3368"; - }; - - baseboard { - manufacturer = "rockchip"; - product = "sheep_rk3368"; - }; - - chassis { - manufacturer = "rockchip"; - product = "sheep_rk3368"; - }; - }; - }; -}; - -&gpio2 { - bootph-all; -}; - -&pinctrl { - bootph-all; -}; - -&service_msch { - bootph-all; -}; - -&dmc { - bootph-all; - - /* - * Validation of throughput using SPEC2000 shows the following - * relative performance for the different memory schedules: - * - CBDR: 30.1 - * - CBRD: 29.8 - * - CRBD: 29.9 - * Note that the best performance for any given application workload - * may vary from the default configured here (e.g. 164.gzip is fastest - * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD). - * - * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for - * details on the 'rockchip,memory-schedule' property and how it - * affects the physical-address to device-address mapping. - */ - rockchip,memory-schedule = <DMC_MSCH_CBDR>; - rockchip,ddr-frequency = <800000000>; - rockchip,ddr-speed-bin = <DDR3_1600K>; - - status = "okay"; -}; - -&pmugrf { - bootph-all; -}; - -&sgrf { - bootph-all; -}; - -&cru { - bootph-all; -}; - -&grf { - bootph-all; -}; - -&uart0 { - bootph-all; -}; - -&emmc { - bootph-pre-ram; -}; - -&sdmmc { - bootph-pre-ram; -}; - -&spi1 { - bootph-pre-ram; - - spiflash: w25q32dw@0 { - bootph-pre-ram; - }; -}; - -&timer0 { - bootph-all; - clock-frequency = <24000000>; - status = "okay"; -}; - - diff --git a/arch/arm/dts/rk3368-lion-haikou.dts b/arch/arm/dts/rk3368-lion-haikou.dts deleted file mode 100644 index cae01d35b9..0000000000 --- a/arch/arm/dts/rk3368-lion-haikou.dts +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; -#include "rk3368-lion.dtsi" - -/ { - model = "Theobroma Systems RK3368-uQ7 Baseboard"; - compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368"; - - aliases { - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - i2cmux2 { - i2c@0 { - eeprom: eeprom@50 { - compatible = "atmel,24c01"; - pagesize = <8>; - reg = <0x50>; - }; - }; - }; - - leds { - pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>; - - sd_card_led: led-3 { - label = "sd_card_led"; - gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - }; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_baseboard: vcc3v3-baseboard { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_baseboard"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_otg: vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; - regulator-name = "vcc5v0_otg"; - regulator-always-on; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <25000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - rockchip,default-sample-phase = <90>; - vmmc-supply = <&vcc3v3_baseboard>; - status = "okay"; -}; - -&spi2 { - cs-gpios = <0>, <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; -}; - -&uart1 { - /* alternate function of GPIO5/6 */ - status = "disabled"; -}; - -&pinctrl { - pinctrl-names = "default"; - pinctrl-0 = <&haikou_pin_hog>; - - hog { - haikou_pin_hog: haikou-pin-hog { - rockchip,pins = - /* LID_BTN */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, - /* BATLOW# */ - <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>, - /* SLP_BTN# */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, - /* BIOS_DISABLE# */ - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - sd_card_led_pin: sd-card-led-pin { - rockchip,pins = - <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc_cd_pin: sdmmc-cd-pin { - rockchip,pins = - <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb_otg { - otg_vbus_drv: otg-vbus-drv { - rockchip,pins = - <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; diff --git a/arch/arm/dts/rk3368-lion.dtsi b/arch/arm/dts/rk3368-lion.dtsi deleted file mode 100644 index bcd7977fb0..0000000000 --- a/arch/arm/dts/rk3368-lion.dtsi +++ /dev/null @@ -1,318 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; -#include "rk3368.dtsi" - -/ { - aliases { - mmc0 = &emmc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - ext_gmac: gmac-clk { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "ext_gmac"; - #clock-cells = <0>; - }; - - i2cmux1 { - compatible = "i2c-mux-gpio"; - #address-cells = <1>; - #size-cells = <0>; - i2c-parent = <&i2c1>; - mux-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; - - /* Q7_GPO_I2C */ - i2c@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - /* Q7_SMB */ - i2c@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - i2cmux2 { - compatible = "i2c-mux-gpio"; - #address-cells = <1>; - #size-cells = <0>; - i2c-parent = <&i2c2>; - mux-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; - - /* Q7_LVDS_BLC_I2C */ - i2c@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - fan: fan@18 { - compatible = "ti,amc6821"; - reg = <0x18>; - #cooling-cells = <2>; - }; - - rtc_twi: rtc@6f { - compatible = "isil,isl1208"; - reg = <0x6f>; - }; - }; - - /* Q7_GP2_I2C */ - i2c@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&module_led_pins>; - - module_led1: led-1 { - label = "module_led1"; - gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - panic-indicator; - }; - - module_led2: led-2 { - label = "module_led2"; - gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; - - vcc_sys: vcc-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu>; -}; - -&emmc { - bus-width = <8>; - clock-frequency = <150000000>; - mmc-hs200-1_8v; - non-removable; - vmmc-supply = <&vcc33_io>; - vqmmc-supply = <&vcc18_io>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_MAC>; - assigned-clock-parents = <&ext_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc33_io>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; - tx_delay = <0x10>; - rx_delay = <0x10>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio0>; - interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; - clock-output-names = "xin32k", "rk808-clkout2"; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>, <&pmic_sleep>; - rockchip,system-power-controller; - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc_sys>; - vcc8-supply = <&vcc_sys>; - vcc9-supply = <&vcc_sys>; - vcc10-supply = <&vcc_sys>; - vcc11-supply = <&vcc_sys>; - vcc12-supply = <&vcc_sys>; - - regulators { - vdd_cpu: DCDC_REG1 { - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - vdd_log: DCDC_REG2 { - regulator-name = "vdd_log"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - }; - - vcc33_io: DCDC_REG4 { - regulator-name = "vcc33_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc33_video: LDO_REG2 { - regulator-name = "vcc33_video"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - vdd10_pll: LDO_REG3 { - regulator-name = "vdd10_pll"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc18_io: LDO_REG4 { - regulator-name = "vcc18_io"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - }; - - vdd10_video: LDO_REG6 { - regulator-name = "vdd10_video"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc18_video: LDO_REG8 { - regulator-name = "vcc18_video"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&pinctrl { - leds { - module_led_pins: module-led-pins { - rockchip,pins = - <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - pmic_sleep: pmic-sleep { - rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>; - }; - }; -}; - -&spi1 { - status = "okay"; - - norflash: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - }; -}; - -&uart1 { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index b6b4327117..2bec139d83 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -145,6 +145,11 @@ bootph-some-ram; }; +&spi1 { + bootph-pre-ram; + bootph-some-ram; +}; + &spi1_clk { bootph-pre-ram; bootph-some-ram; diff --git a/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi new file mode 100644 index 0000000000..853ed58cfe --- /dev/null +++ b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588s-u-boot.dtsi" diff --git a/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi new file mode 100644 index 0000000000..853ed58cfe --- /dev/null +++ b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588s-u-boot.dtsi" diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts index d6897ec979..87432c4f1f 100644 --- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts +++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts @@ -291,6 +291,8 @@ }; &spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h6-tanix.dtsi b/arch/arm/dts/sun50i-h6-tanix.dtsi index 4903d63581..855b7d43bc 100644 --- a/arch/arm/dts/sun50i-h6-tanix.dtsi +++ b/arch/arm/dts/sun50i-h6-tanix.dtsi @@ -166,6 +166,8 @@ }; &spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi index 3c85c8cc8e..09e2168928 100644 --- a/arch/arm/dts/sun50i-h6.dtsi +++ b/arch/arm/dts/sun50i-h6.dtsi @@ -405,6 +405,7 @@ function = "spi1"; }; + /omit-if-no-ref/ spdif_tx_pin: spdif-tx-pin { pins = "PH7"; function = "spdif"; @@ -654,10 +655,8 @@ clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; clock-names = "apb", "spdif"; resets = <&ccu RST_BUS_SPDIF>; - dmas = <&dma 2>; - dma-names = "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spdif_tx_pin>; + dmas = <&dma 2>, <&dma 2>; + dma-names = "rx", "tx"; status = "disabled"; }; diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-cb1-manta.dts b/arch/arm/dts/sun50i-h616-bigtreetech-cb1-manta.dts index dbce61b355..4bfb52609c 100644 --- a/arch/arm/dts/sun50i-h616-bigtreetech-cb1-manta.dts +++ b/arch/arm/dts/sun50i-h616-bigtreetech-cb1-manta.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2023 Martin Botka <martin.botka@somainline.org>. */ diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi index 1fed2b46cf..af421ba24c 100644 --- a/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi +++ b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2023 Martin Botka <martin.botka@somainline.org>. */ @@ -93,7 +93,7 @@ interrupt-controller; #interrupt-cells = <1>; - regulators{ + regulators { reg_dcdc1: dcdc1 { regulator-name = "vdd-gpu-sys"; regulator-min-microvolt = <810000>; diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-pi.dts b/arch/arm/dts/sun50i-h616-bigtreetech-pi.dts index 832f08b2b2..ff84a37944 100644 --- a/arch/arm/dts/sun50i-h616-bigtreetech-pi.dts +++ b/arch/arm/dts/sun50i-h616-bigtreetech-pi.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2023 Martin Botka <martin@biqu3d.com>. */ diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi index d549d277d9..b2e85e52d1 100644 --- a/arch/arm/dts/sun50i-h616.dtsi +++ b/arch/arm/dts/sun50i-h616.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/reset/sun50i-h616-ccu.h> #include <dt-bindings/reset/sun50i-h6-r-ccu.h> +#include <dt-bindings/thermal/thermal.h> / { interrupt-parent = <&gic>; @@ -133,11 +134,28 @@ #reset-cells = <1>; }; + dma: dma-controller@3002000 { + compatible = "allwinner,sun50i-h616-dma", + "allwinner,sun50i-a100-dma"; + reg = <0x03002000 0x1000>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; + clock-names = "bus", "mbus"; + dma-channels = <16>; + dma-requests = <49>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; + sid: efuse@3006000 { compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid"; reg = <0x03006000 0x1000>; #address-cells = <1>; #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@14 { + reg = <0x14 0x8>; + }; }; watchdog: watchdog@30090a0 { @@ -240,6 +258,11 @@ function = "spi1"; }; + spdif_tx_pin: spdif-tx-pin { + pins = "PH4"; + function = "spdif"; + }; + uart0_ph_pins: uart0-ph-pins { pins = "PH0", "PH1"; function = "uart0"; @@ -256,6 +279,12 @@ pins = "PG8", "PG9"; function = "uart1"; }; + + /omit-if-no-ref/ + x32clk_fanout_pin: x32clk-fanout-pin { + pins = "PG10"; + function = "clock"; + }; }; gic: interrupt-controller@3021000 { @@ -339,6 +368,8 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART0>; + dmas = <&dma 14>, <&dma 14>; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART0>; status = "disabled"; }; @@ -350,6 +381,8 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART1>; + dmas = <&dma 15>, <&dma 15>; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART1>; status = "disabled"; }; @@ -361,6 +394,8 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART2>; + dmas = <&dma 16>, <&dma 16>; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART2>; status = "disabled"; }; @@ -372,6 +407,8 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART3>; + dmas = <&dma 17>, <&dma 17>; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART3>; status = "disabled"; }; @@ -383,6 +420,8 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART4>; + dmas = <&dma 18>, <&dma 18>; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART4>; status = "disabled"; }; @@ -394,6 +433,8 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART5>; + dmas = <&dma 19>, <&dma 19>; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART5>; status = "disabled"; }; @@ -405,6 +446,8 @@ reg = <0x05002000 0x400>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C0>; + dmas = <&dma 43>, <&dma 43>; + dma-names = "rx", "tx"; resets = <&ccu RST_BUS_I2C0>; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -420,6 +463,8 @@ reg = <0x05002400 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C1>; + dmas = <&dma 44>, <&dma 44>; + dma-names = "rx", "tx"; resets = <&ccu RST_BUS_I2C1>; status = "disabled"; #address-cells = <1>; @@ -433,6 +478,8 @@ reg = <0x05002800 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C2>; + dmas = <&dma 45>, <&dma 45>; + dma-names = "rx", "tx"; resets = <&ccu RST_BUS_I2C2>; status = "disabled"; #address-cells = <1>; @@ -446,6 +493,8 @@ reg = <0x05002c00 0x400>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C3>; + dmas = <&dma 46>, <&dma 46>; + dma-names = "rx", "tx"; resets = <&ccu RST_BUS_I2C3>; status = "disabled"; #address-cells = <1>; @@ -459,6 +508,8 @@ reg = <0x05003000 0x400>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C4>; + dmas = <&dma 47>, <&dma 47>; + dma-names = "rx", "tx"; resets = <&ccu RST_BUS_I2C4>; status = "disabled"; #address-cells = <1>; @@ -472,6 +523,8 @@ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; clock-names = "ahb", "mod"; + dmas = <&dma 22>, <&dma 22>; + dma-names = "rx", "tx"; resets = <&ccu RST_BUS_SPI0>; status = "disabled"; #address-cells = <1>; @@ -485,6 +538,8 @@ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; clock-names = "ahb", "mod"; + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; resets = <&ccu RST_BUS_SPI1>; status = "disabled"; #address-cells = <1>; @@ -511,6 +566,34 @@ }; }; + spdif: spdif@5093000 { + compatible = "allwinner,sun50i-h616-spdif"; + reg = <0x05093000 0x400>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; + clock-names = "apb", "spdif"; + resets = <&ccu RST_BUS_SPDIF>; + dmas = <&dma 2>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + ths: thermal-sensor@5070400 { + compatible = "allwinner,sun50i-h616-ths"; + reg = <0x05070400 0x400>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + allwinner,sram = <&syscon>; + #thermal-sensor-cells = <1>; + }; + usbotg: usb@5100000 { compatible = "allwinner,sun50i-h616-musb", "allwinner,sun8i-h3-musb"; @@ -734,6 +817,8 @@ reg = <0x07081400 0x400>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_R_APB2_I2C>; + dmas = <&dma 48>, <&dma 48>; + dma-names = "rx", "tx"; resets = <&r_ccu RST_R_APB2_I2C>; status = "disabled"; #address-cells = <1>; @@ -755,4 +840,74 @@ #size-cells = <0>; }; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <500>; + polling-delay = <1000>; + thermal-sensors = <&ths 2>; + sustainable-power = <1000>; + + trips { + cpu_threshold: cpu-trip-0 { + temperature = <60000>; + type = "passive"; + hysteresis = <0>; + }; + cpu_target: cpu-trip-1 { + temperature = <70000>; + type = "passive"; + hysteresis = <0>; + }; + cpu_critical: cpu-trip-2 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + gpu-thermal { + polling-delay-passive = <500>; + polling-delay = <1000>; + thermal-sensors = <&ths 0>; + sustainable-power = <1100>; + + trips { + gpu_temp_critical: gpu-trip-0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + ve-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + + trips { + ve_temp_critical: ve-trip-0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + ddr-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 3>; + + trips { + ddr_temp_critical: ddr-trip-0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + }; }; diff --git a/arch/arm/dts/sun50i-h618-longan-module-3h.dtsi b/arch/arm/dts/sun50i-h618-longan-module-3h.dtsi new file mode 100644 index 0000000000..8c1263a393 --- /dev/null +++ b/arch/arm/dts/sun50i-h618-longan-module-3h.dtsi @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) Jisheng Zhang <jszhang@kernel.org> + */ + +#include "sun50i-h616.dtsi" + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_aldo1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status = "okay"; +}; + +&r_i2c { + status = "okay"; + + axp313: pmic@36 { + compatible = "x-powers,axp313a"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + + regulators { + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-1v8-pll"; + }; + + reg_dldo1: dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3-io"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <990000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-dram"; + }; + }; + }; +}; + +&pio { + vcc-pc-supply = <®_dldo1>; + vcc-pf-supply = <®_dldo1>; + vcc-pg-supply = <®_aldo1>; + vcc-ph-supply = <®_dldo1>; + vcc-pi-supply = <®_dldo1>; +}; diff --git a/arch/arm/dts/sun50i-h618-longanpi-3h.dts b/arch/arm/dts/sun50i-h618-longanpi-3h.dts new file mode 100644 index 0000000000..18b29c6b86 --- /dev/null +++ b/arch/arm/dts/sun50i-h618-longanpi-3h.dts @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) Jisheng Zhang <jszhang@kernel.org> + */ + +/dts-v1/; + +#include "sun50i-h618-longan-module-3h.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Sipeed Longan Pi 3H"; + compatible = "sipeed,longan-pi-3h", "sipeed,longan-module-3h", "allwinner,sun50i-h618"; + + aliases { + ethernet0 = &emac0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + color = <LED_COLOR_ID_ORANGE>; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <0>; + gpios = <&pio 6 2 GPIO_ACTIVE_LOW>; /* PG2 */ + }; + + led-1 { + color = <LED_COLOR_ID_ORANGE>; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <1>; + gpios = <&pio 6 4 GPIO_ACTIVE_LOW>; /* PG4 */ + }; + }; + + reg_vcc5v: regulator-vcc5v { + /* board wide 5V supply directly from the USB-C socket */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_vcc3v3: regulator-vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_vcc5v>; + }; +}; + +&axp313 { + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; +}; + +&ehci1 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +/* WiFi & BT combo module is connected to this Host */ +&ehci3 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&emac0 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + allwinner,rx-delay-ps = <3100>; + allwinner,tx-delay-ps = <700>; + phy-supply = <®_vcc3v3>; + status = "okay"; +}; + +&mdio0 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mmc0 { + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + vmmc-supply = <®_vcc3v3>; + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&usbotg { + /* + * PHY0 pins are connected to a USB-C socket, but a role switch + * is not implemented: both CC pins are pulled to GND. + * The VBUS pins power the device, so a fixed peripheral mode + * is the best choice. + * The board can be powered via GPIOs, in this case port0 *can* + * act as a host (with a cable/adapter ignoring CC), as VBUS is + * then provided by the GPIOs. Any user of this setup would + * need to adjust the DT accordingly: dr_mode set to "host", + * enabling OHCI0 and EHCI0. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc5v>; + usb2_vbus-supply = <®_vcc5v>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts b/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts index 8ea1fd41ae..ac0a2b7ea6 100644 --- a/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts +++ b/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts @@ -15,6 +15,7 @@ compatible = "transpeed,8k618-t", "allwinner,sun50i-h618"; aliases { + ethernet1 = &sdio_wifi; serial0 = &uart0; }; @@ -39,6 +40,15 @@ regulator-max-microvolt = <3300000>; regulator-always-on; }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc CLK_OSC32K_FANOUT>; + clock-names = "ext_clock"; + pinctrl-0 = <&x32clk_fanout_pin>; + pinctrl-names = "default"; + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ + }; }; &ehci0 { @@ -60,6 +70,19 @@ status = "okay"; }; +&mmc1 { + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_aldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + sdio_wifi: wifi@1 { + reg = <1>; + }; +}; + &mmc2 { vmmc-supply = <®_dldo1>; vqmmc-supply = <®_aldo1>; diff --git a/arch/arm/dts/sun50i-h64-remix-mini-pc.dts b/arch/arm/dts/sun50i-h64-remix-mini-pc.dts new file mode 100644 index 0000000000..c1a15d60bf --- /dev/null +++ b/arch/arm/dts/sun50i-h64-remix-mini-pc.dts @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2023 ARM Ltd. + +/dts-v1/; + +#include "sun50i-a64.dtsi" +#include "sun50i-a64-cpu-opp.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Remix Mini PC"; + compatible = "jide,remix-mini-pc", "allwinner,sun50i-h64", + "allwinner,sun50i-a64"; + + aliases { + ethernet1 = &rtl8723bs; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + reg_vcc5v: regulator-5v { + /* board wide 5V supply directly from the DC input */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ + post-power-on-delay-ms = <200>; + }; +}; + +&codec { + status = "okay"; +}; + +&codec_analog { + cpvdd-supply = <®_eldo1>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&cpu1 { + cpu-supply = <®_dcdc2>; +}; + +&cpu2 { + cpu-supply = <®_dcdc2>; +}; + +&cpu3 { + cpu-supply = <®_dcdc2>; +}; + +&dai { + status = "okay"; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&hdmi { + hvcc-supply = <®_dldo1>; + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +/* Connects to the AC200 chip */ +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; +}; + +&i2c0_pins { + bias-pull-up; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_dcdc1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_aldo1>; + vqmmc-supply = <®_dldo4>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + rtl8723bs: wifi@1 { + reg = <1>; + interrupt-parent = <&r_pio>; + interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */ + interrupt-names = "host-wake"; + }; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>; + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_eldo1>; + bus-width = <8>; + non-removable; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + cap-mmc-hw-reset; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pb-supply = <®_dcdc1>; + vcc-pc-supply = <®_dcdc1>; + vcc-pd-supply = <®_dcdc1>; + vcc-pe-supply = <®_dcdc1>; + vcc-pf-supply = <®_dcdc1>; + vcc-pg-supply = <®_dldo4>; + vcc-ph-supply = <®_dcdc1>; +}; + +&r_ir { + status = "okay"; +}; + +&r_pio { + /* + * We cannot add that supply for now since it would create a circular + * dependency between pinctrl, the regulator and the RSB Bus. + * + * vcc-pl-supply = <®_aldo2>; + */ +}; + +&r_rsb { + status = "okay"; + + axp803: pmic@3a3 { + compatible = "x-powers,axp803"; + reg = <0x3a3>; + interrupt-parent = <&r_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + x-powers,drive-vbus-en; + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + vin5-supply = <®_vcc5v>; + vin6-supply = <®_vcc5v>; + aldoin-supply = <®_vcc5v>; + dldoin-supply = <®_vcc5v>; + eldoin-supply = <®_vcc5v>; + fldoin-supply = <®_vcc5v>; + drivevbus-supply = <®_vcc5v>; + ips-supply = <®_vcc5v>; + + status = "okay"; + }; +}; + +#include "axp803.dtsi" + +&ac_power_supply { + status = "okay"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1040000>; + regulator-max-microvolt = <1300000>; + regulator-name = "vdd-cpux"; +}; + +/* DCDC3 is polyphased with DCDC2 */ + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +/* Deviates from the reset default of 1.1V. */ +®_dcdc6 { + regulator-always-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd-sys"; +}; + +®_aldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_aldo2 { + /* Specifying R_PIO consumer would create circular dependency. */ + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pll-avcc"; +}; + +/* AC200 power supply */ +®_dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-ave-33"; +}; + +®_dldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi-io"; +}; + +®_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + +®_eldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-cpvdd-dram-emmc"; +}; + +/* Supplies the arisc management core, needed by TF-A to power off cores. */ +®_fldo2 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpus"; +}; + +®_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&simplefb_hdmi { + vcc-hdmi-supply = <®_dcdc1>; +}; + +&sound { + simple-audio-card,aux-devs = <&codec_analog>; + simple-audio-card,widgets = "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Left DAC", "DACL", + "Right DAC", "DACR", + "Headphone Jack", "HP", + "ADCL", "Left ADC", + "ADCR", "Right ADC", + "MIC2", "Microphone Jack"; + status = "okay"; +}; + +/* On the (unpopulated) UART pads. */ +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8723bs-bt"; + enable-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ + max-speed = <1500000>; + }; +}; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + usb0_vbus-supply = <®_drivevbus>; + usb1_vbus-supply = <®_drivevbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-r40-feta40i.dtsi b/arch/arm/dts/sun8i-r40-feta40i.dtsi index 9f39b5a2bb..c12361d031 100644 --- a/arch/arm/dts/sun8i-r40-feta40i.dtsi +++ b/arch/arm/dts/sun8i-r40-feta40i.dtsi @@ -42,6 +42,13 @@ vcc-pg-supply = <®_dldo1>; }; +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3-tv-usb"; +}; + ®_aldo2 { regulator-always-on; regulator-min-microvolt = <1800000>; diff --git a/arch/arm/dts/vf610-pinfunc.h b/arch/arm/dts/vf610-pinfunc.h index b7b7322a2d..6775e4e337 100644 --- a/arch/arm/dts/vf610-pinfunc.h +++ b/arch/arm/dts/vf610-pinfunc.h @@ -20,7 +20,6 @@ #define ALT6 0x6 #define ALT7 0x7 - #define VF610_PAD_PTA6__GPIO_0 0x000 0x000 ALT0 0x0 #define VF610_PAD_PTA6__RMII_CLKOUT 0x000 0x000 ALT1 0x0 #define VF610_PAD_PTA6__RMII_CLKIN 0x000 0x2F0 ALT2 0x0 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index ca5e33379b..306f797f7a 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -190,7 +190,6 @@ #define SCR0_CLIENTPD_MASK 0x00000001 #define SCR0_USFCFG_MASK 0x00000400 - /* PCIe */ #define CFG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CFG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h index c18c51ed2c..b08274e361 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h @@ -37,7 +37,6 @@ * */ - #define FSL_INVALID_STREAM_ID 0 /* legacy devices */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h index 140849d4e1..09199dfad2 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h @@ -97,7 +97,6 @@ #define FSL_PEX_STREAM_ID_END (0x100) #endif - /* DPAA2 - set in MC DPC and alloced by MC */ #define FSL_DPAA2_STREAM_ID_START 23 #define FSL_DPAA2_STREAM_ID_END 63 diff --git a/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h b/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h index b98b45cc81..bcde48e473 100644 --- a/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h +++ b/arch/arm/include/asm/arch-hi3798cv200/hi3798cv200.h @@ -49,5 +49,4 @@ #define USB2_PHY01_REFCLK_SEL (1 << 12) #define USB2_PHY2_REFCLK_SEL (1 << 14) - #endif diff --git a/arch/arm/include/asm/arch-hi6220/hi6220.h b/arch/arm/include/asm/arch-hi6220/hi6220.h index 55729e306e..6d8bba6f7e 100644 --- a/arch/arm/include/asm/arch-hi6220/hi6220.h +++ b/arch/arm/include/asm/arch-hi6220/hi6220.h @@ -133,7 +133,6 @@ struct peri_sc_periph_regs { u32 reserved8_addr; /*0xd04*/ }; - /* CTRL1 bit definitions */ #define PERI_CTRL1_ETR_AXI_CSYSREQ_N (1 << 0) @@ -143,7 +142,6 @@ struct peri_sc_periph_regs { #define PERI_CTRL1_HIFI_INT_MASK_MSK (1 << 17) #define PERI_CTRL1_HIFI_ALL_INT_MASK_MSK (1 << 18) - /* CTRL2 bit definitions */ #define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC0 (1 << 0) diff --git a/arch/arm/include/asm/arch-hi6220/pinmux.h b/arch/arm/include/asm/arch-hi6220/pinmux.h index d18d2142f6..7ee51000d6 100644 --- a/arch/arm/include/asm/arch-hi6220/pinmux.h +++ b/arch/arm/include/asm/arch-hi6220/pinmux.h @@ -9,7 +9,6 @@ #include "periph.h" - /* iomg bit definition */ #define MUX_M0 0 #define MUX_M1 1 diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index 41160384a4..b2d87524f7 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -8,7 +8,6 @@ #ifndef _LPC32XX_CONFIG_H #define _LPC32XX_CONFIG_H - /* Basic CPU architecture */ #if !defined(CFG_SYS_NS16550_CLK) diff --git a/arch/arm/include/asm/arch-meson/gpio.h b/arch/arm/include/asm/arch-meson/gpio.h index d0142f16ef..9eb4221157 100644 --- a/arch/arm/include/asm/arch-meson/gpio.h +++ b/arch/arm/include/asm/arch-meson/gpio.h @@ -6,5 +6,4 @@ #ifndef __ASM_ARCH_MESON_GPIO_H #define __ASM_ARCH_MESON_GPIO_H - #endif /* __ASM_ARCH_MESON_GPIO_H */ diff --git a/arch/arm/include/asm/arch-mx27/gpio.h b/arch/arm/include/asm/arch-mx27/gpio.h index 9f342eb7f7..af05d1eb88 100644 --- a/arch/arm/include/asm/arch-mx27/gpio.h +++ b/arch/arm/include/asm/arch-mx27/gpio.h @@ -4,7 +4,6 @@ * Philippe Reynes <tremyfr@yahoo.fr> */ - #ifndef __ASM_ARCH_MX27_GPIO_H #define __ASM_ARCH_MX27_GPIO_H diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 77794d7d03..60499189b2 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -236,7 +236,6 @@ struct fuse_bank0_regs { #define SDCS1_SEL (1 << 1) #define SDCS0_SEL (1 << 0) - /* important definition of some bits of WCR */ #define WCR_WDE 0x04 diff --git a/arch/arm/include/asm/arch-mx31/gpio.h b/arch/arm/include/asm/arch-mx31/gpio.h index 45e9fc6193..1bfe28f95c 100644 --- a/arch/arm/include/asm/arch-mx31/gpio.h +++ b/arch/arm/include/asm/arch-mx31/gpio.h @@ -4,7 +4,6 @@ * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> */ - #ifndef __ASM_ARCH_MX31_GPIO_H #define __ASM_ARCH_MX31_GPIO_H diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index a0ab3a0e66..a608732f76 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -585,7 +585,6 @@ struct esdc_regs { #define GET_PLL_MFI(x) (((x) >> 10) & 0xf) #define GET_PLL_MFN(x) (((x) >> 0) & 0x3ff) - #define WEIM_ESDCTL0 0xB8001000 #define WEIM_ESDCFG0 0xB8001004 #define WEIM_ESDCTL1 0xB8001008 @@ -777,7 +776,6 @@ struct esdc_regs { #define MUX_CTL_NFC_ALE 0xD6 #define MUX_CTL_NFC_CLE 0xD7 - #define MUX_CTL_CAPTURE 0x150 #define MUX_CTL_COMPARE 0x151 diff --git a/arch/arm/include/asm/arch-mx5/gpio.h b/arch/arm/include/asm/arch-mx5/gpio.h index dad40bd3d7..98f9d63e9a 100644 --- a/arch/arm/include/asm/arch-mx5/gpio.h +++ b/arch/arm/include/asm/arch-mx5/gpio.h @@ -4,7 +4,6 @@ * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> */ - #ifndef __ASM_ARCH_MX5_GPIO_H #define __ASM_ARCH_MX5_GPIO_H diff --git a/arch/arm/include/asm/arch-mx6/gpio.h b/arch/arm/include/asm/arch-mx6/gpio.h index b391319933..f5c8d33699 100644 --- a/arch/arm/include/asm/arch-mx6/gpio.h +++ b/arch/arm/include/asm/arch-mx6/gpio.h @@ -4,7 +4,6 @@ * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> */ - #ifndef __ASM_ARCH_MX6_GPIO_H #define __ASM_ARCH_MX6_GPIO_H diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 8fd3dd2df3..7f216c70e8 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -385,7 +385,6 @@ ((is_mx6ull()) ? \ MX6ULL_LCDIF1_BASE_ADDR : MX6SX_LCDIF1_BASE_ADDR))) - extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac); #define SRC_SCR_CORE_1_RESET_OFFSET 14 diff --git a/arch/arm/include/asm/arch-mx7/crm_regs.h b/arch/arm/include/asm/arch-mx7/crm_regs.h index bfa68a9d2a..bb2642d46c 100644 --- a/arch/arm/include/asm/arch-mx7/crm_regs.h +++ b/arch/arm/include/asm/arch-mx7/crm_regs.h @@ -229,7 +229,6 @@ struct mxc_ccm_anatop_reg { #define ANADIG_PLL_ENET_PWDN_MASK (0x01 << 5) #define ANADIG_PLL_VIDEO_PWDN_MASK (0x01 << 12) - #define ANATOP_PFD480B_PFD4_FRAC_MASK 0x0000003f #define ANATOP_PFD480B_PFD4_FRAC_320M_VAL 0x0000001B #define ANATOP_PFD480B_PFD4_FRAC_392M_VAL 0x00000016 @@ -1784,7 +1783,6 @@ struct mxc_ccm_anatop_reg { #define PMU_LOWPWR_CTRL_TOG_CONTROL1_SHIFT 24 #define PMU_LOWPWR_CTRL_TOG_CONTROL1(x) (((uint32_t)(((uint32_t)(x))<<PMU_LOWPWR_CTRL_TOG_CONTROL1_SHIFT))&PMU_LOWPWR_CTRL_TOG_CONTROL1_MASK) - /* HW_ANADIG_TEMPSENSE0 Bit Fields */ #define TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_MASK 0x1FFu #define TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_SHIFT 0 @@ -1998,7 +1996,6 @@ struct mxc_ccm_anatop_reg { #define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_SHIFT 29 #define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR(x) (((uint32_t)(((uint32_t)(x))<<TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_SHIFT))&TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_MASK) - #define CCM_GPR(i) (CCM_BASE_ADDR + CCM_GPR0_OFFSET + 0x10 * (i)) #define CCM_OBSERVE(i) (CCM_BASE_ADDR + CCM_OBSERVE0_OFFSET + 0x10 * (i)) #define CCM_SCTRL(i) (CCM_BASE_ADDR + CCM_SCTRL0_OFFSET + 0x10 * (i)) @@ -2091,7 +2088,6 @@ struct mxc_ccm_anatop_reg { #define CLK_ROOT_ALT6 0x06000000 #define CLK_ROOT_ALT7 0x07000000 - #define DRAM_CLK_ROOT_POST_DIV_MASK 0x00000007 #define CLK_ROOT_POST_DIV_MASK 0x0000003f #define CLK_ROOT_POST_DIV_SHIFT 0 diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 6f5ae5173c..849c548224 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -71,7 +71,6 @@ #define GLOBAL_TIMER_BASE_ADDR (ARM_PERIPHBASE + 0x0200) #define PRIVATE_TIMERS_WD_BASE_ADDR (ARM_PERIPHBASE + 0x0600) - /* Defines for Blocks connected via AIPS (SkyBlue) */ #define AIPS_TZ1_BASE_ADDR AIPS1_ARB_BASE_ADDR #define AIPS_TZ2_BASE_ADDR AIPS2_ARB_BASE_ADDR @@ -1162,7 +1161,6 @@ struct rdc_sema_regs { #define LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_MASK 0x3ffff #define LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_OFFSET 0 - extern void check_cpu_temperature(void); extern void pcie_power_up(void); diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h index 33a699ff71..02e434f2e6 100644 --- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h @@ -124,7 +124,6 @@ #define IOMUXC_PSMI_IMUX_ALT6 (0x6) #define IOMUXC_PSMI_IMUX_ALT7 (0x7) - #define SIM_SOPT1_EN_SNVS_HARD_RST (1<<8) #define SIM_SOPT1_PMIC_STBY_REQ (1<<2) #define SIM_SOPT1_A7_SW_RESET (1<<0) @@ -240,7 +239,6 @@ #define IOMUXC_DPCR_DDR_DQS2 ((IOMUXC_DDR_RBASE + (4 * 34))) #define IOMUXC_DPCR_DDR_DQS3 ((IOMUXC_DDR_RBASE + (4 * 35))) - #define IOMUXC_DPCR_DDR_DQ0 ((IOMUXC_DDR_RBASE + (4 * 0))) #define IOMUXC_DPCR_DDR_DQ1 ((IOMUXC_DDR_RBASE + (4 * 1))) #define IOMUXC_DPCR_DDR_DQ2 ((IOMUXC_DDR_RBASE + (4 * 2))) diff --git a/arch/arm/include/asm/arch-mx7ulp/iomux.h b/arch/arm/include/asm/arch-mx7ulp/iomux.h index f067c02062..3eec2c78e5 100644 --- a/arch/arm/include/asm/arch-mx7ulp/iomux.h +++ b/arch/arm/include/asm/arch-mx7ulp/iomux.h @@ -69,7 +69,6 @@ typedef u64 iomux_cfg_t; #define NEW_PAD_CTRL(cfg, pad) (((cfg) & ~MUX_PAD_CTRL_MASK) | \ MUX_PAD_CTRL(pad)) - #define IOMUX_CONFIG_MPORTS 0x20 #define MUX_MODE_MPORTS ((iomux_v3_cfg_t)IOMUX_CONFIG_MPORTS << \ MUX_MODE_SHIFT) @@ -87,7 +86,6 @@ typedef u64 iomux_cfg_t; #define PAD_CTL_PUS_UP ((1 << 0) | PAD_CTL_PUE) #define PAD_CTL_PUS_DOWN ((0 << 0) | PAD_CTL_PUE) - void mx7ulp_iomux_setup_pad(iomux_cfg_t pad); void mx7ulp_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, unsigned count); diff --git a/arch/arm/include/asm/arch-mx7ulp/pcc.h b/arch/arm/include/asm/arch-mx7ulp/pcc.h index 8f0d700628..09b9b9b8f3 100644 --- a/arch/arm/include/asm/arch-mx7ulp/pcc.h +++ b/arch/arm/include/asm/arch-mx7ulp/pcc.h @@ -278,7 +278,6 @@ enum pcc3_entry { RSVD127_PCC3_SLOT = 127, }; - /* PCC registers */ #define PCC_PR_OFFSET 31 #define PCC_PR_MASK (0x1 << PCC_PR_OFFSET) @@ -293,7 +292,6 @@ enum pcc3_entry { #define PCC_PCD_OFFSET 0 #define PCC_PCD_MASK (0x7 << PCC_PCD_OFFSET) - enum pcc_clksrc_type { CLKSRC_PER_PLAT = 0, CLKSRC_PER_BUS = 1, @@ -353,7 +351,6 @@ enum pcc_clk { PER_CLK_GPU2D, }; - /* This structure keeps info for each pcc slot */ struct pcc_entry { u32 pcc_base; diff --git a/arch/arm/include/asm/arch-mx7ulp/scg.h b/arch/arm/include/asm/arch-mx7ulp/scg.h index 3b5b7f6803..57e9fb2a27 100644 --- a/arch/arm/include/asm/arch-mx7ulp/scg.h +++ b/arch/arm/include/asm/arch-mx7ulp/scg.h @@ -145,7 +145,6 @@ #define SCG_UPLL_CSR_UPLLVLD_MASK (0x01000000) - #define SCG_PLL_PFD3_GATE_MASK (0x80000000) #define SCG_PLL_PFD2_GATE_MASK (0x00800000) #define SCG_PLL_PFD1_GATE_MASK (0x00008000) diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index fce3568eca..2b6cfde411 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -463,7 +463,6 @@ enum { #define NET_LAN9221_GPMC_CONFIG6 0x87030000 #define NET_LAN9221_GPMC_CONFIG7 0x00000f6c - /* max number of GPMC Chip Selects */ #define GPMC_MAX_CS 8 /* max number of GPMC regs */ diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h b/arch/arm/include/asm/arch-omap3/mmc_host_def.h index 39a7cba0f6..2e34989ef9 100644 --- a/arch/arm/include/asm/arch-omap3/mmc_host_def.h +++ b/arch/arm/include/asm/arch-omap3/mmc_host_def.h @@ -63,5 +63,4 @@ typedef struct t2 { #define OMAP_HSMMC2_BASE 0x480B4000 #define OMAP_HSMMC3_BASE 0x480AD000 - #endif /* MMC_HOST_DEF_H */ diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h index 4054dd8edc..50436e828b 100644 --- a/arch/arm/include/asm/arch-omap4/clock.h +++ b/arch/arm/include/asm/arch-omap4/clock.h @@ -100,7 +100,6 @@ #define CD_CLKCTRL_CLKTRCTRL_SW_WKUP 2 #define CD_CLKCTRL_CLKTRCTRL_HW_AUTO 3 - /* CM_<clock_domain>_<module>_CLKCTRL */ #define MODULE_CLKCTRL_MODULEMODE_SHIFT 0 #define MODULE_CLKCTRL_MODULEMODE_MASK 3 diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index b18ef459de..eeb3c6f2a6 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -111,7 +111,6 @@ #define CD_CLKCTRL_CLKTRCTRL_SW_WKUP 2 #define CD_CLKCTRL_CLKTRCTRL_HW_AUTO 3 - /* CM_<clock_domain>_<module>_CLKCTRL */ #define MODULE_CLKCTRL_MODULEMODE_SHIFT 0 #define MODULE_CLKCTRL_MODULEMODE_MASK 3 diff --git a/arch/arm/include/asm/arch-omap5/gpio.h b/arch/arm/include/asm/arch-omap5/gpio.h index 1e44fb5ae9..efd816be2c 100644 --- a/arch/arm/include/asm/arch-omap5/gpio.h +++ b/arch/arm/include/asm/arch-omap5/gpio.h @@ -33,7 +33,6 @@ #define OMAP54XX_GPIO7_BASE 0x48051000 #define OMAP54XX_GPIO8_BASE 0x48053000 - /* Get the GPIO index from the given bank number and bank gpio */ #define GPIO_TO_PIN(bank, bank_gpio) (32 * (bank - 1) + (bank_gpio)) diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index 9778790f34..c3259b8e7c 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -17,6 +17,8 @@ # include <asm/arch-rockchip/cru_rk3399.h> #elif defined(CONFIG_ROCKCHIP_RK3568) #include <asm/arch-rockchip/cru_rk3568.h> +#elif defined(CONFIG_ROCKCHIP_RK3588) +#include <asm/arch-rockchip/cru_rk3588.h> #endif /* CRU_GLB_RST_ST */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h index a0e54d3965..dad484813f 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h @@ -92,6 +92,8 @@ struct rk3588_cru { unsigned int pmuclkgate_con[9]; /* Address Offset: 0x0100 */ }; +#define rockchip_cru rk3588_cru + check_member(rk3588_cru, mode_con00, 0x280); check_member(rk3588_cru, pmuclksel_con[1], 0x30304); diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h index 9559813e52..edacf10285 100644 --- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h @@ -532,7 +532,6 @@ check_member(rk3288_edp, pll_reg_5, 0xa00); #define EDID_HEADER 0x00 #define EDID_EXTENSION_FLAG 0x7e - enum dpcd_request { DPCD_READ, DPCD_WRITE, diff --git a/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h index fb25504b12..f4da391ba5 100644 --- a/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h @@ -96,5 +96,4 @@ #define LVDS_24BIT (0 << 1) #define LVDS_18BIT (1 << 1) - #endif diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h index 14df3cc8f4..35ca0491ac 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h @@ -262,7 +262,6 @@ struct sunxi_ccm_reg { #define CCM_DRAM_GATE_OFFSET_DE_BE0 26 #define CCM_DRAM_GATE_OFFSET_DE_BE1 27 - #define MBUS_CLK_DEFAULT 0x81000002 /* PLL6 / 2 */ #define MBUS_CLK_GATE (0x1 << 31) @@ -295,7 +294,6 @@ struct sunxi_ccm_reg { #define APB2_RESET_TWI_SHIFT (0) #define APB2_RESET_TWI_MASK (0xf << APB2_RESET_TWI_SHIFT) - #ifndef __ASSEMBLY__ void clock_set_pll1(unsigned int hz); void clock_set_pll5(unsigned int clk); diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h index 0264bfe1c5..006f7761fc 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h @@ -217,7 +217,6 @@ struct sunxi_ccm_reg { #define APB1_RESET_TWI_SHIFT 0 #define APB1_RESET_TWI_MASK (0xf << APB1_RESET_TWI_SHIFT) - #ifndef __ASSEMBLY__ void clock_set_pll1(unsigned int clk); void clock_set_pll6(unsigned int clk); diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h index be02655cdd..f0caecc807 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h @@ -323,7 +323,6 @@ struct dram_para { const u8 dx_write_delays[NR_OF_BYTE_LANES][WR_LINES_PER_BYTE_LANE]; }; - static inline int ns_to_t(int nanoseconds) { const unsigned int ctrl_freq = CONFIG_DRAM_CLK / 2; diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h index 2a87996354..28b6560ff5 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h @@ -146,7 +146,6 @@ struct sunxi_mctl_ctl_reg { u32 perfwr1; /* 0x1d8 */ }; - #define ZQnPR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000144 + 0x10 * x) #define ZQnDR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000148 + 0x10 * x) #define ZQnSR(x) (SUNXI_DRAM_CTL0_BASE + 0x0000014c + 0x10 * x) diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun9i.h b/arch/arm/include/asm/arch-sunxi/dram_sun9i.h index 41df5fe5b6..a77daecb10 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun9i.h @@ -40,7 +40,6 @@ struct sunxi_mctl_com_reg { u32 mdfstcr; /* 0x14c */ }; - struct sunxi_mctl_ctl_reg { u32 mstr; /* 0x00 master register */ u32 stat; /* 0x04 operating mode status register */ @@ -92,7 +91,6 @@ struct sunxi_mctl_ctl_reg { u32 perfwr1; /* 0x26c write CAM register 1 */ }; - struct sunxi_mctl_phy_reg { u8 res0[0x04]; /* 0x00 revision id ??? */ u32 pir; /* 0x04 PHY initialisation register */ diff --git a/arch/arm/include/asm/arch-tegra/bpmp_abi.h b/arch/arm/include/asm/arch-tegra/bpmp_abi.h index 373da526ed..924361bab8 100644 --- a/arch/arm/include/asm/arch-tegra/bpmp_abi.h +++ b/arch/arm/include/asm/arch-tegra/bpmp_abi.h @@ -29,7 +29,6 @@ * @file */ - /** * @defgroup MRQ MRQ Messages * @brief Messages sent to/from BPMP via IPC @@ -167,7 +166,6 @@ struct mrq_response { * @} */ - /** * @ingroup MRQ_Codes * @def MRQ_PING @@ -616,7 +614,6 @@ struct mrq_debugfs_response { #define DEBUGFS_S_IWUSR (1 << 7) /** @} */ - /** * @ingroup MRQ_Codes * @def MRQ_RESET diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index 61ef81e7fe..2957b97e6a 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -130,7 +130,6 @@ void reset_periph(enum periph_id periph_id, int us_delay); */ void reset_set_enable(enum periph_id periph_id, int enable); - /* CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 */ enum crc_reset_id { /* Things we can hold in reset for each CPU */ diff --git a/arch/arm/include/asm/arch-tegra/warmboot.h b/arch/arm/include/asm/arch-tegra/warmboot.h index bfde4c30ac..9a53456370 100644 --- a/arch/arm/include/asm/arch-tegra/warmboot.h +++ b/arch/arm/include/asm/arch-tegra/warmboot.h @@ -117,7 +117,6 @@ union scratch3_reg { u32 word; }; - /** * Save warmboot memory settings for a later resume * diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/asm/byteorder.h index 20cce7657e..6a80be5750 100644 --- a/arch/arm/include/asm/byteorder.h +++ b/arch/arm/include/asm/byteorder.h @@ -15,7 +15,6 @@ #ifndef __ASM_ARM_BYTEORDER_H #define __ASM_ARM_BYTEORDER_H - #include <asm/types.h> #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index 2141a4581c..4a9e26f634 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -880,7 +880,6 @@ struct dmm_lisa_map_regs { #define RL_FINAL 6 #endif - /* Interleaving policies at EMIF level- between banks and Chip Selects */ #define EMIF_INTERLEAVING_POLICY_MAX_INTERLEAVING 0 #define EMIF_INTERLEAVING_POLICY_NO_BANK_INTERLEAVING 3 @@ -913,7 +912,6 @@ struct dmm_lisa_map_regs { */ #define READ_IDLE_INTERVAL_NORMAL (50*1000) - /* * Unless voltage is changing due to DVFS one ZQCS command every 50ms should * be enough. This shoule be enough also in the case when voltage is changing @@ -961,7 +959,6 @@ struct dmm_lisa_map_regs { #define REG_SR_TIM 0xF #define REG_PD_TIM 0xF - /* EMIF_PWR_MGMT_CTRL register */ #define EMIF_PWR_MGMT_CTRL (\ ((REG_CS_TIM << EMIF_REG_CS_TIM_SHIFT) & EMIF_REG_CS_TIM_MASK)|\ diff --git a/arch/arm/include/asm/mach-imx/gpio.h b/arch/arm/include/asm/mach-imx/gpio.h index 25763526f5..f7d751f402 100644 --- a/arch/arm/include/asm/mach-imx/gpio.h +++ b/arch/arm/include/asm/mach-imx/gpio.h @@ -4,7 +4,6 @@ * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> */ - #ifndef __ASM_ARCH_IMX_GPIO_H #define __ASM_ARCH_IMX_GPIO_H diff --git a/arch/arm/include/asm/mach-imx/mxc_i2c.h b/arch/arm/include/asm/mach-imx/mxc_i2c.h index e8b330f33d..cf694de497 100644 --- a/arch/arm/include/asm/mach-imx/mxc_i2c.h +++ b/arch/arm/include/asm/mach-imx/mxc_i2c.h @@ -91,7 +91,6 @@ struct mxc_i2c_bus { } \ }; - #define I2C_PADS_INFO(name) \ (is_mx6dq() || is_mx6dqp()) ? &mx6q_##name : &mx6s_##name #endif diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 17fdfbcffb..9945eeb66b 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -814,7 +814,6 @@ static inline u8 is_dra76x_acd(void) #define HS_DEVICE 0x2 #define GP_DEVICE 0x3 - /* * SRAM scratch space entries */ diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h index 21b3344298..bc2f9e7081 100644 --- a/arch/arm/include/asm/opcodes.h +++ b/arch/arm/include/asm/opcodes.h @@ -15,7 +15,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); #define ARM_OPCODE_CONDTEST_PASS 1 #define ARM_OPCODE_CONDTEST_UNCOND 2 - /* * Assembler opcode byteswap helpers. * These are only intended for use by this header: don't use them directly, @@ -42,7 +41,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); #define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF) #define ___asm_opcode_identity16(x) ((x) & 0xFFFF) - /* * Opcode byteswap helpers * @@ -94,7 +92,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); #endif /* ! __ASSEMBLY__ */ - #ifdef CONFIG_CPU_ENDIAN_BE8 #define __opcode_to_mem_arm(x) ___opcode_swab32(x) diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index e0e2d7e360..b8ca50a640 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h @@ -75,7 +75,6 @@ struct param_struct { char commandline[COMMAND_LINE_SIZE]; }; - /* * The new way of passing information: a list of tagged entries */ diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h index f51e47e55d..6ca2c4ae6f 100644 --- a/arch/arm/mach-at91/include/mach/at91_pio.h +++ b/arch/arm/mach-at91/include/mach/at91_pio.h @@ -13,7 +13,6 @@ #ifndef AT91_PIO_H #define AT91_PIO_H - #define AT91_ASM_PIO_RANGE 0x200 #define AT91_ASM_PIOC_ASR \ (ATMEL_BASE_PIO + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x70) diff --git a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h index 40ec87e2ff..6beab397ae 100644 --- a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h +++ b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h @@ -59,7 +59,6 @@ struct atmel_mpddr { u32 version; /* 0xfc: IP version */ }; - int ddr2_init(const unsigned int base, const unsigned int ram_address, const struct atmel_mpddrc_config *mpddr_value); diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c index ac6a719d9c..acd7cc9301 100644 --- a/arch/arm/mach-at91/mpddrc.c +++ b/arch/arm/mach-at91/mpddrc.c @@ -35,7 +35,6 @@ static int ddr2_decodtype_is_seq(const unsigned int base, u32 cr) return 1; } - int ddr2_init(const unsigned int base, const unsigned int ram_address, const struct atmel_mpddrc_config *mpddr_value) diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c index 9199234917..1dc7ce50d1 100644 --- a/arch/arm/mach-bcm283x/reset.c +++ b/arch/arm/mach-bcm283x/reset.c @@ -25,8 +25,6 @@ /* max ticks timeout */ #define BCM2835_WDOG_MAX_TIMEOUT 0x000fffff -void hw_watchdog_disable(void) {} - __efi_runtime_data struct bcm2835_wdog_regs *wdog_regs; static void __efi_runtime @@ -34,10 +32,9 @@ __reset_cpu(struct bcm2835_wdog_regs *wdog_regs, ulong ticks) { uint32_t rstc, timeout; - if (ticks == 0) { - hw_watchdog_disable(); + if (ticks == 0) timeout = RESET_TIMEOUT; - } else + else timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT; rstc = readl(&wdog_regs->rstc); diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c index 936b5e1166..78d50d4e71 100644 --- a/arch/arm/mach-davinci/da850_lowlevel.c +++ b/arch/arm/mach-davinci/da850_lowlevel.c @@ -146,7 +146,6 @@ static int da850_pll_init(struct davinci_pllc_regs *reg, unsigned long pllmult) */ setbits_le32(®->pllctl, PLLCTL_PLLEN); - /* * clear EMIFA and EMIFB clock source settings, let them * run off SYSCLK diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h index 4f56160ee5..a3fc7d9fbe 100644 --- a/arch/arm/mach-exynos/common_setup.h +++ b/arch/arm/mach-exynos/common_setup.h @@ -61,7 +61,6 @@ enum l2_cache_params { CACHE_ENABLE_FORCE_L2_LOGIC = (1 << 27) }; - #if !defined(CONFIG_SYS_L2CACHE_OFF) && defined(CONFIG_EXYNOS5420) /* * Configure L2CTLR to get timings that keep us from hanging/crashing. diff --git a/arch/arm/mach-exynos/exynos4_setup.h b/arch/arm/mach-exynos/exynos4_setup.h index 23c9011fbc..1a287a4ef6 100644 --- a/arch/arm/mach-exynos/exynos4_setup.h +++ b/arch/arm/mach-exynos/exynos4_setup.h @@ -284,7 +284,6 @@ #define MFC_0_SEL MFC_SEL_MPLL #define CLK_SRC_MFC_VAL ((MFC_SEL << 8) | (MFC_0_SEL)) - /* CLK_DIV_MFC */ #define MFC_RATIO 3 #define CLK_DIV_MFC_VAL (MFC_RATIO) @@ -498,7 +497,6 @@ struct mem_timings { | ADD_LAT_PALL | MEM_TYPE_DDR3 | MEM_WIDTH_32\ | NUM_CHIP_2 | BL_8) - #define CHIP_BANK_8 (0x3 << 0) #define CHIP_ROW_14 (0x2 << 4) #define CHIP_COL_10 (0x3 << 8) diff --git a/arch/arm/mach-exynos/exynos5_setup.h b/arch/arm/mach-exynos/exynos5_setup.h index 4e508edba0..6fa80221c8 100644 --- a/arch/arm/mach-exynos/exynos5_setup.h +++ b/arch/arm/mach-exynos/exynos5_setup.h @@ -685,7 +685,6 @@ #define PWM_RATIO 8 #define CLK_DIV_PERIC3_VAL (PWM_RATIO << 0) - /* CLK_DIV_PERIC4 */ #define CLK_DIV_PERIC4_VAL NOT_AVAILABLE @@ -710,7 +709,6 @@ /* MPLL_CON1 */ #define MPLL_CON1_VAL (0x0020F300) - /* CPLL_CON1 */ #define CPLL_CON1_VAL 0x0020f300 @@ -720,7 +718,6 @@ /* GPLL_CON1 */ #define GPLL_CON1_VAL (NOT_AVAILABLE) - /* EPLL_CON1, CON2 */ #define EPLL_CON1_VAL 0x00000000 #define EPLL_CON2_VAL 0x00000080 @@ -750,7 +747,6 @@ #define CLK_DIV_ISP0_VAL 0x13131300 #define CLK_DIV_ISP1_VAL 0xbb110202 - /* CLK_FSYS */ #define CLK_SRC_FSYS0_VAL 0x33033300 #define CLK_DIV_FSYS0_VAL 0x0 diff --git a/arch/arm/mach-exynos/include/mach/cpu.h b/arch/arm/mach-exynos/include/mach/cpu.h index dab148e332..cf4580be18 100644 --- a/arch/arm/mach-exynos/include/mach/cpu.h +++ b/arch/arm/mach-exynos/include/mach/cpu.h @@ -190,7 +190,6 @@ #define EXYNOS5420_MODEM_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5420_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE - #ifndef __ASSEMBLY__ #include <asm/io.h> /* CPU detection macros */ diff --git a/arch/arm/mach-exynos/include/mach/dp_info.h b/arch/arm/mach-exynos/include/mach/dp_info.h index 3226eb95f0..a7f7667afd 100644 --- a/arch/arm/mach-exynos/include/mach/dp_info.h +++ b/arch/arm/mach-exynos/include/mach/dp_info.h @@ -183,7 +183,6 @@ enum { VIDEO_TIMING_FROM_REGISTER }; - struct exynos_dp_platform_data { struct exynos_dp_priv *edp_dev_info; }; diff --git a/arch/arm/mach-exynos/include/mach/power.h b/arch/arm/mach-exynos/include/mach/power.h index 757e1586bd..32534116cf 100644 --- a/arch/arm/mach-exynos/include/mach/power.h +++ b/arch/arm/mach-exynos/include/mach/power.h @@ -1752,7 +1752,6 @@ void set_xclkout(void); */ uint32_t get_reset_status(void); - /* Read the resume function and call it */ void power_exit_wakeup(void); diff --git a/arch/arm/mach-exynos/include/mach/sound.h b/arch/arm/mach-exynos/include/mach/sound.h index 1a40e35f0b..9672e977f0 100644 --- a/arch/arm/mach-exynos/include/mach/sound.h +++ b/arch/arm/mach-exynos/include/mach/sound.h @@ -4,7 +4,6 @@ * Rajeshwari Shinde <rajeshwari.s@samsung.com> */ - #ifndef __SOUND_ARCH_H__ #define __SOUND_ARCH_H__ diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c index 4061dd4aaf..07d19fd17b 100644 --- a/arch/arm/mach-exynos/pinmux.c +++ b/arch/arm/mach-exynos/pinmux.c @@ -391,7 +391,6 @@ static void exynos5420_i2s_config(int peripheral) } } - void exynos5_spi_config(int peripheral) { int cfg = 0, pin = 0, i; diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c index 599d3ccff6..1b61da6dc1 100644 --- a/arch/arm/mach-exynos/power.c +++ b/arch/arm/mach-exynos/power.c @@ -20,7 +20,6 @@ static void exynos4_mipi_phy_control(unsigned int dev_index, else addr = (unsigned int)&pmu->mipi_phy1_control; - cfg = readl(addr); if (enable) cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE); @@ -174,7 +173,6 @@ void set_ps_hold_ctrl(void) exynos5_set_ps_hold_ctrl(); } - static void exynos5_set_xclkout(void) { struct exynos5_power *power = diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c index b368db49fc..7b3eacb43e 100644 --- a/arch/arm/mach-imx/cache.c +++ b/arch/arm/mach-imx/cache.c @@ -86,7 +86,6 @@ void v7_outer_cache_enable(void) struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; unsigned int val, cache_id; - /* * Must disable the L2 before changing the latency parameters * and auxiliary control register. diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 627baa1d83..accba502e4 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -519,7 +519,6 @@ phys_size_t get_effective_memsize(void) board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, &phys_sdram_2_start, &phys_sdram_2_size); - end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; for (mr = 0; mr < 64; mr++) { err = get_owned_memreg(mr, &start, &end); @@ -699,7 +698,6 @@ static u64 get_block_size(sc_faddr_t addr_start, sc_faddr_t addr_end) board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size, &phys_sdram_2_start, &phys_sdram_2_size); - end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size; end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size; diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 7e6c374871..43e677deae 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -733,7 +733,6 @@ static int frac_pll_init(u32 pll, enum frac_pll_out_val val) return 0; } - int clock_init(void) { u32 grade; diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index ab5de26657..03e1214c06 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -83,7 +83,6 @@ int litesom_mmc_init(struct bd_info *bis) #include <spl.h> #include <asm/arch/mx6-ddr.h> - static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { .grp_addds = 0x00000030, .grp_ddrmode_ctl = 0x00020000, diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index d4fb5389ca..59da7300dd 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -428,7 +428,6 @@ static u32 scg_nic_get_rate(enum scg_clk clk) return rate; } - static enum scg_clk scg_scs_array[4] = { SCG_SOSC_CLK, SCG_SIRC_CLK, SCG_FIRC_CLK, SCG_ROSC_CLK, }; @@ -807,7 +806,6 @@ int scg_enable_usb_pll(bool usb_control) return 0; } - /* A7 domain system clock source is SPLL */ #define SCG1_RCCR_SCS_NUM ((SCG_SCS_SYS_PLL) << SCG_CCR_SCS_SHIFT) diff --git a/arch/arm/mach-keystone/include/mach/psc_defs.h b/arch/arm/mach-keystone/include/mach/psc_defs.h index f164f95bf2..e5d70d2931 100644 --- a/arch/arm/mach-keystone/include/mach/psc_defs.h +++ b/arch/arm/mach-keystone/include/mach/psc_defs.h @@ -26,7 +26,6 @@ #define PSC_REG_MDSTAT(x) (0x800 + (4 * (x))) #define PSC_REG_MDCTL(x) (0xa00 + (4 * (x))) - static inline u32 _boot_bit_mask(u32 x, u32 y) { u32 val = (1 << (x - y + 1)) - 1; diff --git a/arch/arm/mach-keystone/msmc.c b/arch/arm/mach-keystone/msmc.c index a20e0c9886..51c994f972 100644 --- a/arch/arm/mach-keystone/msmc.c +++ b/arch/arm/mach-keystone/msmc.c @@ -53,7 +53,6 @@ struct msms_regs { struct mpax ses[16][8]; }; - void msmc_share_all_segments(int priv_id) { struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE; diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index 7938820e51..3d224e2036 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c @@ -48,7 +48,6 @@ void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save) } debug("\n"); - while (*mpp_list) { unsigned int num = MPP_NUM(*mpp_list); unsigned int sel = MPP_SEL(*mpp_list); diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c index 9baeece3c8..c13416add1 100644 --- a/arch/arm/mach-mvebu/mbus.c +++ b/arch/arm/mach-mvebu/mbus.c @@ -276,7 +276,6 @@ static int mvebu_mbus_alloc_window(phys_addr_t base, size_t size, target, attr); } - for (win = 0; win < MVEBU_MBUS_NUM_WINS; win++) if (mvebu_mbus_window_is_free(win)) return mvebu_mbus_setup_window(win, base, size, diff --git a/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h b/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h index 9c3e7c0820..625c2a5dd7 100644 --- a/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h +++ b/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h @@ -76,7 +76,6 @@ #define SAR_CPU_FAB_GET(cpu, fab) (((cpu & 0x7) << 21) | ((fab & 0xF) << 24)) - #define CORE_AVS_CONTROL_0REG 0x18300 #define CORE_AVS_CONTROL_2REG 0x18308 #define CPU_AVS_CONTROL2_REG 0x20868 @@ -86,7 +85,6 @@ #define MSAR_TCLK_OFFS 28 #define MSAR_TCLK_MASK (0x1 << MSAR_TCLK_OFFS) - /* Controler environment registers offsets */ #define GEN_PURP_RES_1_REG 0x182F4 #define GEN_PURP_RES_2_REG 0x182F8 @@ -146,7 +144,6 @@ 0x40000 + ((port) % 2) * 0x4000) #define MV_ETH_REGS_BASE(port) MV_ETH_REGS_OFFSET(port) - #define SGMII_PWR_PLL_CTRL_REG(port) (MV_ETH_REGS_BASE(port) + 0xE04) #define SGMII_DIG_LP_ENA_REG(port) (MV_ETH_REGS_BASE(port) + 0xE8C) #define SGMII_REF_CLK_SEL_REG(port) (MV_ETH_REGS_BASE(port) + 0xF18) @@ -182,7 +179,6 @@ #define SCR_PEX1_4BY1_OFFS 8 #define SCR_PEX1_4BY1_MASK (1 << SCR_PEX1_4BY1_OFFS) - #define MV_MISC_REGS_OFFSET (0x18200) #define MV_MISC_REGS_BASE (MV_MISC_REGS_OFFSET) #define SOC_CTRL_REG (MV_MISC_REGS_BASE + 0x4) @@ -226,7 +222,6 @@ #define PXCAR_REAL_EXT_REG_NUM_OFFS 8 #define PXCAR_REAL_EXT_REG_NUM_MASK (0xF << PXCAR_REAL_EXT_REG_NUM_OFFS) - #define PEX_CAPABILITIES_REG(if) ((MV_PEX_IF_REGS_BASE(if)) + 0x60) #define PEX_LINK_CAPABILITIES_REG(if) ((MV_PEX_IF_REGS_BASE(if)) + 0x6C) #define PEX_LINK_CTRL_STATUS_REG(if) ((MV_PEX_IF_REGS_BASE(if)) + 0x70) diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h index b920f5ef09..a29d06cf3c 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h @@ -21,7 +21,6 @@ typedef enum { SERDES_LAST_UNIT } MV_BIN_SERDES_UNIT_INDX; - typedef enum { PEX_BUS_DISABLED = 0, PEX_BUS_MODE_X1 = 1, @@ -63,7 +62,6 @@ typedef struct board_serdes_conf { MV_SERDES_CHANGE_M_PHY *serdes_m_phy_change; } MV_BIN_SERDES_CFG; - #define BIN_SERDES_CFG { \ {0, 1, -1 , -1, -1, -1, -1, -1, -1}, /* Lane 0 */ \ {0, 1, -1 , -1, -1, -1, -1, -1, 2}, /* Lane 1 */ \ diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c index 4765ce0ade..515b6f1b87 100644 --- a/arch/arm/mach-omap2/am33xx/chilisom.c +++ b/arch/arm/mach-omap2/am33xx/chilisom.c @@ -102,7 +102,6 @@ void chilisom_spl_board_init(void) /* Get the frequency */ dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); - if (i2c_probe(TPS65217_CHIP_PM)) return; diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c index f07003c95b..cc955345db 100644 --- a/arch/arm/mach-omap2/am33xx/clock.c +++ b/arch/arm/mach-omap2/am33xx/clock.c @@ -213,7 +213,6 @@ void do_disable_clocks(u32 *const *clk_domains, { u32 i, max = 100; - /* Clock modules that need to be put in SW_DISABLE */ for (i = 0; (i < max) && clk_modules_disable && clk_modules_disable[i]; i++) diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c index 87afc09660..7ac67cb489 100644 --- a/arch/arm/mach-omap2/am33xx/sys_info.c +++ b/arch/arm/mach-omap2/am33xx/sys_info.c @@ -74,7 +74,6 @@ u32 get_sys_clk_index(void) CTRL_SYSBOOT_15_14_SHIFT); } - #ifdef CONFIG_DISPLAY_CPUINFO static char *cpu_revs[] = { "1.0", diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c index 2a0c22841d..18d099145c 100644 --- a/arch/arm/mach-omap2/clocks-common.c +++ b/arch/arm/mach-omap2/clocks-common.c @@ -896,7 +896,6 @@ void do_disable_clocks(u32 const *clk_domains, { u32 i, max = 100; - /* Clock modules that need to be put in SW_DISABLE */ for (i = 0; (i < max) && clk_modules_disable[i]; i++) disable_clock_module(clk_modules_disable[i], diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index 138501602c..bb67e50fd5 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -268,7 +268,6 @@ void watchdog_init(void) writel(WD_UNLOCK2, &wd2_base->wspr); } - /* * This function finds the SDRAM size available in the system * based on DMM section configurations @@ -315,7 +314,6 @@ u32 omap_sdram_size(void) return total_size; } - /* * Routine: dram_init * Description: sets uboots idea of sdram size diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c index c5ada607f9..1de343ff48 100644 --- a/arch/arm/mach-omap2/omap3/board.c +++ b/arch/arm/mach-omap2/omap3/board.c @@ -405,7 +405,6 @@ void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr)); } - #ifndef CONFIG_SYS_L2CACHE_OFF static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits) { diff --git a/arch/arm/mach-renesas/include/mach/rcar-base.h b/arch/arm/mach-renesas/include/mach/rcar-base.h index 4c2ee8187e..a0f1c7762a 100644 --- a/arch/arm/mach-renesas/include/mach/rcar-base.h +++ b/arch/arm/mach-renesas/include/mach/rcar-base.h @@ -328,7 +328,6 @@ #define MEDIA_AXI_VSP0W_BASE 0xFE966D00 #endif /* R8A7792 */ - #define SYS_AXI_AVBDMSCR 0xFF802000 #define SYS_AXI_SYX2DMSCR 0xFF802004 #define SYS_AXI_AX2MDMSCR 0xFF802004 diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 14b3ab1a57..fc1b638ff0 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -16,6 +16,8 @@ config ROCKCHIP_PX30 select DEBUG_UART_BOARD_INIT imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD + imply ARMV8_CRYPTO + imply ARMV8_SET_SMPEN help The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 including NEON and GPU, Mali-400 graphics, several DDR3 options @@ -167,6 +169,7 @@ config ROCKCHIP_RK3308 imply LEGACY_IMAGE_FORMAT imply MISC imply MISC_INIT_R + imply OF_LIBFDT_OVERLAY imply OF_UPSTREAM imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD @@ -197,6 +200,7 @@ config ROCKCHIP_RK3328 imply ARMV8_SET_SMPEN imply MISC imply MISC_INIT_R + imply OF_LIBFDT_OVERLAY imply OF_LIVE imply OF_UPSTREAM imply PRE_CONSOLE_BUFFER diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c index c9de57493d..893a5234ba 100644 --- a/arch/arm/mach-rockchip/px30/syscon_px30.c +++ b/arch/arm/mach-rockchip/px30/syscon_px30.c @@ -18,6 +18,9 @@ static const struct udevice_id px30_syscon_ids[] = { U_BOOT_DRIVER(syscon_px30) = { .id = UCLASS_SYSCON, .name = "px30_syscon", +#if CONFIG_IS_ENABLED(OF_REAL) + .bind = dm_scan_fdt_dev, +#endif .of_match = px30_syscon_ids, }; diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index 3de695186e..a7be30bbd8 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -3,27 +3,6 @@ if ROCKCHIP_RK3368 choice prompt "RK3368 board" -config TARGET_LION_RK3368 - bool "Theobroma Systems RK3368-uQ7 (Lion) module" - select ARCH_EARLY_INIT_R - help - The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm, - MXM-230 connector) system-on-module designed by Theobroma - Systems for industrial applications. - - It provides the following features: - - 8x Cortex-A53 (in 2 clusters of 4 cores each) - - (on-module) up to 4GB of DDR3 memory - - (on-module) SPI-NOR flash - - (on-module) eMMC - - Gigabit Ethernet (with an on-module KSZ9031 PHY) - - USB - - HDMI - - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) - - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) - - on-module STM32 providing CAN, RTC and fan-control - - (optional on-module) EAL4+-certified security module - config TARGET_SHEEP bool "Sheep board" help @@ -62,7 +41,6 @@ config SPL_LIBCOMMON_SUPPORT config SPL_LIBGENERIC_SUPPORT default y -source "board/theobroma-systems/lion_rk3368/Kconfig" source "board/rockchip/sheep_rk3368/Kconfig" source "board/geekbuying/geekbox/Kconfig" source "board/rockchip/evb_px5/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 9a35c7d9cc..e751d64e1a 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -78,6 +78,30 @@ config TARGET_NANOPCT6_RK3588 Power: 5.5*2.1mm DC Jack, 12VDC input Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case) +config TARGET_NANOPI_R6C_RK3588S + bool "FriendlyElec NanoPi R6C" + select BOARD_LATE_INIT + help + The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip + RK3588s. + It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB + eMMC storage, one M.2 M-Key connector, one RTL8211F 1GbE and one + RTL8125 2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 + Type-A port, a HDMI port, a 30-pin GPIO header as well as some + buttons and LEDs. + +config TARGET_NANOPI_R6S_RK3588S + bool "FriendlyElec NanoPi R6S" + select BOARD_LATE_INIT + help + The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip + RK3588s. + It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC + storage, one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, + one USB 2.0 Type-A and one USB 3.0 Type-A port, a HDMI port, a + 12-pin GPIO FPC connector, a fan connector, IR receiver as well + as some buttons and LEDs. + config TARGET_NOVA_RK3588 bool "Indiedroid Nova RK3588" select BOARD_LATE_INIT @@ -288,6 +312,8 @@ config TEXT_BASE source "board/armsom/sige7-rk3588/Kconfig" source "board/edgeble/neural-compute-module-6/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" +source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" +source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" source "board/indiedroid/nova/Kconfig" source "board/pine64/quartzpro64-rk3588/Kconfig" source "board/turing/turing-rk1-rk3588/Kconfig" diff --git a/arch/arm/mach-s5pc1xx/include/mach/cpu.h b/arch/arm/mach-s5pc1xx/include/mach/cpu.h index 78c905b866..4b1b711826 100644 --- a/arch/arm/mach-s5pc1xx/include/mach/cpu.h +++ b/arch/arm/mach-s5pc1xx/include/mach/cpu.h @@ -45,7 +45,6 @@ #define S5PC110_PHY_BASE 0xEC100000 #define S5PC110_USB_PHY_CONTROL 0xE010E80C - #ifndef __ASSEMBLY__ #include <asm/io.h> /* CPU detection macros */ diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c index 154ad2154a..0a2c84c9e1 100644 --- a/arch/arm/mach-socfpga/clock_manager_gen5.c +++ b/arch/arm/mach-socfpga/clock_manager_gen5.c @@ -125,7 +125,6 @@ int cm_basic_init(const struct cm_config * const cfg) readl(socfpga_get_clkmgr_addr() + CLKMGR_GEN5_PERPLL_VCO); readl(socfpga_get_clkmgr_addr() + CLKMGR_GEN5_SDRPLL_VCO); - /* * We made sure bgpwr down was assert for 5 us. Now deassert BG PWR DN * with numerator and denominator. diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c index 7c86350d5e..c8530c9804 100644 --- a/arch/arm/mach-socfpga/freeze_controller.c +++ b/arch/arm/mach-socfpga/freeze_controller.c @@ -3,7 +3,6 @@ * Copyright (C) 2013 Altera Corporation <www.altera.com> */ - #include <config.h> #include <asm/io.h> #include <asm/arch/clock_manager.h> diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h index 7f10296dc7..18921169a6 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h @@ -106,7 +106,6 @@ void cm_basic_init(const struct cm_config * const cfg); #define CLKMGR_INTER CLKMGR_S10_INTER #define CLKMGR_PERPLL_EN CLKMGR_S10_PERPLL_EN - #define CLKMGR_CTRL_SAFEMODE BIT(0) #define CLKMGR_BYPASS_MAINPLL_ALL 0x00000007 #define CLKMGR_BYPASS_PERPLL_ALL 0x0000007f diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-socfpga/misc_soc64.c index ad1ef0db18..a6cc78454d 100644 --- a/arch/arm/mach-socfpga/misc_soc64.c +++ b/arch/arm/mach-socfpga/misc_soc64.c @@ -39,7 +39,6 @@ static Altera_desc altera_fpga[] = { }, }; - /* * Print CPU information */ diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 9395122dae..6a202bf227 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -3,7 +3,6 @@ * Copyright (C) 2013 Altera Corporation <www.altera.com> */ - #include <mach/base_addr_ac5.h> #include <asm/io.h> #include <asm/arch/fpga_manager.h> diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index 967fa4e06c..04640e476e 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -187,7 +187,6 @@ U_BOOT_CMD(stm32prog, 5, 0, do_stm32prog, " <size> = size of flashlayout (optional for image with STM32 header)\n" ); - bool stm32prog_get_fsbl_nor(void) { if (stm32prog_data) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index ddf9414b08..17666814c5 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1078,7 +1078,7 @@ config SPL_STACK_R_ADDR config SPL_SPI_SUNXI bool "Support for SPI Flash on Allwinner SoCs in SPL" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV || SUNXI_GEN_NCAT2 + depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN8I_V3S || SUN50I_GEN_H6 || MACH_SUNIV || SUNXI_GEN_NCAT2 help Enable support for SPI Flash. This option allows SPL to read from sunxi SPI Flash. It uses the same method as the boot ROM, so does diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 0140b07d32..046e9fbfc6 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -333,7 +333,8 @@ uint32_t sunxi_get_spl_size(void) * The eGON SPL image can be located at 8KB or at 128KB into an SD card or * an eMMC device. The boot source has bit 4 set in the latter case. * By adding 120KB to the normal offset when booting from a "high" location - * we can support both cases. + * we can support both cases. The H616 has the alternative location + * moved up to 256 KB instead of 128KB, so cater for that, too. * Also U-Boot proper is located at least 32KB after the SPL, but will * immediately follow the SPL if that is bigger than that. */ @@ -349,6 +350,8 @@ unsigned long board_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, case SUNXI_BOOTED_FROM_MMC0_HIGH: case SUNXI_BOOTED_FROM_MMC2_HIGH: sector += (128 - 8) * 2; + if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) + sector += 128 * 2; break; } diff --git a/arch/arm/mach-sunxi/clock_sun8i_a83t.c b/arch/arm/mach-sunxi/clock_sun8i_a83t.c index 9eeba084f9..c00d16a918 100644 --- a/arch/arm/mach-sunxi/clock_sun8i_a83t.c +++ b/arch/arm/mach-sunxi/clock_sun8i_a83t.c @@ -118,7 +118,6 @@ void clock_set_pll5(unsigned int clk) udelay(5500); } - unsigned int clock_get_pll6(void) { struct sunxi_ccm_reg *const ccm = diff --git a/arch/arm/mach-sunxi/clock_sun9i.c b/arch/arm/mach-sunxi/clock_sun9i.c index 5913e40cb6..abdab40544 100644 --- a/arch/arm/mach-sunxi/clock_sun9i.c +++ b/arch/arm/mach-sunxi/clock_sun9i.c @@ -14,7 +14,6 @@ #include <asm/arch/prcm.h> #include <asm/arch/sys_proto.h> - #ifdef CONFIG_SPL_BUILD static void clock_set_pll2(unsigned int clk) @@ -166,7 +165,6 @@ void clock_set_pll6(unsigned int clk) sdelay(2000); } - int clock_twi_onoff(int port, int state) { struct sunxi_ccm_reg *const ccm = diff --git a/arch/arm/mach-sunxi/dram_sun8i_a83t.c b/arch/arm/mach-sunxi/dram_sun8i_a83t.c index ef833321e3..dd0fc37b76 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_a83t.c +++ b/arch/arm/mach-sunxi/dram_sun8i_a83t.c @@ -284,7 +284,6 @@ static int mctl_channel_init(struct dram_para *para) writel(0x0, MCTL_PROTECT); udelay(100); - /* Set ODT */ if (IS_ENABLED(CONFIG_DRAM_ODT_EN)) rval = 0x0; diff --git a/arch/arm/mach-sunxi/dram_sun9i.c b/arch/arm/mach-sunxi/dram_sun9i.c index 002b6df39d..58ecbb9835 100644 --- a/arch/arm/mach-sunxi/dram_sun9i.c +++ b/arch/arm/mach-sunxi/dram_sun9i.c @@ -262,7 +262,6 @@ static void mctl_sys_init(void) reg_val |= ((0x1<<24)|(0x1<<30)); mctl_write_w(CCM_PLL6_DDR_REG, reg_val); - while(mctl_read_w(CCM_PLL6_DDR_REG) & (0x1<<30)); } diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index e064ef329e..4ed295909c 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -650,7 +650,6 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) return 0; } - static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank) { /* detect row address bits */ diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c index 87df312725..8e19324c8a 100644 --- a/arch/arm/mach-sunxi/pmic_bus.c +++ b/arch/arm/mach-sunxi/pmic_bus.c @@ -19,6 +19,7 @@ #define AXP152_I2C_ADDR 0x30 #define AXP209_I2C_ADDR 0x34 +#define AXP717_I2C_ADDR 0x34 #define AXP305_I2C_ADDR 0x36 #define AXP313_I2C_ADDR 0x36 @@ -36,6 +37,8 @@ static int pmic_i2c_address(void) return AXP305_I2C_ADDR; if (IS_ENABLED(CONFIG_AXP313_POWER)) return AXP313_I2C_ADDR; + if (IS_ENABLED(CONFIG_AXP717_POWER)) + return AXP717_I2C_ADDR; /* Other AXP2xx and AXP8xx variants */ return AXP209_I2C_ADDR; diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 7acb44f52a..d7abdc2e40 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -140,7 +140,8 @@ static bool is_sun6i_gen_spi(void) { return IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || IS_ENABLED(CONFIG_SUN50I_GEN_H6) || - IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2); + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2) || + IS_ENABLED(CONFIG_MACH_SUN8I_V3S); } static uintptr_t spi0_base_address(void) diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/include/asm/bitops.h index 4a3f6b97ad..c5c84c6169 100644 --- a/arch/m68k/include/asm/bitops.h +++ b/arch/m68k/include/asm/bitops.h @@ -19,7 +19,6 @@ extern int test_and_change_bit(int nr, volatile void *addr); #ifdef __KERNEL__ - static inline int test_bit(int nr, __const__ volatile void *addr) { __const__ unsigned int *p = (__const__ unsigned int *) addr; diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h index aa8d2edb40..712b02cd89 100644 --- a/arch/m68k/include/asm/cache.h +++ b/arch/m68k/include/asm/cache.h @@ -136,7 +136,6 @@ #define CF_ACR_SP (1 << 3) #endif /* CONFIG_CF_V4 */ - #ifndef CFG_SYS_CACHE_ICACR #define CFG_SYS_CACHE_ICACR 0 #endif diff --git a/arch/m68k/include/asm/immap_5271.h b/arch/m68k/include/asm/immap_5271.h index a5bf18c4b8..5b7db9e027 100644 --- a/arch/m68k/include/asm/immap_5271.h +++ b/arch/m68k/include/asm/immap_5271.h @@ -54,5 +54,4 @@ #include <asm/coldfire/rng.h> #include <asm/coldfire/skha.h> - #endif /* __IMMAP_5271__ */ diff --git a/arch/m68k/include/asm/immap_5275.h b/arch/m68k/include/asm/immap_5275.h index c4cce3f94f..e90c870c91 100644 --- a/arch/m68k/include/asm/immap_5275.h +++ b/arch/m68k/include/asm/immap_5275.h @@ -223,7 +223,6 @@ typedef struct gpio_ctrl { u8 par_res2[3]; } gpio_t; - /* Watchdog registers */ typedef struct wdog_ctrl { diff --git a/arch/m68k/include/asm/m5441x.h b/arch/m68k/include/asm/m5441x.h index f2e7e7fff4..2c9f13030f 100644 --- a/arch/m68k/include/asm/m5441x.h +++ b/arch/m68k/include/asm/m5441x.h @@ -700,7 +700,6 @@ #define GPIO_PAR_FEC_FEC_MII (0x01) /* MDC & MDIO - GPIO */ #define GPIO_PAR_FEC_FEC_MIIFUL (0x00) - /* TC: Need to edit here.... */ /* Mode Select Control */ diff --git a/arch/m68k/lib/traps.c b/arch/m68k/lib/traps.c index e09f36f2fd..dafd8a9a63 100644 --- a/arch/m68k/lib/traps.c +++ b/arch/m68k/lib/traps.c @@ -15,7 +15,6 @@ #include <asm/processor.h> #include <asm/ptrace.h> - extern void _exc_handler(void); extern void _int_handler(void); diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h index 2cab2ac62b..9ea217cd85 100644 --- a/arch/microblaze/include/asm/bitops.h +++ b/arch/microblaze/include/asm/bitops.h @@ -32,7 +32,6 @@ static inline unsigned long ffz(unsigned long word) return result; } - static inline void set_bit(int nr, volatile void *addr) { int * a = (int *) addr; @@ -257,7 +256,6 @@ found_middle: #define hweight16(x) generic_hweight16(x) #define hweight8(x) generic_hweight8(x) - static inline int ext2_set_bit(int nr, volatile void *addr) { int mask, retval; diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h index ccc6235c8d..f4795f8d31 100644 --- a/arch/microblaze/include/asm/posix_types.h +++ b/arch/microblaze/include/asm/posix_types.h @@ -47,7 +47,6 @@ typedef unsigned int __kernel_gid32_t; typedef unsigned short __kernel_old_uid_t; typedef unsigned short __kernel_old_gid_t; - typedef struct { #if defined(__KERNEL__) || defined(__USE_ALL) int val[2]; @@ -56,7 +55,6 @@ typedef struct { #endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ } __kernel_fsid_t; - #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) #undef __FD_SET diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h index b796d4faf6..ff861d10bb 100644 --- a/arch/microblaze/include/asm/ptrace.h +++ b/arch/microblaze/include/asm/ptrace.h @@ -16,7 +16,6 @@ #ifndef __MICROBLAZE_PTRACE_H__ #define __MICROBLAZE_PTRACE_H__ - /* Microblaze general purpose registers with special meanings. */ #define GPR_ZERO 0 /* constant zero */ #define GPR_ASM 18 /* reserved for assembler */ @@ -54,7 +53,6 @@ #define SR_DIR 21 #define SR_ASID 23 - #ifndef __ASSEMBLY__ typedef unsigned long microblaze_reg_t; @@ -74,7 +72,6 @@ struct pt_regs microblaze_reg_t single_step; /* 1 if in single step mode */ }; - #define instruction_pointer(regs) ((regs)->pc) #define user_mode(regs) (!(regs)->kernel_mode) @@ -87,7 +84,6 @@ struct pt_regs #endif /* !__ASSEMBLY__ */ - /* The number of bytes used to store each register. */ #define _PT_REG_SIZE 4 diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h index 050a8b4076..4e31206436 100644 --- a/arch/microblaze/include/asm/system.h +++ b/arch/microblaze/include/asm/system.h @@ -40,7 +40,6 @@ extern void *switch_thread (struct thread_struct *last, } \ } while (0) - /* Enable/disable interrupts. */ #define __sti() \ { \ diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 3774acaadc..4acc439ccf 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -485,7 +485,6 @@ BUILDSTRING(q, u64) #define outsq outsq #endif - #ifdef CONFIG_CPU_CAVIUM_OCTEON #define mmiowb() wmb() #else diff --git a/arch/mips/include/asm/isa-rev.h b/arch/mips/include/asm/isa-rev.h index 683ea3454d..8afa6aefc5 100644 --- a/arch/mips/include/asm/isa-rev.h +++ b/arch/mips/include/asm/isa-rev.h @@ -20,5 +20,4 @@ #define MIPS_ISA_REV 0 #endif - #endif /* __MIPS_ASM_ISA_REV_H__ */ diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 3db3965fcf..d02b1e50bd 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -125,7 +125,6 @@ */ #define CP0_TX39_CACHE $7 - /* Generic EntryLo bit definitions */ #define ENTRYLO_G (_ULCAST_(1) << 0) #define ENTRYLO_V (_ULCAST_(1) << 1) @@ -987,7 +986,6 @@ #define CP1_FENR $28 #define CP1_STATUS $31 - /* * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register. */ @@ -1102,7 +1100,6 @@ #define FPU_CSR_RU 0x2 /* towards +Infinity */ #define FPU_CSR_RD 0x3 /* towards -Infinity */ - #ifndef __ASSEMBLY__ /* @@ -1261,7 +1258,6 @@ static inline void tlbinvf(void) ".set pop"); } - /* * Functions to access the R10000 performance counters. These are basically * mfc0 and mtc0 instructions from and to coprocessor register with a 5-bit @@ -1307,7 +1303,6 @@ do { \ : "r" (val), "i" (counter)); \ } while (0) - /* * Macros to access the system control coprocessor */ @@ -2403,7 +2398,6 @@ do { \ mfhi3; \ }) - #define mtlo0(x) \ ({ \ __asm__( \ diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h index 481d2ef6c2..2dacdbbcdb 100644 --- a/arch/mips/include/asm/pgtable-bits.h +++ b/arch/mips/include/asm/pgtable-bits.h @@ -7,7 +7,6 @@ #ifndef _ASM_PGTABLE_BITS_H #define _ASM_PGTABLE_BITS_H - /* * Note that we shift the lower 32bits of each EntryLo[01] entry * 6 bits to the left. That way we can convert the PFN into the @@ -189,7 +188,6 @@ * 32-bit, R2 or later: CCC D V G RI/R XI M A W P */ - #ifndef __ASSEMBLY__ /* * pte_to_entrylo converts a page table entry (PTE) into a Mips diff --git a/arch/mips/mach-ath79/qca953x/clk.c b/arch/mips/mach-ath79/qca953x/clk.c index 379085f1ff..e9a80c6f12 100644 --- a/arch/mips/mach-ath79/qca953x/clk.c +++ b/arch/mips/mach-ath79/qca953x/clk.c @@ -61,7 +61,6 @@ int get_clocks(void) & QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK) + 1; gd->cpu_clk = pll / div; - val = readl(regs + QCA953X_PLL_DDR_CONFIG_REG); /* VCOOUT = XTAL * DIV_INT */ div = (val >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) diff --git a/arch/mips/mach-octeon/include/mangle-port.h b/arch/mips/mach-octeon/include/mangle-port.h index 7e95dcef5a..554bdc55cf 100644 --- a/arch/mips/mach-octeon/include/mangle-port.h +++ b/arch/mips/mach-octeon/include/mangle-port.h @@ -43,7 +43,6 @@ static inline bool __should_swizzle_addr(u64 p) #endif /* __BIG_ENDIAN */ - # define ioswabb(a, x) (x) # define __mem_ioswabb(a, x) (x) # define ioswabw(a, x) (__should_swizzle_bits(a) ? le16_to_cpu(x) : x) diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c index 27093c4faa..c98d40a49b 100644 --- a/arch/nios2/cpu/interrupts.c +++ b/arch/nios2/cpu/interrupts.c @@ -98,7 +98,6 @@ void irq_install_handler(int irq, interrupt_handler_t *hdlr, void *arg) if (flag) enable_interrupts(); } - int interrupt_init(void) { int i; @@ -114,7 +113,6 @@ int interrupt_init(void) return (0); } - /*************************************************************************/ #if defined(CONFIG_CMD_IRQ) int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/arch/nios2/include/asm/bitops/atomic.h b/arch/nios2/include/asm/bitops/atomic.h index c8946465e6..0130fd47d3 100644 --- a/arch/nios2/include/asm/bitops/atomic.h +++ b/arch/nios2/include/asm/bitops/atomic.h @@ -31,7 +31,6 @@ extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned; local_irq_restore(f); \ } while(0) - #else # define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0) # define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0) diff --git a/arch/nios2/include/asm/ptrace.h b/arch/nios2/include/asm/ptrace.h index 317d8ae09b..b1feb33888 100644 --- a/arch/nios2/include/asm/ptrace.h +++ b/arch/nios2/include/asm/ptrace.h @@ -12,5 +12,4 @@ struct pt_regs { unsigned status; }; - #endif /* __ASM_NIOS2_PTRACE_H_ */ diff --git a/arch/nios2/lib/libgcc.c b/arch/nios2/lib/libgcc.c index a45b3e82ef..30b846179c 100644 --- a/arch/nios2/lib/libgcc.c +++ b/arch/nios2/lib/libgcc.c @@ -16,7 +16,6 @@ typedef unsigned long long DSItype; #include "longlong.h" - typedef int word_type; typedef long Wtype; typedef long long DWtype; @@ -46,7 +45,6 @@ const UQItype __clz_tab[256] = 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8 }; - DWtype __ashldi3 (DWtype u, word_type b) { @@ -388,7 +386,6 @@ __negdi2 (DWtype u) return w.ll; } - DWtype __muldi3 (DWtype u, DWtype v) { @@ -440,7 +437,6 @@ __ucmpdi2 (DWtype a, DWtype b) return 1; } - UDWtype __udivdi3 (UDWtype n, UDWtype d) { @@ -507,14 +503,12 @@ __divsi3 (SItype a, SItype b) return res; } - SItype __udivsi3 (SItype a, SItype b) { return udivmodsi4 (a, b, 0); } - SItype __modsi3 (SItype a, SItype b) { diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c index d86c981811..af517213f1 100644 --- a/arch/powerpc/cpu/mpc83xx/interrupts.c +++ b/arch/powerpc/cpu/mpc83xx/interrupts.c @@ -32,7 +32,6 @@ void interrupt_init_cpu (unsigned *decrementer_count) immr->sysconf.spcr |= 0x00400000; } - /* * Handle external interrupts */ @@ -41,7 +40,6 @@ void external_interrupt(struct pt_regs *regs) { } - /* * Install and free an interrupt handler. */ @@ -51,19 +49,16 @@ irq_install_handler(int irq, interrupt_handler_t * handler, void *arg) { } - void irq_free_handler(int irq) { } - void timer_interrupt_cpu (struct pt_regs *regs) { /* nothing to do here */ return; } - #if defined(CONFIG_CMD_IRQ) /* ripped this out of ppc4xx/interrupts.c */ diff --git a/arch/powerpc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c index 79ea1a9bb3..d50499ceb7 100644 --- a/arch/powerpc/cpu/mpc83xx/traps.c +++ b/arch/powerpc/cpu/mpc83xx/traps.c @@ -74,7 +74,6 @@ void show_regs(struct pt_regs *regs) } } - static void _exception(int signr, struct pt_regs *regs) { show_regs(regs); @@ -191,7 +190,6 @@ void SoftEmuException(struct pt_regs *regs) panic("Software Emulation Exception"); } - void UnknownException(struct pt_regs *regs) { #if defined(CONFIG_CMD_KGDB) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index e813bf094d..fd0ef3633b 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -173,6 +173,16 @@ config TARGET_P2020RDB imply CMD_SATA imply SATA_SIL +config TARGET_TURRIS_1X + bool "Support Turris 1.x" + select SUPPORT_SPL + select ARCH_P2020 + select BOARD_EARLY_INIT_F + select BOARD_EARLY_INIT_R + select LAST_STAGE_INIT + select OF_BOARD_SETUP + select SYS_L2_SIZE_512KB + config TARGET_P2041RDB bool "Support P2041RDB" select ARCH_P2041 @@ -1530,6 +1540,7 @@ config TPL_SYS_MPC85XX_NO_RESETVEC config FSL_VIA bool +source "board/CZ.NIC/turris_1x/Kconfig" source "board/emulation/qemu-ppce500/Kconfig" source "board/freescale/mpc8548cds/Kconfig" source "board/freescale/p1010rdb/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index ebce2fe393..ab4ef15472 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -297,7 +297,6 @@ int checkcpu (void) return 0; } - /* ------------------------------------------------------------------------- */ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) @@ -337,7 +336,6 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 1; } - /* * Get timebase clock frequency */ @@ -348,7 +346,6 @@ __weak unsigned long get_tbclk(void) return (gd->bus_clk + (tbclk_div >> 1)) / tbclk_div; } - /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index b770d294e6..a7b805bc67 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -128,7 +128,6 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) } #endif - #if defined(CONFIG_QE) && !defined(CONFIG_U_QE) extern qe_iop_conf_t qe_iop_conf_tab[]; extern void qe_config_iopin(u8 port, u8 pin, int dir, diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index c56e98d4b4..b2c0c517e7 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -428,7 +428,6 @@ static inline void ft_fixup_cache(void *blob) ft_fixup_l2cache(blob); } - void fdt_add_enet_stashing(void *fdt) { do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1); diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 78316ea5ff..f2f854ebc1 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -482,7 +482,6 @@ static void wait_for_rstdone(unsigned int bank) printf("SERDES: timeout resetting bank %u\n", bank + 1); } - static void __soc_serdes_init(void) { /* Allow for SoC-specific initialization in <SOC>_serdes.c */ diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index b638f24ed1..03f801ebbb 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -191,7 +191,6 @@ u32 determine_mp_bootpg(unsigned int *pagesize) struct law_entry e; #endif - /* use last 4K of mapped memory */ bootpg = ((gd->ram_size > CFG_MAX_MEM_MAPPED) ? CFG_MAX_MEM_MAPPED : gd->ram_size) + diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c index d38041ef5c..c1190667ce 100644 --- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c @@ -29,7 +29,6 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { [0x03] = {PCIE1, PCIE2}, }; - int is_serdes_configured(enum srds_prtcl device) { int ret; diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index a7e1b3c98a..d17a19026d 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -625,7 +625,6 @@ int get_clocks(void) else return (1); } - /******************************************** * get_bus_freq * return system bus freq in Hz diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index b737d5d12f..3e24a90233 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -116,7 +116,7 @@ bootsect: .long (CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_START + CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA) * 512 .org 0x58 /* Target address in the system's local memory address space */ - .long CONFIG_SYS_MONITOR_BASE + .long CONFIG_VAL(SYS_MONITOR_BASE) .org 0x60 /* Execution starting address */ .long _start diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c index 0d958fe131..ff76bed1af 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c @@ -7,7 +7,6 @@ #include <asm/processor.h> #include <asm/io.h> - static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { [0x40] = {PCIE1, PCIE1, PCIE1, PCIE1}, [0xD5] = {QSGMII_FM1_A, PCIE3, PCIE2, PCIE1}, diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c index 2033ebbaa5..fb59a3e413 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c @@ -9,7 +9,6 @@ #include <asm/io.h> #include <asm/ppc.h> - static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { [0x00] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}, diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index e0b36f869a..32b68a169a 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -354,5 +354,4 @@ void clear_ddr_tlbs(unsigned int memsize_in_meg) clear_ddr_tlbs_phys(CFG_SYS_DDR_SDRAM_BASE, memsize_in_meg); } - #endif /* not SPL */ diff --git a/arch/powerpc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c index db70f07500..a1c111ec17 100644 --- a/arch/powerpc/cpu/mpc85xx/traps.c +++ b/arch/powerpc/cpu/mpc85xx/traps.c @@ -111,7 +111,6 @@ void show_regs(struct pt_regs *regs) } } - static void _exception(int signr, struct pt_regs *regs) { show_regs(regs); diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c index 8c85fc180b..09aaebc5c4 100644 --- a/arch/powerpc/cpu/mpc8xx/immap.c +++ b/arch/powerpc/cpu/mpc8xx/immap.c @@ -206,7 +206,6 @@ static int do_iopset(struct cmd_tbl *cmdtp, int flag, int argc, if (pin > 31) rcode = 1; - switch (argv[3][0]) { case 'd': if (argv[3][1] == 'a') diff --git a/arch/powerpc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c index 5220c560e5..22f2f5878e 100644 --- a/arch/powerpc/cpu/mpc8xx/traps.c +++ b/arch/powerpc/cpu/mpc8xx/traps.c @@ -75,7 +75,6 @@ void show_regs(struct pt_regs *regs) } } - static void _exception(int signr, struct pt_regs *regs) { show_regs(regs); @@ -142,7 +141,6 @@ void SoftEmuException(struct pt_regs *regs) panic("Software Emulation Exception"); } - void UnknownException(struct pt_regs *regs) { printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 82f28749eb..d64eb7328f 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -300,7 +300,6 @@ __weak int cpu_numcores(void) return cpu->num_cores; } - /* * Check if the given core ID is valid * diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c index 843dd191cc..9b7a07958e 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c @@ -20,7 +20,6 @@ static void __lbc_sdram_init(void) void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init"))); #endif - void print_lbc_regs(void) { int i; diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 29399bcd8b..3a82e60a24 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -26,7 +26,6 @@ static inline int __ilog2_roundup_64(uint64_t val) return __ilog2_u64(val) + 1; } - static inline int count_lsb_zeroes(unsigned long val) { return ffs(val) - 1; @@ -332,7 +331,6 @@ void pamu_disable(void) u32 i = 0; u32 base_addr = CFG_SYS_PAMU_ADDR; - for (i = 0; i < CFG_NUM_PAMU; i++) { clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE); sync(); @@ -340,7 +338,6 @@ void pamu_disable(void) } } - static uint64_t find_max(uint64_t arr[], int num) { int i = 0; diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index f16bc19966..b4695cc99c 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -31,7 +31,6 @@ DECLARE_GLOBAL_DATA_PTR; #define LAWBAR_SHIFT 12 #endif - static inline phys_addr_t get_law_base_addr(int idx) { #ifdef CONFIG_FSL_CORENET @@ -130,7 +129,7 @@ int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id) return idx; } -struct law_entry find_law(phys_addr_t addr) +struct law_entry find_law_by_addr_id(phys_addr_t addr, enum law_trgt_if id) { struct law_entry entry; int i; @@ -146,6 +145,9 @@ struct law_entry find_law(phys_addr_t addr) if (!get_law_entry(i, &entry)) continue; + if (id != -1 && id != entry.trgt_id) + continue; + upper = entry.addr + (2ull << entry.size); if ((addr >= entry.addr) && (addr < upper)) { entry.index = i; diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index bb436f02bc..321c644804 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -26,6 +26,7 @@ dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb dtb-$(CONFIG_TARGET_T4240RDB) += t4240rdb.dtb dtb-$(CONFIG_TARGET_TUGE1) += kmtuge1.dtb +dtb-$(CONFIG_TARGET_TURRIS_1X) += turris1x.dtb dtb-$(CONFIG_TARGET_TUXX1) += kmtuxa1.dtb dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb diff --git a/arch/powerpc/dts/turris1x-u-boot.dtsi b/arch/powerpc/dts/turris1x-u-boot.dtsi new file mode 100644 index 0000000000..355d14c954 --- /dev/null +++ b/arch/powerpc/dts/turris1x-u-boot.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ + +&soc { + i2c@3000 { + bootph-all; + + crypto@64 { + bootph-all; + }; + }; +}; + +&serial0 { + bootph-all; +}; + +#include "u-boot.dtsi" diff --git a/arch/powerpc/dts/turris1x.dts b/arch/powerpc/dts/turris1x.dts new file mode 100644 index 0000000000..fade02c3c8 --- /dev/null +++ b/arch/powerpc/dts/turris1x.dts @@ -0,0 +1,511 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Turris 1.x Device Tree Source + * + * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/) + * + * Pinout, Schematics and Altium hardware design files are open source + * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/ + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/leds/common.h> +/include/ "fsl/p2020si-pre.dtsi" + +/ { + model = "Turris 1.x"; + + /* fsl,P2020RDB-PC is required for booting Linux */ + compatible = "cznic,turris1x", "fsl,P2020RDB-PC"; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + spi0 = &spi0; + }; + + memory { + device_type = "memory"; + }; + + soc: soc@ffe00000 { + ranges = <0x0 0x0 0xffe00000 0x00100000>; + + i2c@3000 { + /* PCA9557PW GPIO controller for boot config */ + gpio-controller@18 { + compatible = "nxp,pca9557"; + label = "bootcfg"; + reg = <0x18>; + #gpio-cells = <2>; + gpio-controller; + polarity = <0x00>; + }; + + /* STM32F030R8T6 MCU for power control */ + power-control@2a { + /* + * Turris Power Control firmware runs on STM32F0 MCU. + * This firmware is open source and available at: + * https://gitlab.nic.cz/turris/hw/turris_power_control + */ + reg = <0x2a>; + }; + + /* DDR3 SPD/EEPROM PSWP instruction */ + eeprom@32 { + reg = <0x32>; + }; + + /* SA56004ED temperature control */ + temperature-sensor@4c { + compatible = "nxp,sa56004"; + reg = <0x4c>; + interrupt-parent = <&gpio>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>, /* GPIO12 - ALERT pin */ + <13 IRQ_TYPE_LEVEL_LOW>; /* GPIO13 - CRIT pin */ + }; + + /* DDR3 SPD/EEPROM */ + eeprom@52 { + compatible = "atmel,spd"; + reg = <0x52>; + }; + + /* MCP79402-I/ST Protected EEPROM */ + eeprom@57 { + reg = <0x57>; + }; + + /* ATSHA204-TH-DA-T crypto module */ + crypto@64 { + compatible = "atmel,atsha204"; + reg = <0x64>; + }; + + /* IDT6V49205BNLGI clock generator */ + clock-generator@69 { + compatible = "idt,6v49205b"; + reg = <0x69>; + }; + + /* MCP79402-I/ST RTC */ + rtc@6f { + compatible = "microchip,mcp7940x"; + reg = <0x6f>; + interrupt-parent = <&gpio>; + interrupts = <14 0>; /* GPIO14 - MFP pin */ + }; + }; + + /* SPI on connector P1 */ + spi0: spi@7000 { + }; + + gpio: gpio-controller@fc00 { + #interrupt-cells = <2>; + interrupt-controller; + }; + + /* Connected to SMSC USB2412-DZK 2-Port USB 2.0 Hub Controller */ + usb@22000 { + phy_type = "ulpi"; + dr_mode = "host"; + }; + + enet0: ethernet@24000 { + /* Connected to port 6 of QCA8337N-AL3C switch */ + phy-connection-type = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + mdio@24520 { + /* KSZ9031RNXCA ethernet phy for WAN port */ + phy: ethernet-phy@7 { + interrupts = <3 1 0 0>; + reg = <0x7>; + }; + + /* QCA8337N-AL3C switch with integrated ethernet PHYs for LAN ports */ + switch@10 { + compatible = "qca,qca8337"; + interrupts = <2 1 0 0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&enet1>; + phy-mode = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan5"; + }; + + port@2 { + reg = <2>; + label = "lan4"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + + port@4 { + reg = <4>; + label = "lan2"; + }; + + port@5 { + reg = <5>; + label = "lan1"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&enet0>; + phy-mode = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; + + ptp_clock@24e00 { + fsl,tclk-period = <5>; + fsl,tmr-prsc = <200>; + fsl,tmr-add = <0xcccccccd>; + fsl,tmr-fiper1 = <0x3b9ac9fb>; + fsl,tmr-fiper2 = <0x0001869b>; + fsl,max-adj = <249999999>; + }; + + enet1: ethernet@25000 { + /* Connected to port 0 of QCA8337N-AL3C switch */ + phy-connection-type = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + mdio@25520 { + status = "disabled"; + }; + + enet2: ethernet@26000 { + /* Connected to KSZ9031RNXCA ethernet phy (WAN port) */ + label = "wan"; + phy-handle = <&phy>; + phy-connection-type = "rgmii-id"; + }; + + mdio@26520 { + status = "disabled"; + }; + + sdhc@2e000 { + bus-width = <4>; + cd-gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + }; + + lbc: localbus@ffe05000 { + reg = <0 0xffe05000 0 0x1000>; + + ranges = <0x0 0x0 0x0 0xef000000 0x01000000>, /* NOR */ + <0x1 0x0 0x0 0xff800000 0x00040000>, /* NAND */ + <0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */ + + /* S29GL128P90TFIR10 NOR */ + nor@0,0 { + compatible = "cfi-flash"; + reg = <0x0 0x0 0x01000000>; + bank-width = <2>; + device-width = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + /* 128 kB for Device Tree Blob */ + reg = <0x00000000 0x00020000>; + label = "dtb"; + }; + + partition@20000 { + /* 1.7 MB for Linux Kernel Image */ + reg = <0x00020000 0x001a0000>; + label = "kernel"; + }; + + partition@1c0000 { + /* 1.5 MB for Rescue JFFS2 Root File System */ + reg = <0x001c0000 0x00180000>; + label = "rescue"; + }; + + partition@340000 { + /* 11 MB for TAR.XZ Archive with Factory content of NAND + * Root File System + */ + reg = <0x00340000 0x00b00000>; + label = "factory"; + }; + + partition@e40000 { + /* 768 kB for Certificates JFFS2 File System */ + reg = <0x00e40000 0x000c0000>; + label = "certificates"; + }; + + /* free unused space 0x00f00000-0x00f20000 */ + + partition@f20000 { + /* 128 kB for U-Boot Environment Variables */ + reg = <0x00f20000 0x00020000>; + label = "u-boot-env"; + }; + + partition@f40000 { + /* 768 kB for U-Boot Bootloader Image */ + reg = <0x00f40000 0x000c0000>; + label = "u-boot"; + }; + }; + }; + + /* MT29F2G08ABAEAWP:E NAND */ + nand@1,0 { + compatible = "fsl,p2020-fcm-nand", "fsl,elbc-fcm-nand"; + reg = <0x1 0x0 0x00040000>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "bch"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + /* 256 MB for UBI with one volume: UBIFS Root File System */ + reg = <0x00000000 0x10000000>; + label = "rootfs"; + }; + }; + }; + + /* LCMXO1200C-3FTN256C FPGA */ + cpld@3,0 { + /* + * Turris CPLD firmware which runs on this Lattice FPGA, + * is extended version of P1021RDB-PC CPLD v4.1 firmware. + * It is backward compatible with its original version + * and the only extension is support for Turris LEDs. + * Turris CPLD firmware is open source and available at: + * https://gitlab.nic.cz/turris/hw/turris_cpld/-/blob/master/CZ_NIC_Router_CPLD.v + */ + compatible = "cznic,turris1x-cpld", "fsl,p1021rdb-pc-cpld", "simple-bus", + "syscon"; + reg = <0x3 0x0 0x30>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x3 0x0 0x00020000>; + + /* MAX6370KA+T watchdog */ + watchdog@2 { + /* + * CPLD firmware maps SET0, SET1 and SET2 + * input logic of MAX6370KA+T chip to CPLD + * memory space at byte offset 0x2. WDI + * input logic is outside of the CPLD and + * connected via external GPIO. + */ + compatible = "maxim,max6370"; + reg = <0x02 0x01>; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + + reboot@d { + /* + * CPLD firmware which manages system reset and + * watchdog registers has bugs. It does not + * autoclear system reset register after change + * and watchdog ignores reset line on immediate + * succeeding reset cycle triggered by watchdog. + * These bugs have to be workarounded in U-Boot + * bootloader. So use system reset via syscon as + * a last resort because older U-Boot versions + * do not have workaround for watchdog. + * + * Reset method via rstcr's global-utilities + * (the preferred one) has priority level 128, + * watchdog has priority level 0 and default + * syscon-reboot priority level is 192. + * + * So define syscon-reboot with custom priority + * level 64 (between rstcr and watchdog) because + * rstcr should stay as default preferred reset + * method and reset via watchdog is more broken + * than system reset via syscon. + */ + compatible = "syscon-reboot"; + reg = <0x0d 0x01>; + offset = <0x0d>; + mask = <0x01>; + value = <0x01>; + priority = <64>; + }; + + led-controller@13 { + /* + * LEDs are controlled by CPLD firmware. + * All five LAN LEDs share common RGB settings + * and so it is not possible to set different + * colors on different LAN ports. + */ + compatible = "cznic,turris1x-leds"; + reg = <0x13 0x1d>; + #address-cells = <1>; + #size-cells = <0>; + + multi-led@0 { + reg = <0x0>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_WAN; + }; + + multi-led@1 { + reg = <0x1>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_LAN; + function-enumerator = <5>; + }; + + multi-led@2 { + reg = <0x2>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + }; + + multi-led@3 { + reg = <0x3>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + }; + + multi-led@4 { + reg = <0x4>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + }; + + multi-led@5 { + reg = <0x5>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + }; + + multi-led@6 { + reg = <0x6>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_WLAN; + }; + + multi-led@7 { + reg = <0x7>; + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_POWER; + }; + }; + }; + }; + + pci2: pcie@ffe08000 { + /* + * PCIe bus for on-board TUSB7340RKM USB 3.0 xHCI controller. + * This xHCI controller is available only on Turris 1.1 boards. + * Turris 1.0 boards have nothing connected to this PCIe bus, + * so system would see only PCIe Root Port of this PCIe Root + * Complex. TUSB7340RKM xHCI controller has four SuperSpeed + * channels. Channel 0 is connected to the front USB 3.0 port, + * channel 1 (but only USB 2.0 subset) to USB 2.0 pins on mPCIe + * slot 1 (CN5), channels 2 and 3 to connector P600. + * + * P2020 PCIe Root Port uses 1MB of PCIe MEM and xHCI controller + * uses 64kB + 8kB of PCIe MEM. No PCIe IO is used or required. + * So allocate 2MB of PCIe MEM for this PCIe bus. + */ + reg = <0 0xffe08000 0 0x1000>; + ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00200000>, /* MEM */ + <0x01000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; /* IO */ + + pcie@0 { + ranges; + }; + }; + + pci1: pcie@ffe09000 { + /* PCIe bus on mPCIe slot 2 (CN6) for expansion mPCIe card */ + reg = <0 0xffe09000 0 0x1000>; + ranges = <0x02000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>, /* MEM */ + <0x01000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; /* IO */ + + pcie@0 { + ranges; + }; + }; + + pci0: pcie@ffe0a000 { + /* + * PCIe bus on mPCIe slot 1 (CN5) for expansion mPCIe card. + * Turris 1.1 boards have in this mPCIe slot additional USB 2.0 + * pins via channel 1 of TUSB7340RKM xHCI controller and also + * additional SIM card slot, both for USB-based WWAN cards. + */ + reg = <0 0xffe0a000 0 0x1000>; + ranges = <0x02000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>, /* MEM */ + <0x01000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; /* IO */ + + pcie@0 { + ranges; + }; + }; +}; + +/include/ "fsl/p2020si-post.dtsi" diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h index 96491b6e4e..b22eebaa0a 100644 --- a/arch/powerpc/include/asm/bitops.h +++ b/arch/powerpc/include/asm/bitops.h @@ -270,7 +270,6 @@ found_middle: return result + ffz(tmp); } - #define _EXT2_HAVE_ASM_BITOPS_ #ifdef __KERNEL__ diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index f0702cab14..f61f4e1ea6 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -39,7 +39,7 @@ /* The FMAN driver uses the PHYLIB infrastructure */ -#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_CLK_MPC83XX) +#if CONFIG_IS_ENABLED(DM_SERIAL) && !defined(CONFIG_CLK_MPC83XX) /* * TODO: Convert this to a clock driver exists that can give us the UART * clock here. diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index d990ecff96..819250f009 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -82,7 +82,6 @@ #define CFG_SYS_FM_MURAM_SIZE 0x28000 #define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 - #elif defined(CONFIG_ARCH_T4240) #ifdef CONFIG_ARCH_T4240 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4 } @@ -168,7 +167,6 @@ #define CFG_SYS_FM_MURAM_SIZE 0x28000 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE - #elif defined(CONFIG_ARCH_C29X) #define CFG_SYS_FSL_SEC_IDX_OFFSET 0x20000 diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index 9e2f2d5370..d1cd728397 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -130,7 +130,13 @@ extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if extern int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id); extern int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id); extern int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id); -extern struct law_entry find_law(phys_addr_t addr); +extern struct law_entry find_law_by_addr_id(phys_addr_t addr, enum law_trgt_if id); + +static inline struct law_entry find_law(phys_addr_t addr) +{ + return find_law_by_addr_id(addr, -1); +} + extern void disable_law(u8 idx); extern void init_laws(void); extern void print_laws(void); diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h index 809ab1d418..6c6e436b6e 100644 --- a/arch/powerpc/include/asm/fsl_pci.h +++ b/arch/powerpc/include/asm/fsl_pci.h @@ -269,5 +269,4 @@ int fsl_pcie_init_board(int busno); #error FT_FSL_PCI_SETUP not defined #endif - #endif diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index 2412bb9d7c..9a59ed8c5a 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h @@ -92,7 +92,6 @@ extern void _outsl_ns(volatile u32 *port, const void *buf, int nl); #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) - #define IO_SPACE_LIMIT ~0 #define memset_io(a,b,c) memset((void __force *)(a),(b),(c)) diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index b0aafdcdae..bc7716b707 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -126,7 +126,6 @@ typedef struct _pte { #define PT_MASK 0x02FF #define PG_SHIFT (12) /* Page Entry */ - /* MMU context */ typedef struct _MMU_context { @@ -304,7 +303,6 @@ extern void print_bats(void); #define M_CASID 793 /* Address space ID (context) to match */ #define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */ - /* These are the Ks and Kp from the PowerPC books. For proper operation, * Ks = 0, Kp = 1. */ @@ -349,7 +347,6 @@ extern void print_bats(void); #define MD_SVALID 0x00000001 /* Segment entry is valid */ /* Reset value is undefined */ - /* Real page number. Defined by the pte. Writing this register * causes a TLB entry to be created for the data TLB, using * additional information from the MD_EPN, and MD_TWC registers. diff --git a/arch/powerpc/include/asm/mpc8349_pci.h b/arch/powerpc/include/asm/mpc8349_pci.h index 7a1adba950..3d920c25ad 100644 --- a/arch/powerpc/include/asm/mpc8349_pci.h +++ b/arch/powerpc/include/asm/mpc8349_pci.h @@ -1,7 +1,6 @@ #ifndef _PPC_KERNEL_MPC8349_PCI_H #define _PPC_KERNEL_MPC8349_PCI_H - #define M8265_PCIBR0 0x101ac #define M8265_PCIBR1 0x101b0 #define M8265_PCIMSK0 0x101c4 @@ -30,10 +29,8 @@ #define PCIMSK_512MB 0xE0000000 #define PCIMSK_1GB 0xC0000000 /* Size of window, largest */ - #define M826X_SCCR_PCI_MODE_EN 0x100 - /* * Outbound ATU registers (3 sets). These registers control how 60x bus * (local) addresses are translated to PCI addresses when the MPC826x is diff --git a/arch/powerpc/include/asm/sigcontext.h b/arch/powerpc/include/asm/sigcontext.h index 715c868ab6..5dee3ba415 100644 --- a/arch/powerpc/include/asm/sigcontext.h +++ b/arch/powerpc/include/asm/sigcontext.h @@ -3,7 +3,6 @@ #include <asm/ptrace.h> - struct sigcontext_struct { unsigned long _unused[4]; int signal; diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index f55b5ff832..61e08728dd 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -6,7 +6,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ - #include <config.h> #include <bootm.h> #include <bootstage.h> diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c index 92b8a0bcea..46208ae4c7 100644 --- a/arch/powerpc/lib/interrupts.c +++ b/arch/powerpc/lib/interrupts.c @@ -32,7 +32,6 @@ static __inline__ unsigned long get_dec (void) return val; } - static __inline__ void set_dec (unsigned long val) { if (val) diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index d7869b2e36..46ff305b53 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -1106,7 +1106,6 @@ void os_relaunch(char *argv[]) os_exit(1); } - #ifdef CONFIG_FUZZ static void *fuzzer_thread(void * ptr) { diff --git a/arch/sandbox/include/asm/byteorder.h b/arch/sandbox/include/asm/byteorder.h index 70b4c078af..592f10a076 100644 --- a/arch/sandbox/include/asm/byteorder.h +++ b/arch/sandbox/include/asm/byteorder.h @@ -6,7 +6,6 @@ #ifndef __ASM_SANDBOX_BYTEORDER_H #define __ASM_SANDBOX_BYTEORDER_H - #include <asm/types.h> #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) diff --git a/arch/sh/include/asm/cpu_sh7722.h b/arch/sh/include/asm/cpu_sh7722.h index 9f1f6a0474..aae5b371ce 100644 --- a/arch/sh/include/asm/cpu_sh7722.h +++ b/arch/sh/include/asm/cpu_sh7722.h @@ -210,7 +210,6 @@ #define RWTCSR 0xA4520004 #define WTCNT RWTCNT - /* TMU */ #define TMU_BASE 0xFFD80000 diff --git a/arch/sh/include/asm/cpu_sh7734.h b/arch/sh/include/asm/cpu_sh7734.h index 546f4fff9b..22ae884c14 100644 --- a/arch/sh/include/asm/cpu_sh7734.h +++ b/arch/sh/include/asm/cpu_sh7734.h @@ -50,5 +50,4 @@ #define GPSR4 (GPSR0 + 0x10) #define GPSR5 (GPSR0 + 0x14) - #endif /* _ASM_CPU_SH7734_H_ */ diff --git a/arch/sh/include/asm/cpu_sh7752.h b/arch/sh/include/asm/cpu_sh7752.h index e024423f25..f084ed8e34 100644 --- a/arch/sh/include/asm/cpu_sh7752.h +++ b/arch/sh/include/asm/cpu_sh7752.h @@ -66,7 +66,6 @@ struct sermux_regs { }; #define SERMUX_BASE ((struct sermux_regs *)0xfe470000) - /* USB0/1 */ struct usb_common_regs { unsigned short reserved[129]; diff --git a/arch/sh/include/asm/cpu_sh7753.h b/arch/sh/include/asm/cpu_sh7753.h index 2f779b137e..4f25f1dd0d 100644 --- a/arch/sh/include/asm/cpu_sh7753.h +++ b/arch/sh/include/asm/cpu_sh7753.h @@ -66,7 +66,6 @@ struct sermux_regs { }; #define SERMUX_BASE ((struct sermux_regs *)0xfe470000) - /* USB0/1 */ struct usb_common_regs { unsigned short reserved[129]; diff --git a/arch/sh/include/asm/cpu_sh7757.h b/arch/sh/include/asm/cpu_sh7757.h index b3aaec2aaa..c0a8d89c95 100644 --- a/arch/sh/include/asm/cpu_sh7757.h +++ b/arch/sh/include/asm/cpu_sh7757.h @@ -162,7 +162,6 @@ struct pcie_system_bus_regs { }; #define PCIE_SYSTEM_BUS_BASE ((struct pcie_system_bus_regs *)0xffca1600) - /* PCIe-Bridge */ struct pciebrg_regs { unsigned short ctrl_h8s; diff --git a/arch/sh/include/asm/posix_types.h b/arch/sh/include/asm/posix_types.h index c9d9fb84f1..769c5eb4c1 100644 --- a/arch/sh/include/asm/posix_types.h +++ b/arch/sh/include/asm/posix_types.h @@ -65,7 +65,6 @@ static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); } - #undef __FD_ISSET static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) { diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index 6d3184f969..168857feb7 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -101,7 +101,6 @@ static int restore_polarities(struct udevice *dev) reg_start = start / IRQS_PER_IPC; reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC); - for (i = reg_start; i < reg_end; i++) { u32 mask; u16 reg; diff --git a/arch/x86/cpu/intel_common/me_status.c b/arch/x86/cpu/intel_common/me_status.c index a09bd5029e..905519abdd 100644 --- a/arch/x86/cpu/intel_common/me_status.c +++ b/arch/x86/cpu/intel_common/me_status.c @@ -127,7 +127,6 @@ static const char *const me_progress_policy_values[] = { [0x10] = "Required VSCC values for flash parts do not match", }; - /** * _intel_me_status() - Check Intel Management Engine status * diff --git a/arch/x86/cpu/quark/smc.c b/arch/x86/cpu/quark/smc.c index a7e92b3f5c..070833fd0e 100644 --- a/arch/x86/cpu/quark/smc.c +++ b/arch/x86/cpu/quark/smc.c @@ -245,7 +245,6 @@ void perform_ddr_reset(struct mrc_params *mrc_params) LEAVEFN(); } - /* * This function performs some initialization on the DDRIO unit. * This function is dependent on BOARD_ID, DDR_SPEED, and CHANNEL_ENABLES. diff --git a/arch/x86/include/asm/arch-broadwell/pch.h b/arch/x86/include/asm/arch-broadwell/pch.h index ecdf6d16f9..b0ccf542b1 100644 --- a/arch/x86/include/asm/arch-broadwell/pch.h +++ b/arch/x86/include/asm/arch-broadwell/pch.h @@ -30,7 +30,6 @@ #define TCO1_CNT 0x60 #define TCO_TMR_HLT (1 << 11) - /* Device 0:0.0 PCI configuration space */ #define EPBAR 0x40 diff --git a/arch/x86/include/asm/arch-broadwell/pei_data.h b/arch/x86/include/asm/arch-broadwell/pei_data.h index 4442beac5e..2969900578 100644 --- a/arch/x86/include/asm/arch-broadwell/pei_data.h +++ b/arch/x86/include/asm/arch-broadwell/pei_data.h @@ -62,7 +62,6 @@ struct usb3_port_setting { uint8_t fixed_eq; } __packed; - struct pei_data { uint32_t pei_version; diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index 196fcf9d3f..50cad28186 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -5,7 +5,6 @@ * Copyright 1992, Linus Torvalds. */ - /* * These have to be done with inline assembly: that way the bit-setting * is guaranteed to be atomic. All bit operations return 0 if the bit diff --git a/arch/x86/include/asm/byteorder.h b/arch/x86/include/asm/byteorder.h index a2d1fd8703..2f13a1d649 100644 --- a/arch/x86/include/asm/byteorder.h +++ b/arch/x86/include/asm/byteorder.h @@ -5,7 +5,6 @@ #ifdef __GNUC__ - static __inline__ __u32 ___arch__swab32(__u32 x) { __asm__("bswap %0" : "=r" (x) : "0" (x)); diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 5efb2e1b21..c6d90eb794 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -46,10 +46,8 @@ #include <asm/types.h> - #ifdef __KERNEL__ - /* * readX/writeX() are used to access memory mapped devices. On some * architectures the memory mapped IO stuff needs to be accessed @@ -142,7 +140,6 @@ #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO #endif - /* * Talk about misusing macros.. */ @@ -152,7 +149,6 @@ static inline void _out##s(unsigned x value, unsigned short port) { #define __OUT2(s,s1,s2) \ __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1" - #define __OUT(s,s1,x) \ __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \ __OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} diff --git a/arch/x86/include/asm/ist.h b/arch/x86/include/asm/ist.h index 80b8597d54..acd9bd3ef2 100644 --- a/arch/x86/include/asm/ist.h +++ b/arch/x86/include/asm/ist.h @@ -7,7 +7,6 @@ * Copyright 2002 Andy Grover <andrew.grover@intel.com> */ - #include <linux/types.h> struct ist_info { diff --git a/arch/x86/include/asm/me_common.h b/arch/x86/include/asm/me_common.h index aa478594ec..ed2925b904 100644 --- a/arch/x86/include/asm/me_common.h +++ b/arch/x86/include/asm/me_common.h @@ -221,7 +221,6 @@ struct me_fw_version { u16 recovery_hot_fix; } __packed; - #define HECI_EOP_STATUS_SUCCESS 0x0 #define HECI_EOP_PERFORM_GLOBAL_RESET 0x1 diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h index a25f8f03a1..3c12e07590 100644 --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -374,7 +374,6 @@ void mp_write_pci_intsrc(struct mp_config_table *mc, int irqtype, void mp_write_lintsrc(struct mp_config_table *mc, int irqtype, int irqflag, int srcbus, int srcbusirq, int destapic, int destlint); - /** * mp_write_address_space() - Write a system address space entry * diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 27764fc56c..af5f9a1198 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -245,7 +245,6 @@ do { \ #endif /* !CONFIG_PARAVIRT */ - #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \ (u32)((val) >> 32)) diff --git a/arch/xtensa/include/asm/arch-dc232b/core.h b/arch/xtensa/include/asm/arch-dc232b/core.h index c1453f719e..9ab7f46423 100644 --- a/arch/xtensa/include/asm/arch-dc232b/core.h +++ b/arch/xtensa/include/asm/arch-dc232b/core.h @@ -9,7 +9,6 @@ #ifndef _XTENSA_CORE_CONFIGURATION_H #define _XTENSA_CORE_CONFIGURATION_H - /**************************************************************************** Parameters Useful for Any Code, USER or PRIVILEGED ****************************************************************************/ @@ -19,7 +18,6 @@ * configured, and a value of 0 otherwise. These macros are always defined. */ - /*---------------------------------------------------------------------- ISA ----------------------------------------------------------------------*/ @@ -69,7 +67,6 @@ #define XCHAL_HAVE_VECTRALX 0 /* Vectra LX pkg */ #define XCHAL_HAVE_HIFI2 0 /* HiFi2 Audio Engine pkg */ - /*---------------------------------------------------------------------- MISC ----------------------------------------------------------------------*/ @@ -111,7 +108,6 @@ #define XCHAL_HW_MAX_VERSION_MINOR 1 /* minor v of latest tgt hw */ #define XCHAL_HW_MAX_VERSION 221001 /* latest targeted hw */ - /*---------------------------------------------------------------------- CACHE ----------------------------------------------------------------------*/ @@ -126,12 +122,10 @@ #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ - /**************************************************************************** Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code ****************************************************************************/ - #ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY /*---------------------------------------------------------------------- @@ -159,7 +153,6 @@ /* Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits): */ #define XCHAL_CA_BITS 4 - /*---------------------------------------------------------------------- INTERNAL I/D RAM/ROMs and XLMI ----------------------------------------------------------------------*/ @@ -171,7 +164,6 @@ #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/ #define XCHAL_NUM_XLMI 0 /* number of core XLMI ports */ - /*---------------------------------------------------------------------- INTERRUPTS and TIMERS ----------------------------------------------------------------------*/ @@ -282,7 +274,6 @@ #define XCHAL_INTLEVEL7_NUM 14 /* (There are many interrupts each at level(s) 1, 3.) */ - /* * External interrupt vectors/levels. * These macros describe how Xtensa processor interrupt numbers @@ -311,7 +302,6 @@ #define XCHAL_EXTINT15_NUM 20 /* (intlevel 1) */ #define XCHAL_EXTINT16_NUM 21 /* (intlevel 3) */ - /*---------------------------------------------------------------------- EXCEPTIONS and VECTORS ----------------------------------------------------------------------*/ @@ -379,7 +369,6 @@ #define XCHAL_INTLEVEL7_VECTOR_VADDR XCHAL_NMI_VECTOR_VADDR #define XCHAL_INTLEVEL7_VECTOR_PADDR XCHAL_NMI_VECTOR_PADDR - /*---------------------------------------------------------------------- DEBUG ----------------------------------------------------------------------*/ @@ -389,7 +378,6 @@ #define XCHAL_NUM_DBREAK 2 /* number of DBREAKn regs */ #define XCHAL_HAVE_OCD_DIR_ARRAY 1 /* faster OCD option */ - /*---------------------------------------------------------------------- MMU ----------------------------------------------------------------------*/ @@ -415,5 +403,4 @@ #endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */ - #endif /* _XTENSA_CORE_CONFIGURATION_H */ diff --git a/arch/xtensa/include/asm/arch-dc232b/tie-asm.h b/arch/xtensa/include/asm/arch-dc232b/tie-asm.h index 35a26dca7c..9c6b1eeacd 100644 --- a/arch/xtensa/include/asm/arch-dc232b/tie-asm.h +++ b/arch/xtensa/include/asm/arch-dc232b/tie-asm.h @@ -25,7 +25,6 @@ /* Misc */ #define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */ - /* Macro to save all non-coprocessor (extra) custom TIE and optional state * (not including zero-overhead loop registers). * Save area ptr (clobbered): ptr (1 byte aligned) diff --git a/arch/xtensa/include/asm/arch-dc233c/core.h b/arch/xtensa/include/asm/arch-dc233c/core.h index cd3c8c115f..3cd11981d0 100644 --- a/arch/xtensa/include/asm/arch-dc233c/core.h +++ b/arch/xtensa/include/asm/arch-dc233c/core.h @@ -9,7 +9,6 @@ #ifndef _XTENSA_CORE_CONFIGURATION_H #define _XTENSA_CORE_CONFIGURATION_H - /**************************************************************************** Parameters Useful for Any Code, USER or PRIVILEGED ****************************************************************************/ @@ -19,7 +18,6 @@ * configured, and a value of 0 otherwise. These macros are always defined. */ - /*---------------------------------------------------------------------- ISA ----------------------------------------------------------------------*/ @@ -86,7 +84,6 @@ #define XCHAL_HAVE_TURBO16 0 /* ConnX Turbo16 pkg */ #define XCHAL_HAVE_BBP16 0 /* ConnX BBP16 pkg */ - /*---------------------------------------------------------------------- MISC ----------------------------------------------------------------------*/ @@ -130,7 +127,6 @@ #define XCHAL_HW_MAX_VERSION_MINOR 1 /* minor v of latest tgt hw */ #define XCHAL_HW_MAX_VERSION 240001 /* latest targeted hw */ - /*---------------------------------------------------------------------- CACHE ----------------------------------------------------------------------*/ @@ -148,7 +144,6 @@ #define XCHAL_HAVE_PREFETCH 0 /* PREFCTL register */ - /**************************************************************************** Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code ****************************************************************************/ @@ -184,7 +179,6 @@ /* Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits): */ #define XCHAL_CA_BITS 4 - /*---------------------------------------------------------------------- INTERNAL I/D RAM/ROMs and XLMI ----------------------------------------------------------------------*/ @@ -198,7 +192,6 @@ #define XCHAL_HAVE_IMEM_LOADSTORE 1 /* can load/store to IROM/IRAM*/ - /*---------------------------------------------------------------------- INTERRUPTS and TIMERS ----------------------------------------------------------------------*/ @@ -309,7 +302,6 @@ #define XCHAL_INTLEVEL7_NUM 14 /* (There are many interrupts each at level(s) 1, 3.) */ - /* * External interrupt vectors/levels. * These macros describe how Xtensa processor interrupt numbers @@ -338,7 +330,6 @@ #define XCHAL_EXTINT15_NUM 20 /* (intlevel 1) */ #define XCHAL_EXTINT16_NUM 21 /* (intlevel 3) */ - /*---------------------------------------------------------------------- EXCEPTIONS and VECTORS ----------------------------------------------------------------------*/ @@ -408,7 +399,6 @@ #define XCHAL_INTLEVEL7_VECTOR_VADDR XCHAL_NMI_VECTOR_VADDR #define XCHAL_INTLEVEL7_VECTOR_PADDR XCHAL_NMI_VECTOR_PADDR - /*---------------------------------------------------------------------- DEBUG ----------------------------------------------------------------------*/ @@ -418,7 +408,6 @@ #define XCHAL_NUM_DBREAK 2 /* number of DBREAKn regs */ #define XCHAL_HAVE_OCD_DIR_ARRAY 1 /* faster OCD option */ - /*---------------------------------------------------------------------- MMU ----------------------------------------------------------------------*/ @@ -445,5 +434,4 @@ #endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */ - #endif /* _XTENSA_CORE_CONFIGURATION_H */ diff --git a/arch/xtensa/include/asm/arch-dc233c/tie-asm.h b/arch/xtensa/include/asm/arch-dc233c/tie-asm.h index 7b3d1f3c57..ee1b198641 100644 --- a/arch/xtensa/include/asm/arch-dc233c/tie-asm.h +++ b/arch/xtensa/include/asm/arch-dc233c/tie-asm.h @@ -159,7 +159,6 @@ .endif .endm // xchal_ncp_load - #define XCHAL_NCP_NUM_ATMPS 1 #define XCHAL_SA_NUM_ATMPS 1 diff --git a/arch/xtensa/include/asm/arch-de212/core.h b/arch/xtensa/include/asm/arch-de212/core.h index 60c6efba7d..c2609f46a0 100644 --- a/arch/xtensa/include/asm/arch-de212/core.h +++ b/arch/xtensa/include/asm/arch-de212/core.h @@ -9,7 +9,6 @@ #ifndef _XTENSA_CORE_CONFIGURATION_H #define _XTENSA_CORE_CONFIGURATION_H - /**************************************************************************** Parameters Useful for Any Code, USER or PRIVILEGED ****************************************************************************/ @@ -19,7 +18,6 @@ * configured, and a value of 0 otherwise. These macros are always defined. */ - /*---------------------------------------------------------------------- ISA ----------------------------------------------------------------------*/ @@ -91,7 +89,6 @@ #define XCHAL_HAVE_HIFI2EP 0 /* HiFi2EP */ #define XCHAL_HAVE_HIFI_MINI 0 - #define XCHAL_HAVE_VECTORFPU2005 0 /* vector or user floating-point pkg */ #define XCHAL_HAVE_USER_DPFPU 0 /* user DP floating-point pkg */ #define XCHAL_HAVE_USER_SPFPU 0 /* user DP floating-point pkg */ @@ -130,7 +127,6 @@ #define XCHAL_HAVE_GRIVPEP 0 /* GRIVPEP is General Release of IVPEP */ #define XCHAL_HAVE_GRIVPEP_HISTOGRAM 0 /* Histogram option on GRIVPEP */ - /*---------------------------------------------------------------------- MISC ----------------------------------------------------------------------*/ @@ -178,7 +174,6 @@ #define XCHAL_HW_MAX_VERSION_MINOR 2 /* minor v of latest tgt hw */ #define XCHAL_HW_MAX_VERSION 260002 /* latest targeted hw */ - /*---------------------------------------------------------------------- CACHE ----------------------------------------------------------------------*/ @@ -205,7 +200,6 @@ #define XCHAL_HAVE_ICACHE_DYN_WAYS 0 /* Icache dynamic way support */ #define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */ - /**************************************************************************** Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code ****************************************************************************/ @@ -250,7 +244,6 @@ XCHAL_HAVE_DCACHE_DYN_WAYS) && \ (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RE_2012_0)) - /*---------------------------------------------------------------------- INTERNAL I/D RAM/ROMs and XLMI ----------------------------------------------------------------------*/ @@ -283,7 +276,6 @@ #define XCHAL_HAVE_IMEM_LOADSTORE 1 /* can load/store to IROM/IRAM*/ - /*---------------------------------------------------------------------- INTERRUPTS and TIMERS ----------------------------------------------------------------------*/ @@ -395,7 +387,6 @@ #define XCHAL_INTLEVEL7_NUM 14 /* (There are many interrupts each at level(s) 1, 3.) */ - /* * External interrupt mapping. * These macros describe how Xtensa processor interrupt numbers @@ -442,7 +433,6 @@ #define XCHAL_INT20_EXTNUM 15 /* (intlevel 1) */ #define XCHAL_INT21_EXTNUM 16 /* (intlevel 3) */ - /*---------------------------------------------------------------------- EXCEPTIONS and VECTORS ----------------------------------------------------------------------*/ @@ -512,7 +502,6 @@ #define XCHAL_INTLEVEL7_VECTOR_VADDR XCHAL_NMI_VECTOR_VADDR #define XCHAL_INTLEVEL7_VECTOR_PADDR XCHAL_NMI_VECTOR_PADDR - /*---------------------------------------------------------------------- DEBUG MODULE ----------------------------------------------------------------------*/ @@ -539,7 +528,6 @@ /* Perf counters */ #define XCHAL_NUM_PERF_COUNTERS 0 /* performance counters */ - /*---------------------------------------------------------------------- MMU ----------------------------------------------------------------------*/ @@ -564,5 +552,4 @@ #endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */ - #endif /* _XTENSA_CORE_CONFIGURATION_H */ diff --git a/arch/xtensa/include/asm/arch-de212/tie-asm.h b/arch/xtensa/include/asm/arch-de212/tie-asm.h index 3192ac82ad..5156aae71e 100644 --- a/arch/xtensa/include/asm/arch-de212/tie-asm.h +++ b/arch/xtensa/include/asm/arch-de212/tie-asm.h @@ -31,7 +31,6 @@ | ((ccuse) & XTHAL_SAS_ANYCC) \ | ((abi) & XTHAL_SAS_ANYABI) ) - /* * Macro to store all non-coprocessor (extra) custom TIE and optional state * (not including zero-overhead loop registers). @@ -140,7 +139,6 @@ .endif .endm // xchal_ncp_load - #define XCHAL_NCP_NUM_ATMPS 1 #define XCHAL_SA_NUM_ATMPS 1 diff --git a/arch/xtensa/include/asm/asmmacro.h b/arch/xtensa/include/asm/asmmacro.h index 78613fc579..8267f05f52 100644 --- a/arch/xtensa/include/asm/asmmacro.h +++ b/arch/xtensa/include/asm/asmmacro.h @@ -59,7 +59,6 @@ loop \at, 99f .endm - .macro __loops ar, as, at, incr_log2, mask_log2, cond, ncond .ifgt \incr_log2 - 1 addi \at, \as, (1 << \incr_log2) - 1 @@ -72,7 +71,6 @@ loop\cond \at, 99f .endm - .macro __loopt ar, as, at, incr_log2 sub \at, \as, \ar .ifgt \incr_log2 - 1 @@ -82,17 +80,14 @@ loop \at, 99f .endm - .macro __loop as loop \as, 99f .endm - .macro __endl ar, as 99: .endm - #else .macro __loopi ar, at, size, incr @@ -101,7 +96,6 @@ 98: .endm - .macro __loops ar, as, at, incr_log2, mask_log2, cond, ncond .ifnc \mask_log2, extui \at, \as, \incr_log2, \mask_log2 @@ -127,25 +121,20 @@ 98: .endm - .macro __loop as 98: .endm - .macro __endl ar, as bltu \ar, \as, 98b 99: .endm - #endif - .macro __endla ar, as, incr addi \ar, \ar, \incr __endl \ar \as .endm - #endif /* _XTENSA_ASMMACRO_H */ diff --git a/arch/xtensa/include/asm/cacheasm.h b/arch/xtensa/include/asm/cacheasm.h index 69448cfff7..c53e653dfd 100644 --- a/arch/xtensa/include/asm/cacheasm.h +++ b/arch/xtensa/include/asm/cacheasm.h @@ -51,7 +51,6 @@ .endm - .macro __loop_cache_range ar as at insn line_width extui \at, \ar, 0, \line_width @@ -63,7 +62,6 @@ .endm - .macro __loop_cache_page ar at insn line_width __loopi \ar, \at, PAGE_SIZE, 4 << (\line_width) @@ -77,7 +75,6 @@ .endm - .macro ___unlock_dcache_all ar at #if XCHAL_DCACHE_LINE_LOCKABLE && XCHAL_DCACHE_SIZE @@ -86,7 +83,6 @@ .endm - .macro ___unlock_icache_all ar at #if XCHAL_ICACHE_LINE_LOCKABLE && XCHAL_ICACHE_SIZE @@ -95,7 +91,6 @@ .endm - .macro ___flush_invalidate_dcache_all ar at #if XCHAL_DCACHE_SIZE @@ -104,7 +99,6 @@ .endm - .macro ___flush_dcache_all ar at #if XCHAL_DCACHE_SIZE @@ -113,7 +107,6 @@ .endm - .macro ___invalidate_dcache_all ar at #if XCHAL_DCACHE_SIZE @@ -123,7 +116,6 @@ .endm - .macro ___invalidate_icache_all ar at #if XCHAL_ICACHE_SIZE @@ -133,7 +125,6 @@ .endm - .macro ___flush_invalidate_dcache_range ar as at #if XCHAL_DCACHE_SIZE @@ -142,7 +133,6 @@ .endm - .macro ___flush_dcache_range ar as at #if XCHAL_DCACHE_SIZE @@ -151,7 +141,6 @@ .endm - .macro ___invalidate_dcache_range ar as at #if XCHAL_DCACHE_SIZE @@ -160,7 +149,6 @@ .endm - .macro ___invalidate_icache_range ar as at #if XCHAL_ICACHE_SIZE @@ -169,7 +157,6 @@ .endm - .macro ___flush_invalidate_dcache_page ar as #if XCHAL_DCACHE_SIZE @@ -178,7 +165,6 @@ .endm - .macro ___flush_dcache_page ar as #if XCHAL_DCACHE_SIZE @@ -187,7 +173,6 @@ .endm - .macro ___invalidate_dcache_page ar as #if XCHAL_DCACHE_SIZE @@ -196,7 +181,6 @@ .endm - .macro ___invalidate_icache_page ar as #if XCHAL_ICACHE_SIZE diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index ab2438b829..6ca1dea68f 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h @@ -111,7 +111,6 @@ void outsl(unsigned long port, const void *src, unsigned long count); # error processor byte order undefined! #endif - /* * Convert a physical pointer to a virtual kernel pointer for /dev/mem access */ diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 22203c9649..066188fbde 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -6,5 +6,4 @@ #ifndef _XTENSA_PROCESSOR_H #define _XTENSA_PROCESSOR_H - #endif /* _XTENSA_PROCESSOR_H */ diff --git a/arch/xtensa/include/asm/types.h b/arch/xtensa/include/asm/types.h index 2c5b5433cc..5659491222 100644 --- a/arch/xtensa/include/asm/types.h +++ b/arch/xtensa/include/asm/types.h @@ -24,7 +24,6 @@ typedef u32 dma_addr_t; typedef unsigned long phys_addr_t; typedef unsigned long phys_size_t; - #endif /* __KERNEL__ */ #endif /* _XTENSA_TYPES_H */ diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c index c6739584bb..319635c6b0 100644 --- a/arch/xtensa/lib/time.c +++ b/arch/xtensa/lib/time.c @@ -62,7 +62,6 @@ void __udelay(unsigned long usec) delay_cycles(mhz * lo); } - /* * Return the elapsed time (ticks) since 'base'. */ @@ -89,7 +88,6 @@ ulong get_timer(ulong base) #endif } - /* * This function is derived from ARM/PowerPC code (read timebase as long long). * On Xtensa it just returns the timer value. diff --git a/board/CZ.NIC/turris_1x/Kconfig b/board/CZ.NIC/turris_1x/Kconfig new file mode 100644 index 0000000000..d769c42c1a --- /dev/null +++ b/board/CZ.NIC/turris_1x/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0+ +# (C) 2022 Pali Rohár <pali@kernel.org> + +if TARGET_TURRIS_1X + +# Board identification +config SYS_BOARD + default "turris_1x" +config SYS_VENDOR + default "CZ.NIC" +config SYS_CONFIG_NAME + default "turris_1x" +config DEFAULT_DEVICE_TREE + default "turris1x" + +endif diff --git a/board/CZ.NIC/turris_1x/MAINTAINERS b/board/CZ.NIC/turris_1x/MAINTAINERS new file mode 100644 index 0000000000..e858c97b96 --- /dev/null +++ b/board/CZ.NIC/turris_1x/MAINTAINERS @@ -0,0 +1,13 @@ +TURRIS 1.X BOARD +M: Marek MojÃk <marek.mojik@nic.cz> +S: Maintained +F: arch/powerpc/dts/turris1x-u-boot.dtsi +F: arch/powerpc/dts/turris1x.dts +F: board/CZ.NIC/turris_1x/ +F: board/CZ.NIC/turris_atsha_otp.c +F: board/CZ.NIC/turris_atsha_otp.h +F: board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +F: board/freescale/p1_p2_rdb_pc/spl.c +F: configs/turris_1x_nor_defconfig +F: configs/turris_1x_sdcard_defconfig +F: include/configs/turris_1x.h diff --git a/board/CZ.NIC/turris_1x/Makefile b/board/CZ.NIC/turris_1x/Makefile new file mode 100644 index 0000000000..a24aee9161 --- /dev/null +++ b/board/CZ.NIC/turris_1x/Makefile @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0+ +# (C) 2022 Pali Rohár <pali@kernel.org> + +ifdef CONFIG_SPL_BUILD +obj-y += ../../freescale/p1_p2_rdb_pc/spl.o +endif + +obj-y += ../../freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.o +obj-y += ../turris_atsha_otp.o +obj-y += ../turris_common.o + +obj-y += turris_1x.o +obj-y += ddr.o +obj-y += law.o +obj-y += tlb.o diff --git a/board/CZ.NIC/turris_1x/ddr.c b/board/CZ.NIC/turris_1x/ddr.c new file mode 100644 index 0000000000..27400f9afc --- /dev/null +++ b/board/CZ.NIC/turris_1x/ddr.c @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ +// (C) 2022 Pali Rohár <pali@kernel.org> + +#include <config.h> +#include <linux/types.h> +#include <fsl_ddr_sdram.h> +#include <fsl_ddr_dimm_params.h> + +void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num) +{ + int i; + + popts->clk_adjust = 6; + popts->cpo_override = 0x1f; + popts->write_data_delay = 2; + popts->half_strength_driver_enable = 1; + popts->wrlvl_en = 1; + popts->wrlvl_override = 1; + popts->wrlvl_sample = 0xf; + popts->wrlvl_start = 0x8; + popts->trwt_override = 1; + popts->trwt = 0; + + for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { + popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER; + popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS; + } +} diff --git a/board/CZ.NIC/turris_1x/law.c b/board/CZ.NIC/turris_1x/law.c new file mode 100644 index 0000000000..51217ccf05 --- /dev/null +++ b/board/CZ.NIC/turris_1x/law.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ +// (C) 2022 Pali Rohár <pali@kernel.org> + +#include <config.h> +#include <asm/fsl_law.h> + +struct law_entry law_table[] = { + SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_SYS_NAND_BASE_PHYS, LAW_SIZE_256K, LAW_TRGT_IF_LBC), + SET_LAW(CFG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_LBC), +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/CZ.NIC/turris_1x/tlb.c b/board/CZ.NIC/turris_1x/tlb.c new file mode 100644 index 0000000000..f35a555838 --- /dev/null +++ b/board/CZ.NIC/turris_1x/tlb.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0+ +// (C) 2022 Pali Rohár <pali@kernel.org> + +#include <config.h> +#include <mpc85xx.h> +#include <asm/mmu.h> +#include <linux/sizes.h> +#include <linux/build_bug.h> + +/* + * NOTE: e500v2 supports only following Book-E page sizes: + * + * TLB0: + * BOOKE_PAGESZ_4K + * + * TLB1: + * BOOKE_PAGESZ_4K + * BOOKE_PAGESZ_16K + * BOOKE_PAGESZ_64K + * BOOKE_PAGESZ_256K + * BOOKE_PAGESZ_1M + * BOOKE_PAGESZ_4M + * BOOKE_PAGESZ_16M + * BOOKE_PAGESZ_64M + * BOOKE_PAGESZ_256M + * BOOKE_PAGESZ_1G + * BOOKE_PAGESZ_4G + */ + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 */ + + /* ***** - Initial stack in L1 cache 16K */ + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR + 0 * SZ_4K, + CFG_SYS_INIT_RAM_ADDR_PHYS + 0 * SZ_4K, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR + 1 * SZ_4K, + CFG_SYS_INIT_RAM_ADDR_PHYS + 1 * SZ_4K, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR + 2 * SZ_4K, + CFG_SYS_INIT_RAM_ADDR_PHYS + 2 * SZ_4K, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR + 3 * SZ_4K, + CFG_SYS_INIT_RAM_ADDR_PHYS + 3 * SZ_4K, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + + /* TLB 1 */ + + /* *I*** - Boot page 4K */ + SET_TLB_ENTRY(1, BPTR_VIRT_ADDR, + 0xfffff000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I, + 0, 0, BOOKE_PAGESZ_4K, 1), + + /* *I*G* - CCSR 1M */ + SET_TLB_ENTRY(1, CFG_SYS_CCSRBAR, + CFG_SYS_CCSRBAR_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 1, BOOKE_PAGESZ_1M, 1), + + /* W**G* - NOR 16M */ + /* This will be changed to *I*G* after relocation to RAM in board_early_init_r() */ + SET_TLB_ENTRY(1, CFG_SYS_FLASH_BASE, + CFG_SYS_FLASH_BASE_PHYS, + MAS3_SX | MAS3_SR, MAS2_W | MAS2_G, + 0, 2, BOOKE_PAGESZ_16M, 1), + + /* *I*G* - CPLD 256K (effective 128K) */ + SET_TLB_ENTRY(1, CFG_SYS_CPLD_BASE, + CFG_SYS_CPLD_BASE_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 3, BOOKE_PAGESZ_256K, 1), + + /* *I*G* - NAND 256K */ + SET_TLB_ENTRY(1, CFG_SYS_NAND_BASE, + CFG_SYS_NAND_BASE_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 4, BOOKE_PAGESZ_256K, 1), + + /* *I*G* - PCIe MEM (bus 1 and 2) 1G */ + SET_TLB_ENTRY(1, CFG_SYS_PCIE1_MEM_VIRT, + CFG_SYS_PCIE1_MEM_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 5, BOOKE_PAGESZ_1G, 1), + + /* *I*G* - PCIe MEM (bus 3) 4M (effective 2M) */ + SET_TLB_ENTRY(1, CFG_SYS_PCIE3_MEM_VIRT, + CFG_SYS_PCIE3_MEM_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 6, BOOKE_PAGESZ_4M, 1), + + /* *I*G* - PCIe I/O (all 3 buses) 256K (effective 192K) */ + SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, + CFG_SYS_PCIE1_IO_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 7, BOOKE_PAGESZ_256K, 1), + +#ifdef CFG_SYS_INIT_L2_ADDR + /* ***G* - Initial SRAM in L2 cache 512K */ + SET_TLB_ENTRY(1, CFG_SYS_INIT_L2_ADDR, + CFG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_G, + 0, 8, BOOKE_PAGESZ_256K, 1), + SET_TLB_ENTRY(1, CFG_SYS_INIT_L2_ADDR + SZ_256K, + CFG_SYS_INIT_L2_ADDR_PHYS + SZ_256K, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_G, + 0, 9, BOOKE_PAGESZ_256K, 1), +#endif + +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + /* **M** - SDRAM 2G */ + SET_TLB_ENTRY(1, CFG_SYS_DDR_SDRAM_BASE, + CFG_SYS_DDR_SDRAM_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_M, + 0, 10, BOOKE_PAGESZ_1G, 1), + SET_TLB_ENTRY(1, CFG_SYS_DDR_SDRAM_BASE + SZ_1G, + CFG_SYS_DDR_SDRAM_BASE + SZ_1G, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_M, + 0, 11, BOOKE_PAGESZ_1G, 1), +#endif +}; + +int num_tlb_entries = ARRAY_SIZE(tlb_table); + +/* + * PCIe MEM TLB entry expects that second PCIe MEM window is mapped after the + * first PCIe MEM window. Check for this requirement. + */ +static_assert(CFG_SYS_PCIE1_MEM_VIRT + SZ_512M == CFG_SYS_PCIE2_MEM_VIRT); +static_assert(CFG_SYS_PCIE1_MEM_PHYS + SZ_512M == CFG_SYS_PCIE2_MEM_PHYS); + +/* + * PCIe I/O TLB entry expects that all 3 PCIe I/O windows are mapped one after + * another. Check for this requirement. + */ +static_assert(CFG_SYS_PCIE1_IO_VIRT + SZ_64K == CFG_SYS_PCIE2_IO_VIRT); +static_assert(CFG_SYS_PCIE1_IO_PHYS + SZ_64K == CFG_SYS_PCIE2_IO_PHYS); +static_assert(CFG_SYS_PCIE2_IO_VIRT + SZ_64K == CFG_SYS_PCIE3_IO_VIRT); +static_assert(CFG_SYS_PCIE2_IO_PHYS + SZ_64K == CFG_SYS_PCIE3_IO_PHYS); diff --git a/board/CZ.NIC/turris_1x/turris_1x.c b/board/CZ.NIC/turris_1x/turris_1x.c new file mode 100644 index 0000000000..7a0b68caae --- /dev/null +++ b/board/CZ.NIC/turris_1x/turris_1x.c @@ -0,0 +1,571 @@ +// SPDX-License-Identifier: GPL-2.0+ +// (C) 2022 Pali Rohár <pali@kernel.org> + +#include <init.h> +#include <env.h> +#include <fdt_support.h> +#include <clock_legacy.h> +#include <image.h> +#include <asm/fsl_law.h> +#include <asm/global_data.h> +#include <asm/mmu.h> +#include <dm/device.h> +#include <dm/ofnode.h> +#include <linux/build_bug.h> +#include <display_options.h> + +#include "../turris_atsha_otp.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Reset time cycle register provided by Turris CPLD firmware. + * Turris CPLD firmware is open source and available at: + * https://gitlab.nic.cz/turris/hw/turris_cpld/-/blob/master/CZ_NIC_Router_CPLD.v + */ +#define TURRIS_CPLD_RESET_TIME_CYCLE_REG ((void *)CFG_SYS_CPLD_BASE + 0x1f) +#define TURRIS_CPLD_RESET_TIME_CYCLE_300MS BIT(0) +#define TURRIS_CPLD_RESET_TIME_CYCLE_1S BIT(1) +#define TURRIS_CPLD_RESET_TIME_CYCLE_2S BIT(2) +#define TURRIS_CPLD_RESET_TIME_CYCLE_3S BIT(3) +#define TURRIS_CPLD_RESET_TIME_CYCLE_4S BIT(4) +#define TURRIS_CPLD_RESET_TIME_CYCLE_5S BIT(5) +#define TURRIS_CPLD_RESET_TIME_CYCLE_6S BIT(6) + +#define TURRIS_CPLD_LED_BRIGHTNESS_REG_FIRST ((void *)CFG_SYS_CPLD_BASE + 0x13) +#define TURRIS_CPLD_LED_BRIGHTNESS_REG_LAST ((void *)CFG_SYS_CPLD_BASE + 0x1e) +#define TURRIS_CPLD_LED_SW_OVERRIDE_REG ((void *)CFG_SYS_CPLD_BASE + 0x22) + +int dram_init_banksize(void) +{ + phys_size_t size = gd->ram_size; + + static_assert(CONFIG_NR_DRAM_BANKS >= 3); + + gd->bd->bi_dram[0].start = gd->ram_base; + gd->bd->bi_dram[0].size = get_effective_memsize(); + size -= gd->bd->bi_dram[0].size; + + /* Note: This address space is not mapped via TLB entries in U-Boot */ + +#ifndef CONFIG_SDCARD + if (size > 0) { + /* + * Setup additional overlapping 1 GB DDR LAW at the end of + * 32-bit physical address space. It overlaps with all other + * peripherals on P2020 mapped to physical address space. + * But this is not issue because documentation says: + * P2020 QorIQ Integrated Processor Reference Manual, + * section 2.3.1 Precedence of local access windows: + * If two local access windows overlap, the lower + * numbered window takes precedence. + */ + if (set_ddr_laws(0xc0000000, SZ_1G, LAW_TRGT_IF_DDR_1) < 0) { + printf("Error: Cannot setup DDR LAW for more than 2 GB\n"); + return 0; + } + } + + if (size > 0) { + /* Free space between PCIe bus 3 MEM and NOR */ + gd->bd->bi_dram[1].start = 0xc0200000; + gd->bd->bi_dram[1].size = min(size, 0xef000000 - gd->bd->bi_dram[1].start); + size -= gd->bd->bi_dram[1].size; + } + + if (size > 0) { + /* Free space between NOR and NAND */ + gd->bd->bi_dram[2].start = 0xf0000000; + gd->bd->bi_dram[2].size = min(size, 0xff800000 - gd->bd->bi_dram[2].start); + size -= gd->bd->bi_dram[2].size; + } +#else + puts("\n\n!!! TODO: fix sdcard >2GB RAM\n\n\n"); +#endif + return 0; +} + +static inline int fdt_setprop_inplace_u32_partial(void *blob, int node, + const char *name, + u32 idx, u32 val) +{ + val = cpu_to_fdt32(val); + + return fdt_setprop_inplace_namelen_partial(blob, node, name, + strlen(name), + idx * sizeof(u32), + &val, sizeof(u32)); +} + +/* Setup correct size of PCIe controller MEM in DT "ranges" property recursively */ +static void fdt_fixup_pcie_mem_size(void *blob, int node, phys_size_t pcie1_mem, + phys_size_t pcie2_mem, phys_size_t pcie3_mem) +{ + int pci_cells, cpu_cells, size_cells; + const u32 *ranges; + int pnode; + int i, len; + u32 pci_flags; + u64 cpu_addr; + u64 size; + u64 new_size; + int pcie_id; + int idx; + int subnode; + int ret; + + if (!fdtdec_get_is_enabled(blob, node)) + return; + + ranges = fdt_getprop(blob, node, "ranges", &len); + if (!ranges || !len || len % sizeof(u32)) + return; + + /* + * The "ranges" property is an array of + * { <PCI address> <CPU address> <size in PCI address space> } + * where number of PCI address cells and size cells is stored in the + * "#address-cells" and "#size-cells" properties of the same node + * containing the "ranges" property and number of CPU address cells + * is stored in the parent's "#address-cells" property. + * + * All 3 elements can span a different number of cells. Fetch them. + */ + pnode = fdt_parent_offset(blob, node); + pci_cells = fdt_address_cells(blob, node); + cpu_cells = fdt_address_cells(blob, pnode); + size_cells = fdt_size_cells(blob, node); + + /* PCI addresses always use 3 cells */ + if (pci_cells != 3) + return; + + /* CPU addresses and sizes on P2020 may be 32-bit (1 cell) or 64-bit (2 cells) */ + if (cpu_cells != 1 && cpu_cells != 2) + return; + if (size_cells != 1 && size_cells != 2) + return; + + for (i = 0; i < len / sizeof(u32); i += pci_cells + cpu_cells + size_cells) { + /* PCI address consists of 3 cells: flags, addr.hi, addr.lo */ + pci_flags = fdt32_to_cpu(ranges[i]); + + cpu_addr = fdt32_to_cpu(ranges[i + pci_cells]); + if (cpu_cells == 2) { + cpu_addr <<= 32; + cpu_addr |= fdt32_to_cpu(ranges[i + pci_cells + 1]); + } + + size = fdt32_to_cpu(ranges[i + pci_cells + cpu_cells]); + if (size_cells == 2) { + size <<= 32; + size |= fdt32_to_cpu(ranges[i + pci_cells + cpu_cells + 1]); + } + + /* + * Bits [25:24] of PCI flags defines space code + * 0b10 is 32-bit MEM and 0b11 is 64-bit MEM. + * Check for any type of PCIe MEM mapping. + */ + if (!(pci_flags & 0x02000000)) + continue; + + if (cpu_addr == CFG_SYS_PCIE1_MEM_PHYS && size > pcie1_mem) { + pcie_id = 1; + new_size = pcie1_mem; + } else if (cpu_addr == CFG_SYS_PCIE2_MEM_PHYS && size > pcie2_mem) { + pcie_id = 2; + new_size = pcie2_mem; + } else if (cpu_addr == CFG_SYS_PCIE3_MEM_PHYS && size > pcie3_mem) { + pcie_id = 3; + new_size = pcie3_mem; + } else { + continue; + } + + printf("Decreasing PCIe MEM %d size from ", pcie_id); + print_size(size, " to "); + print_size(new_size, "\n"); + idx = i + pci_cells + cpu_cells; + if (size_cells == 2) { + ret = fdt_setprop_inplace_u32_partial(blob, node, + "ranges", idx, 0); + if (ret) + goto err; + idx++; + } + ret = fdt_setprop_inplace_u32_partial(blob, node, + "ranges", idx, SZ_2M); + if (ret) + goto err; + } + + /* Recursively fix also all subnodes */ + fdt_for_each_subnode(subnode, blob, node) + fdt_fixup_pcie_mem_size(blob, subnode, pcie1_mem, pcie2_mem, pcie3_mem); + + return; + +err: + printf("Error: Cannot update \"ranges\" property\n"); +} + +static inline phys_size_t get_law_size(phys_addr_t addr, enum law_trgt_if id) +{ + struct law_entry e; + + e = find_law_by_addr_id(addr, id); + if (e.index < 0) + return 0; + + return 2ULL << e.size; +} + +void ft_memory_setup(void *blob, struct bd_info *bd) +{ + phys_size_t pcie1_mem, pcie2_mem, pcie3_mem; + u64 start[CONFIG_NR_DRAM_BANKS]; + u64 size[CONFIG_NR_DRAM_BANKS]; + int count; + int node; + + if (!env_get("bootm_low") && !env_get("bootm_size")) { + for (count = 0; count < CONFIG_NR_DRAM_BANKS; count++) { + start[count] = gd->bd->bi_dram[count].start; + size[count] = gd->bd->bi_dram[count].size; + if (!size[count]) + break; + } + fdt_fixup_memory_banks(blob, start, size, count); + } else { + fdt_fixup_memory(blob, env_get_bootm_low(), env_get_bootm_size()); + } + + pcie1_mem = get_law_size(CFG_SYS_PCIE1_MEM_PHYS, LAW_TRGT_IF_PCIE_1); + pcie2_mem = get_law_size(CFG_SYS_PCIE2_MEM_PHYS, LAW_TRGT_IF_PCIE_2); + pcie3_mem = get_law_size(CFG_SYS_PCIE3_MEM_PHYS, LAW_TRGT_IF_PCIE_3); + + fdt_for_each_node_by_compatible(node, blob, -1, "fsl,mpc8548-pcie") + fdt_fixup_pcie_mem_size(blob, node, pcie1_mem, pcie2_mem, pcie3_mem); +} + +static int detect_model_serial(const char **model, char serial[17]) +{ + u32 version_num; + int err; + + err = turris_atsha_otp_get_serial_number(serial); + if (err) { + *model = "Turris 1.x"; + strcpy(serial, "unknown"); + return -1; + } + + version_num = simple_strtoull(serial, NULL, 16) >> 32; + + /* + * Turris 1.0 boards (RTRS01) have version_num 0x5. + * Turris 1.1 boards (RTRS02) have version_num 0x6, 0x7, 0x8 and 0x9. + */ + if (be32_to_cpu(version_num) >= 0x6) { + *model = "Turris 1.1 (RTRS02)"; + return 1; + } + + *model = "Turris 1.0 (RTRS01)"; + return 0; +} + +void p1_p2_rdb_pc_fix_fdt_model(void *blob) +{ + const char *model; + char serial[17]; + int len; + int off; + int rev; + char c; + + rev = detect_model_serial(&model, serial); + if (rev < 0) + return; + + /* Turris 1.0 boards (RTRS01) do not have third PCIe controller */ + if (rev == 0) { + off = fdt_path_offset(blob, "pci2"); + if (off >= 0) + fdt_del_node(blob, off); + } + + /* Fix model string only in case it is generic "Turris 1.x" */ + model = fdt_getprop(blob, 0, "model", &len); + if (len < sizeof("Turris 1.x") - 1) + return; + if (memcmp(model, "Turris 1.x", sizeof("Turris 1.x") - 1) != 0) + return; + + c = '0' + rev; + fdt_setprop_inplace_namelen_partial(blob, 0, "model", sizeof("model") - 1, + sizeof("Turris 1.") - 1, &c, 1); +} + +int misc_init_r(void) +{ + turris_atsha_otp_init_mac_addresses(0); + turris_atsha_otp_init_serial_number(); + return 0; +} + +/* This comes from ../../freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c */ +extern int checkboard_p1_p2(void); + +int checkboard(void) +{ + const char *model; + char serial[17]; + void *reg; + + /* Disable software control of all Turris LEDs */ + out_8(TURRIS_CPLD_LED_SW_OVERRIDE_REG, 0x00); + + /* Reset colors of all Turris LEDs to their default values */ + for (reg = TURRIS_CPLD_LED_BRIGHTNESS_REG_FIRST; + reg <= TURRIS_CPLD_LED_BRIGHTNESS_REG_LAST; + reg++) + out_8(reg, 0xff); + + detect_model_serial(&model, serial); + printf("Revision: %s\n", model); + printf("Serial Number: %s\n", serial); + + return checkboard_p1_p2(); +} + +static void handle_reset_button(void) +{ + const char * const vars[1] = { "bootcmd_rescue", }; + u8 reset_time_raw, reset_time; + + /* + * Ensure that bootcmd_rescue has always stock value, so that running + * run bootcmd_rescue + * always works correctly. + */ + env_set_default_vars(1, (char * const *)vars, 0); + + reset_time_raw = in_8(TURRIS_CPLD_RESET_TIME_CYCLE_REG); + if (reset_time_raw & TURRIS_CPLD_RESET_TIME_CYCLE_6S) + reset_time = 6; + else if (reset_time_raw & TURRIS_CPLD_RESET_TIME_CYCLE_5S) + reset_time = 5; + else if (reset_time_raw & TURRIS_CPLD_RESET_TIME_CYCLE_4S) + reset_time = 4; + else if (reset_time_raw & TURRIS_CPLD_RESET_TIME_CYCLE_3S) + reset_time = 3; + else if (reset_time_raw & TURRIS_CPLD_RESET_TIME_CYCLE_2S) + reset_time = 2; + else if (reset_time_raw & TURRIS_CPLD_RESET_TIME_CYCLE_1S) + reset_time = 1; + else + reset_time = 0; + + env_set_ulong("turris_reset", reset_time); + + /* Check if red reset button was hold for at least six seconds. */ + if (reset_time >= 6) { + const char * const vars[3] = { + "bootcmd", + "bootdelay", + "distro_bootcmd", + }; + + /* + * Set the above envs to their default values, in case the user + * managed to break them. + */ + env_set_default_vars(3, (char * const *)vars, 0); + + /* Ensure bootcmd_rescue is used by distroboot */ + env_set("boot_targets", "rescue"); + + printf("RESET button was hold for >= 6s, overwriting boot_targets for system rescue!\n"); + } else { + /* + * In case the user somehow managed to save environment with + * boot_targets=rescue, reset boot_targets to default value. + * This could happen in subsequent commands if bootcmd_rescue + * failed. + */ + if (!strcmp(env_get("boot_targets"), "rescue")) { + const char * const vars[1] = { + "boot_targets", + }; + + env_set_default_vars(1, (char * const *)vars, 0); + } + + if (reset_time > 0) + printf("RESET button was hold for %us.\n", reset_time); + } +} + +static int recalculate_pcie_mem_law(phys_addr_t addr, + pci_size_t pcie_size, + enum law_trgt_if id, + phys_addr_t *free_start, + phys_size_t *free_size) +{ + phys_size_t cur_size, new_size; + struct law_entry e; + + e = find_law_by_addr_id(addr, id); + if (e.index < 0) { + *free_start = *free_size = 0; + return 0; + } + + cur_size = 2ULL << e.size; + new_size = roundup_pow_of_two(pcie_size); + + if (new_size >= cur_size) { + *free_start = *free_size = 0; + return 0; + } + + set_law(e.index, addr, law_size_bits(new_size), id); + + *free_start = addr + new_size; + *free_size = cur_size - new_size; + return 1; +} + +static void recalculate_used_pcie_mem(void) +{ + phys_addr_t free_start1, free_start2; + phys_size_t free_size1, free_size2; + pci_size_t pcie1_used_mem_size; + pci_size_t pcie2_used_mem_size; + struct law_entry e; + phys_size_t size; + ofnode node; + int i; + + size = gd->ram_size; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + size -= gd->bd->bi_dram[i].size; + + if (size == 0) + return; + + e = find_law_by_addr_id(CFG_SYS_PCIE3_MEM_PHYS, LAW_TRGT_IF_PCIE_3); + if (e.index < 0 && gd->bd->bi_dram[1].size > 0) { + /* + * If there is no LAW for PCIe 3 MEM then 3rd PCIe controller + * is inactive, which is the case for Turris 1.0 boards. So + * use its reserved 2 MB physical space for DDR RAM. + */ + unsigned int bank_size = SZ_2M; + + if (bank_size > size) + bank_size = size; + printf("Reserving unused "); + print_size(bank_size, ""); + printf(" of PCIe 3 MEM for DDR RAM\n"); + gd->bd->bi_dram[1].start -= bank_size; + gd->bd->bi_dram[1].size += bank_size; + size -= bank_size; + if (size == 0) + return; + } + +#ifdef CONFIG_PCI_PNP + /* + * Detect how much space of PCIe MEM is needed for both PCIe 1 and + * PCIe 2 controllers with all connected cards on whole hierarchy. + * This works only when U-Boot has enabled PCI PNP code which scans + * all PCI devices and calculate required memory for every PCI BAR of + * every PCI device. + */ + ofnode_for_each_compatible_node(node, "fsl,mpc8548-pcie") { + struct udevice *dev; + + if (device_find_global_by_ofnode(node, &dev)) + continue; + + struct pci_controller *hose = dev_get_uclass_priv(pci_get_controller(dev)); + + if (!hose) + continue; + if (!hose->pci_mem) + continue; + if (!hose->pci_mem->size) + continue; + + pci_size_t used_mem_size = hose->pci_mem->bus_lower - hose->pci_mem->bus_start; + + if (hose->pci_mem->phys_start == CFG_SYS_PCIE1_MEM_PHYS) + pcie1_used_mem_size = used_mem_size; + else if (hose->pci_mem->phys_start == CFG_SYS_PCIE2_MEM_PHYS) + pcie2_used_mem_size = used_mem_size; + } + + if (pcie1_used_mem_size == 0 && pcie2_used_mem_size == 0) + return; + + e = find_law_by_addr_id(0xc0000000, LAW_TRGT_IF_DDR_1); + if (e.index < 0) { + printf("Error: Cannot setup DDR LAW for more than 3 GB of RAM\n"); + return; + } + + /* + * Increase additional overlapping 1 GB DDR LAW from 1GB to 2GB by + * moving its left side from 0xc0000000 to 0x80000000. After this + * change it would overlap with PCIe MEM 1 and 2 LAWs. + */ + set_law(e.index, 0x80000000, LAW_SIZE_2G, LAW_TRGT_IF_DDR_1); + + i = 3; + static_assert(CONFIG_NR_DRAM_BANKS >= 3 + 2); + + if (recalculate_pcie_mem_law(CFG_SYS_PCIE2_MEM_PHYS, + pcie2_used_mem_size, LAW_TRGT_IF_PCIE_2, + &free_start2, &free_size2)) { + printf("Reserving unused "); + print_size(free_size2, ""); + printf(" of PCIe 2 MEM for DDR RAM\n"); + gd->bd->bi_dram[i].start = free_start2; + gd->bd->bi_dram[i].size = min(size, free_size2); + size -= gd->bd->bi_dram[i].start; + i++; + if (size == 0) + return; + } + + if (recalculate_pcie_mem_law(CFG_SYS_PCIE1_MEM_PHYS, + pcie1_used_mem_size, LAW_TRGT_IF_PCIE_1, + &free_start1, &free_size1)) { + printf("Reserving unused "); + print_size(free_size1, ""); + printf(" of PCIe 1 MEM for DDR RAM\n"); + gd->bd->bi_dram[i].start = free_start1; + gd->bd->bi_dram[i].size = min(size, free_size1); + size -= gd->bd->bi_dram[i].size; + i++; + if (size == 0) + return; + } +#endif +} + +int last_stage_init(void) +{ + handle_reset_button(); + recalculate_used_pcie_mem(); + return 0; +} + +int get_serial_clock(void) +{ + return get_bus_freq(0); +} diff --git a/board/Synology/ds414/ds414.c b/board/Synology/ds414/ds414.c index 8db810ad3e..1a4cea87e1 100644 --- a/board/Synology/ds414/ds414.c +++ b/board/Synology/ds414/ds414.c @@ -180,6 +180,13 @@ int board_init(void) return 0; } +int board_late_init(void) +{ + /* Do late init to ensure successful enumeration of XHCI devices */ + pci_init(); + return 0; +} + int misc_init_r(void) { if (!env_get("ethaddr")) { @@ -188,10 +195,3 @@ int misc_init_r(void) } return 0; } - -int checkboard(void) -{ - puts("Board: DS414\n"); - - return 0; -} diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 399ff72072..a19a98dd0d 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -224,7 +224,7 @@ int board_early_init_f(void) #define BOARD_NAME "P2020RDB-PC" #endif -int checkboard(void) +int checkboard_p1_p2(void) { struct cpld_data *cpld_data = (void *)(CFG_SYS_CPLD_BASE); ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR); @@ -317,6 +317,13 @@ int checkboard(void) return 0; } +#if !defined(CONFIG_TARGET_TURRIS_1X) +int checkboard(void) +{ + return checkboard_p1_p2(); +} +#endif + int board_early_init_r(void) { const unsigned int flashbase = CFG_SYS_FLASH_BASE; @@ -364,6 +371,8 @@ int board_early_init_r(void) return 0; } +__weak void p1_p2_rdb_pc_fix_fdt_model(void *blob) {} + #if defined(CONFIG_OF_BOARD_SETUP) || defined(CONFIG_OF_BOARD_FIXUP) static void fix_max6370_watchdog(void *blob) { @@ -407,6 +416,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) sizeof("okay"), 0); #endif + p1_p2_rdb_pc_fix_fdt_model(blob); fix_max6370_watchdog(blob); #if defined(CONFIG_HAS_FSL_DR_USB) @@ -464,6 +474,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) #ifdef CONFIG_OF_BOARD_FIXUP int board_fix_fdt(void *blob) { + p1_p2_rdb_pc_fix_fdt_model(blob); fix_max6370_watchdog(blob); return 0; } diff --git a/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig b/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig new file mode 100644 index 0000000000..2d8acbf62f --- /dev/null +++ b/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig @@ -0,0 +1,12 @@ +if TARGET_NANOPI_R6C_RK3588S + +config SYS_BOARD + default "nanopi-r6c-rk3588s" + +config SYS_VENDOR + default "friendlyelec" + +config SYS_CONFIG_NAME + default "nanopi-r6c-rk3588s" + +endif diff --git a/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS b/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS new file mode 100644 index 0000000000..18d0bd1287 --- /dev/null +++ b/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS @@ -0,0 +1,7 @@ +NANOPI-R6C +M: Sebastian Kropatsch <seb-dev@mail.de> +S: Maintained +F: arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi +F: board/friendlyelec/nanopi-r6c-rk3588s +F: configs/nanopi-r6c-rk3588s_defconfig +F: include/configs/nanopi-r6c-rk3588s.h diff --git a/board/friendlyelec/nanopi-r6s-rk3588s/Kconfig b/board/friendlyelec/nanopi-r6s-rk3588s/Kconfig new file mode 100644 index 0000000000..4d579816b1 --- /dev/null +++ b/board/friendlyelec/nanopi-r6s-rk3588s/Kconfig @@ -0,0 +1,12 @@ +if TARGET_NANOPI_R6S_RK3588S + +config SYS_BOARD + default "nanopi-r6s-rk3588s" + +config SYS_VENDOR + default "friendlyelec" + +config SYS_CONFIG_NAME + default "nanopi-r6s-rk3588s" + +endif diff --git a/board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS b/board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS new file mode 100644 index 0000000000..76288b4320 --- /dev/null +++ b/board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS @@ -0,0 +1,7 @@ +NANOPI-R6S +M: Sebastian Kropatsch <seb-dev@mail.de> +S: Maintained +F: arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi +F: board/friendlyelec/nanopi-r6s-rk3588s +F: configs/nanopi-r6s-rk3588s_defconfig +F: include/configs/nanopi-r6s-rk3588s.h diff --git a/board/logicpd/am3517evm/am3517evm.env b/board/logicpd/am3517evm/am3517evm.env new file mode 100644 index 0000000000..77bb31c416 --- /dev/null +++ b/board/logicpd/am3517evm/am3517evm.env @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +console=ttyS2,115200n8 +fdtfile=am3517-evm.dtb +fdtaddr=0x82C00000 +vram=16M +bootenv=uEnv.txt +mmcdev=0 +mmcpart=1 +mmcroot=/dev/mmcblk0p2 rw +mmcrootfstype=ext4 rootwait fixrtc +mmcargs=setenv bootargs console=${console} ${mtdparts} ${optargs} root=${mmcroot} rootfstype=${mmcrootfstype} ${cmdline} +nandargs=setenv bootargs console=${console} ${mtdparts} ${optargs} root=ubi0:rootfs rw ubi.mtd=rootfs rootfstype=ubifs rootwait ${cmdline} +loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv} +importbootenv=echo "Importing environment from mmc ..."; env import -t ${loadaddr} ${filesize} +bootscript=echo "Running bootscript from mmc ..."; source ${loadaddr} +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile} +mmcboot=echo "Booting from mmc ..."; run mmcargs; bootz ${loadaddr} - ${fdtaddr} +nandboot=echo "Booting from nand ..."; run nandargs; nand read ${loadaddr} 2a0000 800000; nand read ${fdtaddr} aa0000 80000; bootm ${loadaddr} - ${fdtaddr} diff --git a/board/phytec/phycore_am62x/phycore_am62x.env b/board/phytec/phycore_am62x/phycore_am62x.env index 42db26a599..2d6475d408 100644 --- a/board/phytec/phycore_am62x/phycore_am62x.env +++ b/board/phytec/phycore_am62x/phycore_am62x.env @@ -13,7 +13,8 @@ mmcdev=1 mmcroot=2 mmcpart=1 console=ttyS2,115200n8 -mmcargs=setenv bootargs console=${console} earlycon=ns16550a,mmio32,0x02800000 +earlycon=ns16550a,mmio32,0x02800000 +mmcargs=setenv bootargs console=${console} earlycon=${earlycon} root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} Image loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile} diff --git a/board/phytec/phycore_am64x/phycore_am64x.env b/board/phytec/phycore_am64x/phycore_am64x.env index ada3a9233b..e24a958f51 100644 --- a/board/phytec/phycore_am64x/phycore_am64x.env +++ b/board/phytec/phycore_am64x/phycore_am64x.env @@ -11,7 +11,8 @@ mmcdev=1 mmcroot=2 mmcpart=1 console=ttyS2,115200n8 -mmcargs=setenv bootargs console=${console} earlycon=ns16550a,mmio32,0x02800000 +earlycon=ns16550a,mmio32,0x02800000 +mmcargs=setenv bootargs console=${console} earlycon=${earlycon} root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} Image loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile} diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index d996eb0cf6..ab5ea85cf9 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -381,7 +381,7 @@ static void set_board_info(void) snprintf(s, sizeof(s), "0x%X", revision); env_set("board_revision", s); - snprintf(s, sizeof(s), "%d", rev_scheme); + snprintf(s, sizeof(s), "%u", rev_scheme); env_set("board_rev_scheme", s); /* Can't rename this to board_rev_type since it's an ABI for scripts */ snprintf(s, sizeof(s), "0x%X", rev_type); @@ -493,10 +493,6 @@ static void get_board_revision(void) int board_init(void) { -#ifdef CONFIG_HW_WATCHDOG - hw_watchdog_init(); -#endif - get_board_revision(); gd->bd->bi_boot_params = 0x100; diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 675b72dd06..8f619e54e0 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -64,5 +64,5 @@ M: Banglang Huang <banglang.huang@foxmail.com> R: Jonas Karlman <jonas@kwiboo.se> S: Maintained F: configs/rock-pi-e-rk3328_defconfig -F: arch/arm/dts/rk3328-rock-pi-e.dts -F: arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +F: configs/rock-pi-e-v3-rk3328_defconfig +F: arch/arm/dts/rk3328-rock-pi-e* diff --git a/board/sandbox/capsule_pub_esl_good.esl b/board/sandbox/capsule_pub_esl_good.esl Binary files differdeleted file mode 100644 index f8cc272309..0000000000 --- a/board/sandbox/capsule_pub_esl_good.esl +++ /dev/null diff --git a/board/sunxi/board.c b/board/sunxi/board.c index ed86f1df5d..961cdcde74 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -515,7 +515,7 @@ int board_mmc_init(struct bd_info *bis) return 0; } -#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 +#ifdef CONFIG_SYS_MMC_ENV_DEV int mmc_get_env_dev(void) { switch (sunxi_get_boot_device()) { @@ -562,7 +562,7 @@ void sunxi_board_init(void) #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ defined CONFIG_AXP221_POWER || defined CONFIG_AXP305_POWER || \ defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER || \ - defined CONFIG_AXP313_POWER + defined CONFIG_AXP313_POWER || defined CONFIG_AXP717_POWER power_failed = axp_init(); if (IS_ENABLED(CONFIG_AXP_DISABLE_BOOT_ON_POWERON) && !power_failed) { diff --git a/board/theobroma-systems/jaguar_rk3588/MAINTAINERS b/board/theobroma-systems/jaguar_rk3588/MAINTAINERS index ab7051b427..370d0a1272 100644 --- a/board/theobroma-systems/jaguar_rk3588/MAINTAINERS +++ b/board/theobroma-systems/jaguar_rk3588/MAINTAINERS @@ -10,4 +10,4 @@ F: include/configs/jaguar_rk3588.h F: arch/arm/dts/rk3588-jaguar* F: configs/jaguar-rk3588_defconfig W: https://embedded.cherry.de/product/jaguar-sbc-rk3588/ -T: git git://git.embedded.cherry.de/jaguar-u-boot.git +T: git https://git.embedded.cherry.de/jaguar-u-boot.git diff --git a/board/theobroma-systems/lion_rk3368/Kconfig b/board/theobroma-systems/lion_rk3368/Kconfig deleted file mode 100644 index 537a2e7d9a..0000000000 --- a/board/theobroma-systems/lion_rk3368/Kconfig +++ /dev/null @@ -1,18 +0,0 @@ -if TARGET_LION_RK3368 - -config SYS_BOARD - default "lion_rk3368" - -config SYS_VENDOR - default "theobroma-systems" - -config SYS_CONFIG_NAME - default "lion_rk3368" - -config ENV_SIZE - default 0x2000 - -config ENV_OFFSET - default 0x3c000 if ENV_IS_IN_SPI_FLASH - -endif diff --git a/board/theobroma-systems/lion_rk3368/MAINTAINERS b/board/theobroma-systems/lion_rk3368/MAINTAINERS deleted file mode 100644 index ed35fee646..0000000000 --- a/board/theobroma-systems/lion_rk3368/MAINTAINERS +++ /dev/null @@ -1,10 +0,0 @@ -LION-RK3368 (RK3368-uQ7 system-on-module) -M: Quentin Schulz <quentin.schulz@cherry.de> -M: Klaus Goger <klaus.goger@cherry.de> -S: Maintained -F: board/theobroma-systems/lion_rk3368 -F: include/configs/lion_rk3368.h -F: arch/arm/dts/rk3368-lion.dts -F: configs/lion-rk3368_defconfig -W: https://www.theobroma-systems.com/rk3368-uq7/tech-specs -T: git git://git.theobroma-systems.com/lion-u-boot.git diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README deleted file mode 100644 index 7488b18326..0000000000 --- a/board/theobroma-systems/lion_rk3368/README +++ /dev/null @@ -1,78 +0,0 @@ -Here is the step-by-step to boot to U-Boot on RK3368-uQ7 - -Get the Source and build ATF -============================ - - > git clone git://git.theobroma-systems.com/arm-trusted-firmware.git - > cd arm-trusted-firmware - > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3368 bl31 - > cp build/rk3368/release/bl31.bin ../u-boot/bl31-rk3368.bin - -Configure U-Boot -================ - - > cd ../u-boot - > make lion-rk3368_defconfig - -Build the TPL/SPL stage -======================= - - > make CROSS_COMPILE=aarch64-unknown-elf- - -Build the full U-Boot and a FIT image including the ATF -======================================================= - - > make CROSS_COMPILE=aarch64-unknown-elf- u-boot.itb - -Flash the image -=============== - -Copy the SPL to offset 32k and the FIT image containing the payloads -(U-Boot proper, ATF, devicetree) to offset 256k card. - -SD-Card -------- - - > dd if=idbloader.img of=/dev/sdb seek=64 - > dd if=u-boot.itb of=/dev/sdb seek=512 - -eMMC ----- - -rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with -help of the Rockchip loader binary. - - > git clone https://github.com/rockchip-linux/rkdeveloptool - > cd rkdeveloptool - > autoreconf -i && && ./configure && make - > git clone https://github.com/rockchip-linux/rkbin.git - > ./rkdeveloptool db rkbin/rk33/rk3368_loader_v2.00.256.bin - > ./rkdeveloptool wl 64 ../spl.img - > ./rkdeveloptool wl 512 ../u-boot.itb - - -If everything went according to plan, you should see the following -output on UART0: - -<debug_uart> U-Boot TPL board init -Trying to boot from BOOTROM -Returning to boot ROM... -Trying to boot from MMC1 -NOTICE: BL31: v1.3(release):v1.2-1320-gbf43a443 -NOTICE: BL31: Built : 18:04:47, Jul 5 2017 - - -U-Boot 2017.07-00158-g2395e99858 (Jul 18 2017 - 21:03:31 +0200) - -Model: Theobroma Systems RK3368-uQ7 SoM -DRAM: 2 GiB -MMC: dwmmc@ff0c0000: 1, dwmmc@ff0f0000: 0 -Using default environment - -In: serial@ff180000 -Out: serial@ff180000 -Err: serial@ff180000 -Net: -Warning: ethernet@ff290000 (eth0) using random MAC address - d2:69:35:7e:d0:1e -eth0: ethernet@ff290000 -Hit any key to stop autoboot: 2 diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS index 2536e34888..1a5b78bf53 100644 --- a/board/theobroma-systems/puma_rk3399/MAINTAINERS +++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS @@ -9,4 +9,4 @@ F: include/configs/puma_rk3399.h F: arch/arm/dts/rk3399-puma* F: configs/puma-rk3399_defconfig W: https://embedded.cherry.de/product/puma-som-rk3399-q7/ -T: git git://git.embedded.cherry.de/puma-u-boot.git +T: git https://git.embedded.cherry.de/puma-u-boot.git diff --git a/board/theobroma-systems/ringneck_px30/MAINTAINERS b/board/theobroma-systems/ringneck_px30/MAINTAINERS index 2aff91f420..4d4544a2a3 100644 --- a/board/theobroma-systems/ringneck_px30/MAINTAINERS +++ b/board/theobroma-systems/ringneck_px30/MAINTAINERS @@ -9,4 +9,4 @@ F: include/configs/ringneck_px30.h F: arch/arm/dts/px30-ringneck* F: configs/ringneck-px30_defconfig W: https://embedded.cherry.de/product/ringneck-som-px30-uq7/ -T: git git://git.embedded.cherry.de/ringneck-u-boot.git +T: git https://git.embedded.cherry.de/ringneck-u-boot.git diff --git a/board/theobroma-systems/tiger_rk3588/MAINTAINERS b/board/theobroma-systems/tiger_rk3588/MAINTAINERS index e5aab4b29f..a95135616a 100644 --- a/board/theobroma-systems/tiger_rk3588/MAINTAINERS +++ b/board/theobroma-systems/tiger_rk3588/MAINTAINERS @@ -10,4 +10,4 @@ F: include/configs/tiger_rk3588.h F: arch/arm/dts/rk3588-tiger* F: configs/tiger-rk3588_defconfig W: https://embedded.cherry.de/product/tiger-som-rk3588-q7/ -T: git git://git.embedded.cherry.de/tiger-u-boot.git +T: git https://git.embedded.cherry.de/tiger-u-boot.git diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c index 1a2c46c462..7362fa4520 100644 --- a/board/ti/am62px/evm.c +++ b/board/ti/am62px/evm.c @@ -13,6 +13,7 @@ #include <env.h> #include <fdt_support.h> #include <spl.h> +#include "../common/fdt_ops.h" struct efi_fw_image fw_images[] = { { @@ -61,3 +62,11 @@ int dram_init_banksize(void) { return fdtdec_setup_memory_banksize(); } + +#if IS_ENABLED(CONFIG_BOARD_LATE_INIT) +int board_late_init(void) +{ + ti_set_fdt_env(NULL, NULL); + return 0; +} +#endif diff --git a/board/ti/j722s/evm.c b/board/ti/j722s/evm.c index 515aaa8187..29e06a5442 100644 --- a/board/ti/j722s/evm.c +++ b/board/ti/j722s/evm.c @@ -12,6 +12,7 @@ #include <env.h> #include <fdt_support.h> #include <spl.h> +#include "../common/fdt_ops.h" int board_init(void) { @@ -27,3 +28,11 @@ int dram_init_banksize(void) { return fdtdec_setup_memory_banksize(); } + +#if IS_ENABLED(CONFIG_BOARD_LATE_INIT) +int board_late_init(void) +{ + ti_set_fdt_env(NULL, NULL); + return 0; +} +#endif diff --git a/boot/Kconfig b/boot/Kconfig index ffcae840a5..95300b008c 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -816,7 +816,7 @@ choice prompt "Freescale PBL (or predecessor) load location" depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \ || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) \ - && !CMD_NAND) + && !CMD_NAND) || (TARGET_TURRIS_1X && SYS_MPC85XX_NO_RESETVEC) config SDCARD bool "Freescale PBL (or similar) is found on SD card" diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c index 1d5fd8b193..676f550ca2 100644 --- a/boot/bootmeth_cros.c +++ b/boot/bootmeth_cros.c @@ -163,7 +163,7 @@ static int scan_part(struct udevice *blk, int partnum, if (uuid_str_to_bin(info->type_guid, type.b, UUID_STR_FORMAT_GUID)) return log_msg_ret("typ", -EINVAL); - if (memcmp(&cros_kern_type, &type, sizeof(type))) + if (guidcmp(&cros_kern_type, &type)) return log_msg_ret("typ", -ENOEXEC); /* Make a buffer for the header information */ diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index 53d6cf700b..4e27842b08 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -1470,7 +1470,6 @@ static struct menu *pxe_menu_to_menu(struct pxe_menu *cfg) override_num = label->num; } - if (label_override) { if (override_num) default_num = override_num; diff --git a/cmd/ab_select.c b/cmd/ab_select.c index faeb83816e..7c178c728c 100644 --- a/cmd/ab_select.c +++ b/cmd/ab_select.c @@ -35,7 +35,6 @@ static int do_ab_select(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_FAILURE; } - ret = ab_select_slot(dev_desc, &part_info, dec_tries); if (ret < 0) { printf("Android boot failed, error %d.\n", ret); diff --git a/cmd/bootm.c b/cmd/bootm.c index 545b0c3d82..bee683d058 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -256,7 +256,6 @@ U_BOOT_CMD( #endif - /*******************************************************************/ /* iminfo - print header info for a requested image */ /*******************************************************************/ @@ -361,7 +360,6 @@ U_BOOT_CMD( ); #endif - /*******************************************************************/ /* imls - list all images found in flash */ /*******************************************************************/ diff --git a/cmd/bootstage.c b/cmd/bootstage.c index 5246924f39..c47679d69d 100644 --- a/cmd/bootstage.c +++ b/cmd/bootstage.c @@ -86,7 +86,6 @@ static int do_boostage(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_USAGE; } - U_BOOT_CMD(bootstage, 4, 1, do_boostage, "Boot stage command", " - check boot progress and timing\n" diff --git a/cmd/cache.c b/cmd/cache.c index 7a2068296e..3049f5c305 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -86,7 +86,6 @@ static int parse_argv(const char *s) return -1; } - U_BOOT_CMD( icache, 2, 1, do_icache, "enable or disable instruction cache", diff --git a/cmd/console.c b/cmd/console.c index 12fc92061a..a8133ee3fa 100644 --- a/cmd/console.c +++ b/cmd/console.c @@ -47,7 +47,6 @@ static int do_coninfo(struct cmd_tbl *cmd, int flag, int argc, return 0; } - /***************************************************/ U_BOOT_CMD( diff --git a/cmd/cramfs.c b/cmd/cramfs.c index b57e281592..baff50d1bd 100644 --- a/cmd/cramfs.c +++ b/cmd/cramfs.c @@ -6,7 +6,6 @@ * Add support for a CRAMFS located in RAM */ - /* * CRAMFS support */ @@ -32,7 +31,6 @@ # define DEBUGF(fmt, args...) #endif - #ifndef CONFIG_MTD_NOR_FLASH # define OFFSET_ADJUSTMENT 0 #else diff --git a/cmd/extension_board.c b/cmd/extension_board.c index f43bf68085..6c14d0ddeb 100644 --- a/cmd/extension_board.c +++ b/cmd/extension_board.c @@ -98,7 +98,6 @@ static int extension_scan(bool show) return extension_num; } - static int do_extension_scan(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -32,7 +32,6 @@ int do_fat_fsload(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return do_load(cmdtp, flag, argc, argv, FS_TYPE_FAT); } - U_BOOT_CMD( fatload, 7, 0, do_fat_fsload, "load binary file from a dos filesystem", diff --git a/cmd/font.c b/cmd/font.c index ebde094b0a..eb13fb12f7 100644 --- a/cmd/font.c +++ b/cmd/font.c @@ -77,7 +77,6 @@ static int do_font_size(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } - U_BOOT_LONGHELP(font, "list - list available fonts\n" "font select <name> [<size>] - select font to use\n" diff --git a/cmd/load.c b/cmd/load.c index ace1c52f90..d773a25d70 100644 --- a/cmd/load.c +++ b/cmd/load.c @@ -417,7 +417,6 @@ static int write_record(char *buf) #endif - #if defined(CONFIG_CMD_LOADB) /* * loadb command (load binary) included @@ -441,7 +440,6 @@ static void set_kerm_bin_mode(unsigned long *); static int k_recv(void); static ulong load_serial_bin(ulong offset); - static char his_eol; /* character he needs at end of packet */ static int his_pad_count; /* number of pad chars he needs */ static char his_pad_char; /* pad chars he needs */ @@ -557,7 +555,6 @@ static int do_load_serial_bin(struct cmd_tbl *cmdtp, int flag, int argc, return rcode; } - static ulong load_serial_bin(ulong offset) { int size, i; @@ -652,7 +649,6 @@ static void send_nack(int n) s1_sendpacket(a_b); } - static void (*os_data_init)(void); static void (*os_data_char)(char new_char); static int os_data_state, os_data_state_saved; @@ -693,7 +689,6 @@ static void set_kerm_bin_mode(unsigned long *addr) os_data_char = bin_data_char; } - /* k_data_* simply handles the kermit escape translations */ static int k_data_escape, k_data_escape_saved; static void k_data_init(void) @@ -1066,7 +1061,6 @@ static ulong load_serial_ymodem(ulong offset, int mode) xyzModem_stream_terminate(false, &getcxmodem); xyzModem_stream_close(&err); - flush_cache(offset, ALIGN(size, ARCH_DMA_MINALIGN)); printf("## Total Size = 0x%08x = %d Bytes\n", size, size); @@ -1141,7 +1135,6 @@ U_BOOT_CMD( * SAVES always requires LOADS support, but not vice versa */ - #if defined(CONFIG_CMD_SAVES) #ifdef CONFIG_SYS_LOADS_BAUD_CHANGE U_BOOT_CMD( @@ -1162,7 +1155,6 @@ U_BOOT_CMD( #endif /* CONFIG_CMD_SAVES */ #endif /* CONFIG_CMD_LOADS */ - #if defined(CONFIG_CMD_LOADB) U_BOOT_CMD( loadb, 3, 0, do_load_serial_bin, @@ -1316,14 +1316,12 @@ U_BOOT_CMD( "[.b, .w, .l" HELP_Q "] address [# of objects]" ); - U_BOOT_CMD( mm, 2, 1, do_mem_mm, "memory modify (auto-incrementing address)", "[.b, .w, .l" HELP_Q "] address" ); - U_BOOT_CMD( nm, 2, 1, do_mem_nm, "memory modify (constant address)", @@ -42,7 +42,6 @@ cpu_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 1; } - if (argc == 3) { if (strncmp(argv[2], "reset", 5) == 0) cpu_reset(cpuid); diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c index f57d84dbb3..a021b2d198 100644 --- a/cmd/mtdparts.c +++ b/cmd/mtdparts.c @@ -291,7 +291,6 @@ static void current_save(void) index_partitions(); } - /** * Produce a mtd_info given a type and num. * @@ -401,7 +400,6 @@ static int part_validate_eraseblock(struct mtdids *id, struct part_info *part) return 0; } - /** * Performs sanity check for supplied partition. Offset and size are * verified to be within valid range. Partition type is checked and @@ -1128,7 +1126,6 @@ static int generate_mtdparts(char *buf, u32 buflen) p += len; maxlen -= len; - /* add offset only when there is a gap between * partitions */ if ((!prev_part && (offset != 0)) || @@ -1709,7 +1706,6 @@ static int parse_mtdids(const char *const ids) return 0; } - /** * Parse and initialize global mtdids mapping and create global * device/partition list. @@ -97,7 +97,6 @@ U_BOOT_CMD( ); #endif - #ifdef CONFIG_CMD_RARP int do_rarpb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -66,7 +66,6 @@ static int call_bootm(int argc, char *const argv[], const char *subcommand[]) bootm_argv[2] = argv[0]; /* kernel addr */ } - /* * - do the work - * exec subcommands of do_bootm to init the images diff --git a/cmd/terminal.c b/cmd/terminal.c index 369a755e0f..d803bc6c89 100644 --- a/cmd/terminal.c +++ b/cmd/terminal.c @@ -66,7 +66,6 @@ int do_terminal(struct cmd_tbl *cmd, int flag, int argc, char *const argv[]) return 0; } - /***************************************************/ U_BOOT_CMD( diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c index 9c8b1c7438..af83d78c3f 100644 --- a/cmd/tpm_test.c +++ b/cmd/tpm_test.c @@ -424,7 +424,6 @@ static int test_startup(struct udevice *dev) } \ } while (0) - static int test_timing(struct udevice *dev) { uint8_t in[20], out[20]; diff --git a/cmd/ubifs.c b/cmd/ubifs.c index 8fd39032ec..22e95db8ca 100644 --- a/cmd/ubifs.c +++ b/cmd/ubifs.c @@ -4,7 +4,6 @@ * Stefan Roese, DENX Software Engineering, sr@denx.de. */ - /* * UBIFS command support */ diff --git a/cmd/universe.c b/cmd/universe.c index d1a712829d..1445d5301f 100644 --- a/cmd/universe.c +++ b/cmd/universe.c @@ -14,7 +14,6 @@ #define PCI_VENDOR PCI_VENDOR_ID_TUNDRA #define PCI_DEVICE PCI_DEVICE_ID_TUNDRA_CA91C042 - typedef struct _UNI_DEV UNI_DEV; struct _UNI_DEV { @@ -26,7 +25,6 @@ struct _UNI_DEV { static UNI_DEV *dev; - int universe_init(void) { int j, result; @@ -112,7 +110,6 @@ int universe_init(void) return result; } - /* * Create pci slave window (access: pci -> vme) */ @@ -209,7 +206,6 @@ int universe_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, int si return -result; } - /* * Create vme slave window (access: vme -> pci) */ @@ -294,7 +290,6 @@ int universe_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, int si return -result; } - /* * Tundra Universe configuration */ @@ -342,7 +337,6 @@ int do_universe(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 0; } - U_BOOT_CMD( universe, 8, 1, do_universe, "initialize and configure Turndra Universe", @@ -549,7 +549,6 @@ static int usb_test(struct usb_device *dev, int port, char* arg) } } - /****************************************************************************** * usb boot command intepreter. Derived from diskboot */ @@ -737,7 +736,6 @@ U_BOOT_CMD( #endif /* CONFIG_USB_STORAGE */ ); - #ifdef CONFIG_USB_STORAGE U_BOOT_CMD( usbboot, 3, 1, do_usbboot, diff --git a/cmd/ximg.c b/cmd/ximg.c index c79e8a0786..1c96f5a0a1 100644 --- a/cmd/ximg.c +++ b/cmd/ximg.c @@ -7,7 +7,6 @@ * Kai-Uwe Bloem, Auerswald GmbH & Co KG, <linux-development@auerswald.de> */ - /* * Multi Image extract */ diff --git a/cmd/yaffs2.c b/cmd/yaffs2.c index d0724d9bea..daa44abeb7 100644 --- a/cmd/yaffs2.c +++ b/cmd/yaffs2.c @@ -13,7 +13,6 @@ * ... */ - #include <config.h> #include <command.h> @@ -119,7 +119,6 @@ static int do_zfs_load(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } - int zfs_print(const char *entry, const struct zfs_dirhook_info *data) { printf("%s %s\n", @@ -128,7 +127,6 @@ int zfs_print(const char *entry, const struct zfs_dirhook_info *data) return 0; /* 0 continue, 1 stop */ } - static int do_zfs_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -157,7 +155,6 @@ static int do_zfs_ls(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } - U_BOOT_CMD(zfsls, 4, 1, do_zfs_ls, "list files in a directory (default /)", "<interface> <dev[:part]> [directory]\n" diff --git a/common/bloblist.c b/common/bloblist.c index 11d6422b69..2008ab4d25 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -576,7 +576,16 @@ int bloblist_maybe_init(void) int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig) { - if (rzero || rsig != (BLOBLIST_MAGIC | BLOBLIST_REGCONV_VER) || + ulong version = BLOBLIST_REGCONV_VER; + ulong sigval; + + sigval = (IS_ENABLED(CONFIG_64BIT)) ? + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_64) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_64)) : + ((BLOBLIST_MAGIC & ((1UL << BLOBLIST_REGCONV_SHIFT_32) - 1)) | + ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_32)); + + if (rzero || rsig != sigval || rfdt != (ulong)bloblist_find(BLOBLISTT_CONTROL_FDT, 0)) { gd->bloblist = NULL; /* Reset the gd bloblist pointer */ return -EIO; diff --git a/common/board_f.c b/common/board_f.c index 212ffb3090..22c180b218 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -949,7 +949,7 @@ static const init_fnc_t init_sequence_f[] = { * - board info struct */ setup_dest_addr, -#ifdef CONFIG_OF_BOARD_FIXUP +#if defined(CONFIG_OF_BOARD_FIXUP) && !defined(CONFIG_OF_INITIAL_DTB_READONLY) fix_fdt, #endif #ifdef CFG_PRAM @@ -965,6 +965,10 @@ static const init_fnc_t init_sequence_f[] = { reserve_board, reserve_global_data, reserve_fdt, +#if defined(CONFIG_OF_BOARD_FIXUP) && defined(CONFIG_OF_INITIAL_DTB_READONLY) + reloc_fdt, + fix_fdt, +#endif reserve_bootstage, reserve_bloblist, reserve_arch, @@ -975,7 +979,9 @@ static const init_fnc_t init_sequence_f[] = { setup_bdinfo, display_new_sp, INIT_FUNC_WATCHDOG_RESET +#if !defined(CONFIG_OF_BOARD_FIXUP) || !defined(CONFIG_OF_INITIAL_DTB_READONLY) reloc_fdt, +#endif reloc_bootstage, reloc_bloblist, setup_reloc, diff --git a/common/bootstage.c b/common/bootstage.c index fb6befcbc4..df83eb684c 100644 --- a/common/bootstage.c +++ b/common/bootstage.c @@ -3,7 +3,6 @@ * Copyright (c) 2011, Google Inc. All rights reserved. */ - /* * This module records the progress of boot and arbitrary commands, and * permits accurate timestamping of each. diff --git a/common/cli_hush.c b/common/cli_hush.c index 96a98209b9..a6a8edce1f 100644 --- a/common/cli_hush.c +++ b/common/cli_hush.c @@ -732,7 +732,6 @@ static int builtin_jobs(struct child_prog *child) return EXIT_SUCCESS; } - /* built-in 'pwd' handler */ static int builtin_pwd(struct child_prog *dummy) { @@ -784,7 +783,6 @@ static int builtin_set(struct child_prog *child) return EXIT_SUCCESS; } - /* Built-in 'shift' handler */ static int builtin_shift(struct child_prog *child) { @@ -1732,7 +1730,6 @@ static int run_pipe_real(struct pipe *pi) pseudo_exec(child); } - /* put our child in the process group whose leader is the first process in this pipe */ if (pi->pgrp < 0) { @@ -3409,7 +3406,6 @@ int hush_main(int argc, char * const *argv) last_return_code=EXIT_SUCCESS; - if (argv[0] && argv[0][0] == '-') { debug_printf("\nsourcing /etc/profile\n"); if ((input = fopen("/etc/profile", "r")) != NULL) { diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c index ca40bbb2cd..7874b399d1 100644 --- a/common/cli_hush_upstream.c +++ b/common/cli_hush_upstream.c @@ -392,7 +392,6 @@ #define BASH_TEST2 (ENABLE_HUSH_BASH_COMPAT && ENABLE_HUSH_TEST) #define BASH_READ_D ENABLE_HUSH_BASH_COMPAT - /* Build knobs */ #define LEAK_HUNTING 0 #define BUILD_AS_NOMMU 0 @@ -413,7 +412,6 @@ */ #define ENABLE_HUSH_DOLLAR_OPS 1 - #if BUILD_AS_NOMMU # undef BB_MMU # undef USE_FOR_NOMMU @@ -519,7 +517,6 @@ typedef struct nommu_save_t { } nommu_save_t; #endif - enum { RES_NONE = 0, #if ENABLE_HUSH_IF @@ -829,7 +826,6 @@ struct function { }; #endif - /* set -/+o OPT support. (TODO: make it optional) * bash supports the following opts: * allexport off @@ -1118,7 +1114,6 @@ struct globals *ptr_to_globals; } while (0) #endif /* !__U_BOOT__ */ - #ifndef __U_BOOT__ /* Function prototypes for builtins */ static int builtin_cd(char **argv) FAST_FUNC; @@ -1416,7 +1411,6 @@ static void debug_print_strings(const char *prefix, char **vv) # define debug_print_strings(prefix, vv) ((void)0) #endif - /* Leak hunting. Use hush_leaktool.sh for post-processing. */ #if LEAK_HUNTING @@ -1449,7 +1443,6 @@ static void xxfree(void *ptr) # define free(p) xxfree(p) #endif - /* Syntax and runtime errors. They always abort scripts. * In interactive use they usually discard unparsed and/or unexecuted commands * and return to the prompt. @@ -1689,7 +1682,6 @@ static int xdup_CLOEXEC_and_close(int fd, int avoid_fd) return newfd; } - /* Manipulating HFILEs */ static HFILE *hfopen(const char *name) { @@ -1882,7 +1874,6 @@ static void restore_G_args(save_arg_t *sv, char **argv) } #endif /* !__U_BOOT__ */ - #ifndef __U_BOOT__ /* Basic theory of signal handling in shell * ======================================== @@ -2331,7 +2322,6 @@ static int check_and_run_traps(void) return last_sig; } - static const char *get_cwd(int force) { if (force || G.cwd == NULL) { @@ -2653,7 +2643,6 @@ static int unset_local_var(const char *name) } #endif - #ifndef __U_BOOT__ /* * Helpers for "var1=val1 var2=val2 cmd" feature @@ -2728,7 +2717,6 @@ static void set_vars_and_save_old(char **strings) free(strings); } - /* * Unicode helper */ @@ -3236,7 +3224,6 @@ static void setup_string_in_str(struct in_str *i, const char *s) i->p = s; } - /* * o_string support */ @@ -3997,7 +3984,6 @@ static void free_pipe_list(struct pipe *pi) } } - /*** Parsing routines ***/ #ifndef debug_print_tree @@ -4648,7 +4634,6 @@ static int done_word(struct parse_context *ctx) return 0; } - #ifndef __U_BOOT__ /* Peek ahead in the input to find out if we have a "&n" construct, * as in "2>&1", that represents duplicating a file descriptor. @@ -4958,7 +4943,6 @@ static int fetch_heredocs(o_string *as_string, struct pipe *pi, int heredoc_cnt, return heredoc_cnt; } - static int run_list(struct pipe *pi); #if BB_MMU #define parse_stream(pstring, heredoc_cnt_ptr, input, end_trigger) \ @@ -5175,7 +5159,6 @@ static int add_till_double_quote(o_string *dest, struct in_str *input) } } - /* Process `cmd` - copy contents until "`" is seen. Complicated by * \` quoting. * "Within the backquoted style of command substitution, backslash @@ -6477,7 +6460,6 @@ static struct pipe *parse_stream(char **pstring, } } - /*** Execution routines ***/ /* Expansion can recurse, need forward decls: */ @@ -7778,7 +7760,6 @@ static char **expand_assignments(char **argv, int count) return p; } - static void switch_off_special_sigs(unsigned mask) { unsigned sig = 0; @@ -8297,7 +8278,6 @@ static int process_command_subs(o_string *dest, const char *s) } #endif /* ENABLE_HUSH_TICK */ - static void setup_heredoc(struct redir_struct *redir) { struct fd_pair pair; @@ -9006,7 +8986,6 @@ static int run_function(const struct function *funcp, char **argv) } #endif /* ENABLE_HUSH_FUNCTIONS */ - #ifndef __U_BOOT__ #if BB_MMU #define exec_builtin(to_free, x, argv) \ @@ -9042,7 +9021,6 @@ static void exec_builtin(char ***to_free, } #endif /* !__U_BOOT__ */ - #ifndef __U_BOOT__ static void execvp_or_die(char **argv) NORETURN; static void execvp_or_die(char **argv) @@ -10839,7 +10817,6 @@ static int run_and_free_list(struct pipe *pi) return rcode; } - #ifndef __U_BOOT__ static void install_sighandlers(unsigned mask) { @@ -11524,8 +11501,6 @@ int hush_main(int argc, char **argv) hush_exit(G.last_exitcode); } - - /* * Built-ins */ @@ -13004,7 +12979,6 @@ static int FAST_FUNC builtin_memleak(char **argv UNUSED_PARAM) if (l < (unsigned long)p) l = (unsigned long)p; free(p); - # if 0 /* debug */ { struct mallinfo mi = mallinfo(); diff --git a/common/dlmalloc.c b/common/dlmalloc.c index 9549c59f35..62e8557daa 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -53,7 +53,6 @@ static inline void MALLOC_COPY(void *dest, const void *src, size_t sz) { memcpy( Thanks to Martin Fong and others for supplying this. */ - #ifdef WIN32 #define AlignPage(add) (((add) + (malloc_getpagesize-1)) & \ @@ -155,7 +154,6 @@ void* findRegion (void* start_address, unsigned long size) } - void* wsbrk (long size) { void* tmp; @@ -236,13 +234,10 @@ gAllocatedSize)) #endif - - /* Type declarations */ - struct malloc_chunk { INTERNAL_SIZE_T prev_size; /* Size of previous chunk (if free). */ @@ -270,7 +265,6 @@ typedef struct malloc_chunk* mchunkptr; An allocated chunk looks like this: - chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Size of previous chunk, if allocated | | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ @@ -284,7 +278,6 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Size of chunk | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - Where "chunk" is the front of the chunk for the purpose of most of the malloc code, but "mem" is the pointer that is returned to the user. "Nextchunk" is the beginning of the next contiguous chunk. @@ -401,14 +394,10 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ #define aligned_OK(m) (((unsigned long)((m)) & (MALLOC_ALIGN_MASK)) == 0) - - - /* Physical chunk operations */ - /* size field is or'ed with PREV_INUSE when previous adjacent chunk in use */ #define PREV_INUSE 0x1 @@ -421,7 +410,6 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ #define SIZE_BITS (PREV_INUSE|IS_MMAPPED) - /* Ptr to next physical malloc_chunk. */ #define next_chunk(p) ((mchunkptr)( ((char*)(p)) + ((p)->size & ~PREV_INUSE) )) @@ -431,14 +419,10 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ #define prev_chunk(p)\ ((mchunkptr)( ((char*)(p)) - ((p)->prev_size) )) - /* Treat space at ptr + offset as a chunk */ #define chunk_at_offset(p, s) ((mchunkptr)(((char*)(p)) + (s))) - - - /* Dealing with use bits */ @@ -475,9 +459,6 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ #define clear_inuse_bit_at_offset(p, s)\ (((mchunkptr)(((char*)(p)) + (s)))->size &= ~(PREV_INUSE)) - - - /* Dealing with size fields */ @@ -498,10 +479,6 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ #define set_foot(p, s) (((mchunkptr)((char*)(p) + (s)))->prev_size = (s)) - - - - /* Bins @@ -555,7 +532,6 @@ typedef struct malloc_chunk* mbinptr; #define top (av_[2]) /* The topmost chunk */ #define last_remainder (bin_at(1)) /* remainder from last split */ - /* Because top initially points to its own bin with initial zero size, thus forcing extension on the first malloc request, @@ -671,8 +647,6 @@ void mem_malloc_init(ulong start, ulong size) #define is_small_request(nb) (nb < MAX_SMALLBIN_SIZE - SMALLBIN_WIDTH) - - /* To help compensate for the large number of bins, a one-level index structure is used for bin-by-bin searching. `binblocks' is a @@ -694,10 +668,6 @@ void mem_malloc_init(ulong start, ulong size) #define mark_binblock(ii) (binblocks_w = (mbinptr)(binblocks_r | idx2binblock(ii))) #define clear_binblock(ii) (binblocks_w = (mbinptr)(binblocks_r & ~(idx2binblock(ii)))) - - - - /* Other static bookkeeping data */ /* variables holding tunable values */ @@ -770,7 +740,6 @@ static void malloc_init(void) #ifdef DEBUG - /* These routines make a number of assertions about the states of data structures that should be true at all times. If any @@ -799,7 +768,6 @@ static void do_check_chunk(p) mchunkptr p; } - #if __STD_C static void do_check_free_chunk(mchunkptr p) #else @@ -885,13 +853,11 @@ static void do_check_malloced_chunk(p, s) mchunkptr p; INTERNAL_SIZE_T s; /* ... and alignment */ assert(aligned_OK(chunk2mem(p))); - /* ... and was allocated at front of an available chunk */ assert(prev_inuse(p)); } - #define check_free_chunk(P) do_check_free_chunk(P) #define check_inuse_chunk(P) do_check_inuse_chunk(P) #define check_chunk(P) do_check_chunk(P) @@ -903,13 +869,10 @@ static void do_check_malloced_chunk(p, s) mchunkptr p; INTERNAL_SIZE_T s; #define check_malloced_chunk(P,N) #endif - - /* Macro-based internal utilities */ - /* Linking chunks in bin lists. Call these only with variables, not arbitrary expressions, as arguments. @@ -920,7 +883,6 @@ static void do_check_malloced_chunk(p, s) mchunkptr p; INTERNAL_SIZE_T s; putting it ahead of others of same size. */ - #define frontlink(P, S, IDX, BK, FD) \ { \ if (S < MAX_SMALLBIN_SIZE) \ @@ -950,7 +912,6 @@ static void do_check_malloced_chunk(p, s) mchunkptr p; INTERNAL_SIZE_T s; } \ } - /* take a chunk off a list */ #define unlink(P, BK, FD) \ @@ -974,10 +935,6 @@ static void do_check_malloced_chunk(p, s) mchunkptr p; INTERNAL_SIZE_T s; #define clear_last_remainder \ (last_remainder->fd = last_remainder->bk = last_remainder) - - - - /* Routines dealing with mmap(). */ #if HAVE_MMAP @@ -1219,12 +1176,8 @@ static void malloc_extend_top(nb) INTERNAL_SIZE_T nb; assert(((unsigned long)((char*)top + top_size) & (pagesz - 1)) == 0); } - - - /* Main public routines */ - /* Malloc Algorthim: @@ -1275,7 +1228,6 @@ static void malloc_extend_top(nb) INTERNAL_SIZE_T nb; contiguous memory. Thus, it should be safe to intersperse mallocs with other sbrk calls. - All allocations are made from the the `lowest' part of any found chunk. (The implementation invariant is that prev_inuse is always true of any allocated chunk; i.e., that each allocated @@ -1514,7 +1466,6 @@ Void_t* mALLOc_impl(bytes) size_t bytes; } } - /* Try to use top chunk */ /* Require that there be a remainder, ensuring top always exists */ @@ -1545,9 +1496,6 @@ Void_t* mALLOc_impl(bytes) size_t bytes; } - - - /* free() algorithm : @@ -1569,7 +1517,6 @@ Void_t* mALLOc_impl(bytes) size_t bytes; */ - STATIC_IF_MCHECK #if __STD_C void fREe_impl(Void_t* mem) @@ -1665,17 +1612,12 @@ void fREe_impl(mem) Void_t* mem; unlink(next, bck, fwd); } - set_head(p, sz | PREV_INUSE); set_foot(p, sz); if (!islr) frontlink(p, sz, idx, bck, fwd); } - - - - /* Realloc algorithm: @@ -1708,10 +1650,8 @@ void fREe_impl(mem) Void_t* mem; and allowing it would also allow too many other incorrect usages of realloc to be sensible. - */ - STATIC_IF_MCHECK #if __STD_C Void_t* rEALLOc_impl(Void_t* oldmem, size_t bytes) @@ -1762,7 +1702,6 @@ Void_t* rEALLOc_impl(oldmem, bytes) Void_t* oldmem; size_t bytes; newp = oldp = mem2chunk(oldmem); newsize = oldsize = chunksize(oldp); - nb = request2size(bytes); #if HAVE_MMAP @@ -1910,7 +1849,6 @@ Void_t* rEALLOc_impl(oldmem, bytes) Void_t* oldmem; size_t bytes; VALGRIND_MAKE_MEM_DEFINED(oldmem, bytes); } - split: /* split off extra room in old or expanded chunk */ if (newsize - nb >= MINSIZE) /* split off remainder */ @@ -1934,9 +1872,6 @@ Void_t* rEALLOc_impl(oldmem, bytes) Void_t* oldmem; size_t bytes; return chunk2mem(newp); } - - - /* memalign algorithm: @@ -1955,7 +1890,6 @@ Void_t* rEALLOc_impl(oldmem, bytes) Void_t* oldmem; size_t bytes; */ - STATIC_IF_MCHECK #if __STD_C Void_t* mEMALIGn_impl(size_t alignment, size_t bytes) @@ -2104,9 +2038,6 @@ Void_t* mEMALIGn_impl(alignment, bytes) size_t alignment; size_t bytes; } - - - /* valloc just invokes memalign with alignment argument equal to the page size of the system (or as near to this as can @@ -2127,7 +2058,6 @@ Void_t* vALLOc(bytes) size_t bytes; that will accommodate request */ - #if __STD_C Void_t* pvALLOc(size_t bytes) #else @@ -2156,7 +2086,6 @@ Void_t* cALLOc_impl(n, elem_size) size_t n; size_t elem_size; INTERNAL_SIZE_T sz = n * elem_size; - /* check if expand_top called, in which case don't need to clear */ #if CONFIG_IS_ENABLED(SYS_MALLOC_CLEAR_ON_INIT) #if MORECORE_CLEARS @@ -2182,7 +2111,6 @@ Void_t* cALLOc_impl(n, elem_size) size_t n; size_t elem_size; /* Two optional cases in which clearing not necessary */ - #if HAVE_MMAP if (chunk_is_mmapped(p)) return mem; #endif @@ -2223,7 +2151,6 @@ void cfree(mem) Void_t *mem; } #endif - #ifdef MCHECK_HEAP_PROTECTION #include "mcheck_core.inc.h" #if !__STD_C @@ -2308,7 +2235,6 @@ enum mcheck_status mprobe(void *__ptr) { return mcheck_mprobe(__ptr); } // mcheck API } #endif - /* Malloc_trim gives memory back to the system (via negative @@ -2388,8 +2314,6 @@ int malloc_trim(pad) size_t pad; } } - - /* malloc_usable_size: @@ -2423,9 +2347,6 @@ size_t malloc_usable_size(mem) Void_t* mem; } } - - - /* Utility to update current_mallinfo for malloc_stats and mallinfo() */ #ifdef DEBUG @@ -2468,8 +2389,6 @@ static void malloc_update_mallinfo(void) } #endif /* DEBUG */ - - /* malloc_stats: @@ -2514,9 +2433,6 @@ struct mallinfo mALLINFo(void) } #endif /* DEBUG */ - - - /* mallopt: diff --git a/common/edid.c b/common/edid.c index 865ba9daa7..48a737690d 100644 --- a/common/edid.c +++ b/common/edid.c @@ -268,7 +268,6 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing, panel_bits_per_colourp, NULL, NULL); } - /** * Snip the tailing whitespace/return of a string. * diff --git a/common/kallsyms.c b/common/kallsyms.c index 49b3897078..9159441409 100644 --- a/common/kallsyms.c +++ b/common/kallsyms.c @@ -5,7 +5,6 @@ * Licensed under the GPL-2 or later. */ - /* We need the weak marking as this symbol is provided specially */ extern const char system_map[] __attribute__((weak)); diff --git a/common/kgdb.c b/common/kgdb.c index 01a09f1762..ed2798bea2 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -446,7 +446,6 @@ handle_exception (struct pt_regs *regs) } break; - case 'k': /* kill the program, actually return to monitor */ kd.extype = KGDBEXIT_KILL; *regs = entry_regs; diff --git a/common/menu.c b/common/menu.c index e48424995b..8cc9bf06d9 100644 --- a/common/menu.c +++ b/common/menu.c @@ -398,7 +398,6 @@ struct menu *menu_create(char *title, int timeout, int prompt, } else m->title = NULL; - INIT_LIST_HEAD(&m->items); return m; diff --git a/common/update.c b/common/update.c index eb0b60a2ce..6801b49479 100644 --- a/common/update.c +++ b/common/update.c @@ -254,7 +254,6 @@ int update_tftp(ulong addr, char *interface, char *devstring) else addr = CONFIG_UPDATE_LOAD_ADDR; - if (update_load(filename, CONFIG_UPDATE_TFTP_MSEC_MAX, CONFIG_UPDATE_TFTP_CNT_MAX, addr)) { printf("Can't load update file, aborting auto-update\n"); diff --git a/common/usb.c b/common/usb.c index f5b21c883f..7a8435296c 100644 --- a/common/usb.c +++ b/common/usb.c @@ -190,7 +190,6 @@ int usb_disable_asynch(int disable) } #endif /* !CONFIG_IS_ENABLED(DM_USB) */ - /*------------------------------------------------------------------- * Message wrappers. * @@ -293,7 +292,6 @@ int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, return -EIO; } - /*------------------------------------------------------------------- * Max Packet stuff */ @@ -559,7 +557,6 @@ int usb_clear_halt(struct usb_device *dev, int pipe) return 0; } - /********************************************************************** * get_descriptor type */ @@ -768,7 +765,6 @@ static int usb_get_string(struct usb_device *dev, unsigned short langid, return result; } - static void usb_try_string_workarounds(unsigned char *buf, int *length) { int newlength, oldlength = *length; @@ -783,7 +779,6 @@ static void usb_try_string_workarounds(unsigned char *buf, int *length) } } - static int usb_string_sub(struct usb_device *dev, unsigned int langid, unsigned int index, unsigned char *buf) { @@ -818,7 +813,6 @@ static int usb_string_sub(struct usb_device *dev, unsigned int langid, return rc; } - /******************************************************************** * usb_string: * Get string index and translate it to ascii. @@ -874,7 +868,6 @@ int usb_string(struct usb_device *dev, int index, char *buf, size_t size) return err; } - /******************************************************************** * USB device handling: * the USB device are static allocated [USB_MAX_DEVICE]. @@ -1388,5 +1381,4 @@ void usb_find_usb2_hub_address_port(struct usb_device *udev, } #endif - /* EOF */ diff --git a/common/usb_hub.c b/common/usb_hub.c index 807f490bb6..6a4bcec00b 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -162,7 +162,6 @@ int usb_get_port_status(struct usb_device *dev, int port, void *data) return ret; } - static void usb_hub_power_on(struct usb_hub_device *hub) { int i; diff --git a/common/usb_storage.c b/common/usb_storage.c index a79ed2e23a..ac331f1c1b 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -31,7 +31,6 @@ * only been tested with USB memory sticks. */ - #include <blk.h> #include <bootdev.h> #include <command.h> @@ -352,7 +351,6 @@ static int usb_stor_irq(struct usb_device *dev) return 0; } - #ifdef DEBUG static void usb_show_srb(struct scsi_cmd *pccb) @@ -664,7 +662,6 @@ static int usb_stor_CB_comdat(struct scsi_cmd *srb, struct us_data *us) return result; } - static int usb_stor_CBI_get_status(struct scsi_cmd *srb, struct us_data *us) { int timeout; @@ -1116,7 +1113,6 @@ static int usb_write_10(struct scsi_cmd *srb, struct us_data *ss, return ss->transport(srb, ss); } - #ifdef CONFIG_USB_BIN_FIXUP /* * Some USB storage devices queried for SCSI identification data respond with diff --git a/common/xyzModem.c b/common/xyzModem.c index 9feb240de2..09f74a1f0c 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -62,7 +62,6 @@ static struct #define xyzModem_MAX_RETRIES_WITH_CRC 10 #define xyzModem_CAN_COUNT 3 /* Wait for 3 CAN before quitting */ - typedef int cyg_int32; static int CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c) @@ -177,7 +176,6 @@ parse_num (char *s, unsigned long *val, char **es, char *delim) return true; } - #if defined(DEBUG) && !CONFIG_IS_ENABLED(USE_TINY_PRINTF) /* * Note: this debug setup works by storing the strings in a fixed buffer diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 70498ca7fb..3236f1dd67 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SOURCE_FILE="am3517evm" CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/am3517-evm" diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig index e1c9c8535e..87005d03de 100644 --- a/configs/am62px_evm_a53_defconfig +++ b/configs/am62px_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" +CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig index 56bd56b1aa..1173e3a0f6 100644 --- a/configs/ds116_defconfig +++ b/configs/ds116_defconfig @@ -16,7 +16,7 @@ CONFIG_SF_DEFAULT_SPEED=50000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x7E0000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-synology-ds116" +CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-385-synology-ds116" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 @@ -56,6 +56,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(u-boot),7040k(kernel),64k(u-boot-env),-(data)" +CONFIG_OF_UPSTREAM=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 18c741d4f2..6391c43474 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_MVEBU=y CONFIG_SUPPORT_PASSING_ATAGS=y CONFIG_CMDLINE_TAG=y @@ -25,44 +26,41 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_IDENT_STRING="\nSynology DS214+/DS414 2/4-Bay Diskstation" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_PCI=y CONFIG_DEBUG_UART=y +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1" -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; sf read ${ramdisk_addr_r} 0x3a0000 0x430000; bootm ${loadaddr} ${ramdisk_addr_r}" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PROMPT="DS414> " CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_TIME=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y # CONFIG_MMC is not set @@ -84,4 +82,3 @@ CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_MVEBU is not set CONFIG_USB_XHCI_PCI=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index f4c2ea12ad..6d090dba30 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-evb" -CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y CONFIG_TARGET_EVB_RK3308=y diff --git a/configs/j722s_evm_a53_defconfig b/configs/j722s_evm_a53_defconfig index da0e9f4d52..1675cedb25 100644 --- a/configs/j722s_evm_a53_defconfig +++ b/configs/j722s_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" +CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig index 36bf34d97c..18006467dd 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -13,6 +13,7 @@ CONFIG_TARGET_JAGUAR_RK3588=y CONFIG_DEBUG_UART_BASE=0xfeb50000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -40,6 +41,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SF is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -88,7 +90,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y diff --git a/configs/nanopi-r6c-rk3588s_defconfig b/configs/nanopi-r6c-rk3588s_defconfig new file mode 100644 index 0000000000..f8d2d67bd3 --- /dev/null +++ b/configs/nanopi-r6c-rk3588s_defconfig @@ -0,0 +1,83 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6c" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_NANOPI_R6C_RK3588S=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6c.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_PWM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +# CONFIG_SPI_FLASH is not set +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/configs/nanopi-r6s-rk3588s_defconfig b/configs/nanopi-r6s-rk3588s_defconfig new file mode 100644 index 0000000000..f7b364655f --- /dev/null +++ b/configs/nanopi-r6s-rk3588s_defconfig @@ -0,0 +1,82 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6s" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_NANOPI_R6S_RK3588S=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_PWM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +# CONFIG_SPI_FLASH is not set +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig index 95a48aa246..39161b722b 100644 --- a/configs/phycore_am62x_a53_defconfig +++ b/configs/phycore_am62x_a53_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_ARM_SMCCC=y CONFIG_ARCH_K3=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 @@ -62,9 +63,13 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_DFU=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_RTC=y +CONFIG_CMD_SMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_MULTI_DTB_FIT=y @@ -122,6 +127,8 @@ CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_RESET_TI_SCI=y +CONFIG_DM_RTC=y +CONFIG_RTC_RV3028=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig index cf04e14537..1af72e8bb3 100644 --- a/configs/phycore_am64x_a53_defconfig +++ b/configs/phycore_am64x_a53_defconfig @@ -71,7 +71,10 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y +CONFIG_CMD_SMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_MULTI_DTB_FIT=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 5319239f98..9e5499a1fe 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -56,6 +56,8 @@ CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_ROCKCHIP_GPIO=y @@ -69,6 +71,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_ANEG_TIMEOUT=30000 CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index 2320479420..52a4c9710a 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -15,11 +15,12 @@ CONFIG_DEBUG_UART_BASE=0xFF030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -# CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTSTD_FULL=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/px30-ringneck-haikou.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -42,6 +43,7 @@ CONFIG_SPL_ATF=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set +CONFIG_CMD_BIND=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -49,7 +51,6 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y @@ -73,14 +74,13 @@ CONFIG_BUTTON=y CONFIG_BUTTON_GPIO=y CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_FASTBOOT_BUF_ADDR=0x800800 -CONFIG_FASTBOOT_BUF_SIZE=0x04000000 CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_ROCKCHIP_OTP=y +CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y @@ -112,10 +112,9 @@ CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y +# CONFIG_RSA is not set CONFIG_LZO=y CONFIG_ERRNO_STR=y # CONFIG_EFI_LOADER is not set diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 862ea4301f..b1b59d9cb5 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -4,7 +4,6 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-roc-cc" -CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y CONFIG_TARGET_ROC_RK3308_CC=y diff --git a/configs/lion-rk3368_defconfig b/configs/rock-pi-e-v3-rk3328_defconfig index 868eeaf6c8..4c6cc634bd 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/rock-pi-e-v3-rk3328_defconfig @@ -2,66 +2,48 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 +CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou" -CONFIG_SPL_TEXT_BASE=0x00000000 -CONFIG_ROCKCHIP_RK3368=y -CONFIG_TPL_LIBCOMMON_SUPPORT=y -CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL_STACK=0x188000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x400000 -CONFIG_SPL_BSS_MAX_SIZE=0x20000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -CONFIG_SPL=y -CONFIG_DEBUG_UART_BASE=0xFF180000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e-v3" +CONFIG_DM_RESET=y +CONFIG_ROCKCHIP_RK3328=y +CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -CONFIG_BOOTSTAGE=y -CONFIG_SPL_BOOTSTAGE=y -CONFIG_BOOTSTAGE_REPORT=y -CONFIG_BOOTSTAGE_FDT=y -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-lion-haikou.dtb" +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 +CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y -CONFIG_TPL=y -CONFIG_TPL_SYS_MALLOC_SIMPLE=y -CONFIG_TPL_DRIVERS_MISC=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -CONFIG_CMD_BOOTSTAGE=y +CONFIG_CMD_TIME=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_MTDPARTS=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y -CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent" +# CONFIG_OF_UPSTREAM is not set +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -70,41 +52,46 @@ CONFIG_SPL_SYSCON=y CONFIG_TPL_SYSCON=y CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_TPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_PHY_ANEG_TIMEOUT=8000 -CONFIG_PHY_MSCC=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y -CONFIG_RGMII=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y +CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550_MEM32=y -CONFIG_ROCKCHIP_SPI=y CONFIG_SYSINFO=y CONFIG_SYSINFO_SMBIOS=y CONFIG_SYSRESET=y +# CONFIG_TPL_SYSRESET is not set CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_DWC2=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_SPL_TINY_MEMSET=y -CONFIG_LZO=y +CONFIG_TPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig index c15ba3d8a4..e450a06180 100644 --- a/configs/rock-pi-s-rk3308_defconfig +++ b/configs/rock-pi-s-rk3308_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-rock-pi-s" -CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y CONFIG_TARGET_EVB_RK3308=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index da8c1976d7..e2db66d4a2 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -353,7 +353,7 @@ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y CONFIG_EFI_CAPSULE_AUTHENTICATE=y -CONFIG_EFI_CAPSULE_ESL_FILE="board/sandbox/capsule_pub_esl_good.esl" +CONFIG_EFI_CAPSULE_CRT_FILE="board/sandbox/capsule_pub_key_good.crt" CONFIG_EFI_SECURE_BOOT=y CONFIG_TEST_FDTDEC=y CONFIG_UNIT_TEST=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 6bf8874e72..049a606613 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -227,7 +227,7 @@ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y CONFIG_EFI_CAPSULE_AUTHENTICATE=y -CONFIG_EFI_CAPSULE_ESL_FILE="board/sandbox/capsule_pub_esl_good.esl" +CONFIG_EFI_CAPSULE_CRT_FILE="board/sandbox/capsule_pub_key_good.crt" CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig index 8fcdd063a3..8eb1027e44 100644 --- a/configs/tiger-rk3588_defconfig +++ b/configs/tiger-rk3588_defconfig @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0xfeb50000 CONFIG_DEBUG_UART_CLOCK=24000000 # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -41,6 +42,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SF is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -89,6 +91,8 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y diff --git a/configs/turris_1x_nor_defconfig b/configs/turris_1x_nor_defconfig new file mode 100644 index 0000000000..52819b11c8 --- /dev/null +++ b/configs/turris_1x_nor_defconfig @@ -0,0 +1,122 @@ +CONFIG_PPC=y +CONFIG_TEXT_BASE=0xeff40000 +CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_NR_DRAM_BANKS=5 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_SYS_MONITOR_LEN=786432 +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_ENV_ADDR=0xeff20000 +CONFIG_MPC85xx=y +CONFIG_SYS_INIT_RAM_LOCK=y +# CONFIG_CMD_ERRATA is not set +CONFIG_TARGET_TURRIS_1X=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y +CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_AHCI=y +CONFIG_OF_BOARD_FIXUP=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_OPTIMIZE_INLINING=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_BOARD_SIZE_LIMIT=y +CONFIG_BOARD_SIZE_LIMIT=786432 +CONFIG_MP=y +CONFIG_FIT=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_BOOTDELAY=3 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" +CONFIG_USE_PREBOOT=y +CONFIG_PCI_INIT_R=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_EEPROM is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_SYS_LOADS_BAUD_CHANGE=y +CONFIG_CMD_LSBLK=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PART=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_PING=y +CONFIG_CMD_BTRFS=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_FS_UUID=y +CONFIG_OF_CONTROL=y +CONFIG_OF_INITIAL_DTB_READONLY=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth2" +# CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_SCSI_AHCI=y +CONFIG_AHCI_PCI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xef001001 +CONFIG_SYS_OR0_PRELIM=0xff000ff7 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xff800821 +CONFIG_SYS_OR1_PRELIM=0xfffc0796 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xffa00801 +CONFIG_SYS_OR3_PRELIM=0xfffe09f7 +CONFIG_MPC8XXX_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_FSL=y +CONFIG_MISC=y +CONFIG_ATSHA204A=y +# CONFIG_MMC_HW_PARTITIONING is not set +# CONFIG_MMC_VERBOSE is not set +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_EMPTY_INFO=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_FLASH_QUIET_TEST=y +CONFIG_SYS_MAX_FLASH_SECT=128 +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_FSL_ELBC=y +CONFIG_NAND_FSL_ELBC_DT=y +CONFIG_MTD_UBI=y +CONFIG_PHY_FIXED=y +CONFIG_DM_MDIO=y +CONFIG_MII=y +CONFIG_TSEC_ENET=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_FSL=y +CONFIG_SCSI=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_EHCI_FSL=y +CONFIG_USB_STORAGE=y +CONFIG_WDT=y +CONFIG_WDT_MAX6370=y +CONFIG_BCH=y +# CONFIG_BINMAN_FDT is not set diff --git a/configs/turris_1x_sdcard_defconfig b/configs/turris_1x_sdcard_defconfig new file mode 100644 index 0000000000..b402004f58 --- /dev/null +++ b/configs/turris_1x_sdcard_defconfig @@ -0,0 +1,153 @@ +CONFIG_PPC=y +CONFIG_TEXT_BASE=0x11000000 +CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=5 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 +CONFIG_SYS_MONITOR_LEN=1048576 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xffe04500 +CONFIG_DEBUG_UART_CLOCK=37500000 +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_ENV_ADDR=0xeff20000 +CONFIG_MPC85xx=y +CONFIG_SYS_INIT_RAM_LOCK=y +CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR=y +CONFIG_TARGET_TURRIS_1X=y +CONFIG_SYS_CCSRBAR_DEFAULT=0xffe00000 +CONFIG_L2_CACHE=y +CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_OF_BOARD_FIXUP=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_HAS_BOARD_SIZE_LIMIT=y +CONFIG_BOARD_SIZE_LIMIT=1048576 +CONFIG_MP=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTDELAY=3 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_USE_PREBOOT=y +CONFIG_PCI_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x80200 +CONFIG_SPL_PAD_TO=0x0 +CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C=y +CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_LZMADEC=y +CONFIG_CMD_UNLZ4=y +CONFIG_CMD_UNZIP=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_SYS_LOADS_BAUD_CHANGE=y +CONFIG_CMD_LSBLK=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_NFS=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_BTRFS=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y +CONFIG_CMD_FS_UUID=y +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth2" +CONFIG_NETCONSOLE=y +CONFIG_SCSI_AHCI=y +CONFIG_AHCI_PCI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xef001001 +CONFIG_SYS_OR0_PRELIM=0xff000ff7 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xff800821 +CONFIG_SYS_OR1_PRELIM=0xfffc0796 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xffa00801 +CONFIG_SYS_OR3_PRELIM=0xfffe09f7 +CONFIG_DM_PCA953X=y +CONFIG_MPC8XXX_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_FSL=y +CONFIG_SYS_FSL_I2C_OFFSET=0x3000 +CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y +CONFIG_SYS_FSL_I2C2_OFFSET=0x3100 +CONFIG_MISC=y +CONFIG_ATSHA204A=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x52 +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_EMPTY_INFO=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_FLASH_QUIET_TEST=y +CONFIG_SYS_MAX_FLASH_SECT=128 +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_FSL_ELBC=y +CONFIG_NAND_FSL_ELBC_DT=y +CONFIG_PHY_FIXED=y +CONFIG_DM_MDIO=y +CONFIG_MII=y +CONFIG_TSEC_ENET=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_FSL=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SPL_SYS_NS16550_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_EHCI_FSL=y +CONFIG_WDT=y +CONFIG_WDT_MAX6370=y +CONFIG_FAT_WRITE=y +CONFIG_BCH=y diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig index 03730b498f..464d0bbb15 100644 --- a/configs/verdin-am62_a53_defconfig +++ b/configs/verdin-am62_a53_defconfig @@ -73,12 +73,15 @@ CONFIG_MD5SUM_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_BCB=y CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -115,8 +118,15 @@ CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y +CONFIG_DFU_RAM=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_UUU_SUPPORT=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y @@ -178,5 +188,22 @@ CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_AM62=y +CONFIG_USB_DWC3_AM62=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_SPL_DFU=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 CONFIG_HEXDUMP=y diff --git a/configs/verdin-am62_r5_defconfig b/configs/verdin-am62_r5_defconfig index 8266a7f6e8..e39ee2ac6f 100644 --- a/configs/verdin-am62_r5_defconfig +++ b/configs/verdin-am62_r5_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_RESET=y @@ -68,19 +69,22 @@ CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_SPL_CLK_CCF=y CONFIG_SPL_CLK_K3_PLL=y CONFIG_SPL_CLK_K3=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 CONFIG_TI_SCI_PROTOCOL=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y -CONFIG_SPL_MISC=y +CONFIG_MISC=y CONFIG_ESM_K3=y CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y @@ -105,5 +109,19 @@ CONFIG_SOC_TI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_AM62=y +CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_SPL_DFU=y CONFIG_LIB_RATIONAL=y CONFIG_SPL_LIB_RATIONAL=y diff --git a/disk/part_amiga.c b/disk/part_amiga.c index 9b0f2fe749..5b8ae5762d 100644 --- a/disk/part_amiga.c +++ b/disk/part_amiga.c @@ -304,7 +304,6 @@ static int part_get_info_amiga(struct blk_desc *desc, int part, info->blksz = rdb.block_bytes; bcpl_strcpy((char *)info->name, p->drive_name); - disk_type = g->dos_type; info->type[0] = (disk_type & 0xFF000000)>>24; diff --git a/disk/part_amiga.h b/disk/part_amiga.h index dfa70bdb8a..3c27bfe8fd 100644 --- a/disk/part_amiga.h +++ b/disk/part_amiga.h @@ -16,7 +16,6 @@ #define DEFAULT_SECTOR_SIZE 512 #endif - #define AMIGA_BLOCK_LIMIT 16 /* @@ -102,7 +101,6 @@ struct bootcode_block u32 load_data[123]; }; - #define AMIGA_ID_RDISK 0x5244534B #define AMIGA_ID_PART 0x50415254 #define AMIGA_ID_BOOT 0x424f4f54 diff --git a/disk/part_dos.c b/disk/part_dos.c index e6b5295e0e..09af2aeeb9 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -197,7 +197,6 @@ static void print_partition_extended(struct blk_desc *desc, return; } - /* Print a partition that is relative to its Extended partition table */ static int part_get_info_extended(struct blk_desc *desc, diff --git a/disk/part_iso.h b/disk/part_iso.h index eb2c3ab66f..6973a2943e 100644 --- a/disk/part_iso.h +++ b/disk/part_iso.h @@ -9,7 +9,6 @@ #define BRVD 0x11 #define PVD_OFFSET 0x10 - typedef struct iso_boot_rec { unsigned char desctype; /* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supplement, 3 = volume part 0xff trminator */ unsigned char stand_ident[5]; /* "CD001" */ @@ -19,7 +18,6 @@ typedef struct iso_boot_rec { unsigned char pointer[4]; /* absolute pointer to Boot Catalog */ } iso_boot_rec_t; - typedef struct iso_pri_rec { unsigned char desctype; /* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supplement, 3 = volume part 0xff trminator */ unsigned char stand_ident[5]; /* "CD001" */ @@ -109,7 +107,6 @@ typedef struct iso_part_rec { unsigned int partsiz_BE; /* volume partition size BE */ }iso_part_rec_t; - typedef struct iso_val_entry { unsigned char header_id; /* Header ID must be 0x01 */ unsigned char platform; /* Platform: 0=x86, 1=PowerPC, 2=MAC */ @@ -126,7 +123,6 @@ typedef struct iso_header_entry { char id_str[0x1C]; /* Ident String of sectionr */ } iso_header_entry_t; - typedef struct iso_init_def_entry { unsigned char boot_ind; /* Boot indicator 0x88=bootable 0=not bootable */ unsigned char boot_media; /* boot Media Type: 0=no Emulation, 1=1.2MB floppy, 2=1.44MB floppy, 3=2.88MB floppy 4=hd (0x80) */ @@ -137,7 +133,6 @@ typedef struct iso_init_def_entry { unsigned char rel_block_addr[4]; /* relative Block address */ } iso_init_def_entry_t; - void print_partition_cd(int dev); #endif /* _PART_CD_H */ diff --git a/disk/part_mac.c b/disk/part_mac.c index 81a65823be..21c85942fd 100644 --- a/disk/part_mac.c +++ b/disk/part_mac.c @@ -29,7 +29,6 @@ extern ldiv_t ldiv (long int __numer, long int __denom); # define __ldiv_t_defined 1 #endif - static int part_mac_read_ddb(struct blk_desc *desc, mac_driver_desc_t *ddb_p); static int part_mac_read_pdb(struct blk_desc *desc, int part, mac_partition_t *pdb_p); @@ -90,7 +89,6 @@ static void part_print_mac(struct blk_desc *desc) gb.rem += 512; gb.rem /= 1024; - printf ("Block Size=%d, Number of Blocks=%d, " "Total Capacity: %ld.%ld MB = %ld.%ld GB\n" "DeviceType=0x%x, DeviceId=0x%x\n\n" @@ -148,7 +146,6 @@ static void part_print_mac(struct blk_desc *desc) return; } - /* * Read Device Descriptor Block */ diff --git a/disk/part_mac.h b/disk/part_mac.h index 5f396c9408..b2ee086bb6 100644 --- a/disk/part_mac.h +++ b/disk/part_mac.h @@ -43,7 +43,6 @@ typedef struct mac_driver_entry { __u16 type; /* OS Type */ } mac_driver_entry_t; - #define MAC_PARTITION_MAGIC 0x504d /* type field value for A/UX or other Unix partitions */ diff --git a/doc/README.bootcount b/doc/README.bootcount deleted file mode 100644 index f6c5f82f98..0000000000 --- a/doc/README.bootcount +++ /dev/null @@ -1,53 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0+ - -Boot Count Limit -================ - -This is enabled by CONFIG_BOOTCOUNT_LIMIT. - -This allows to detect multiple failed attempts to boot Linux. - -After a power-on reset, the "bootcount" variable will be initialized to 1, and -each reboot will increment the value by 1. - -If, after a reboot, the new value of "bootcount" exceeds the value of -"bootlimit", then instead of the standard boot action (executing the contents of -"bootcmd"), an alternate boot action will be performed, and the contents of -"altbootcmd" will be executed. - -If the variable "bootlimit" is not defined in the environment, the Boot Count -Limit feature is disabled. If it is enabled, but "altbootcmd" is not defined, -then U-Boot will drop into interactive mode and remain there. - -It is the responsibility of some application code (typically a Linux -application) to reset the variable "bootcount" to 0 when the system booted -successfully, thus allowing for more boot cycles. - -CONFIG_BOOTCOUNT_EXT --------------------- - -This adds support for maintaining boot count in a file on an EXT filesystem. -The file to use is defined by: - -CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE -CONFIG_SYS_BOOTCOUNT_EXT_DEVPART -CONFIG_SYS_BOOTCOUNT_EXT_NAME - -The format of the file is: - -==== ================= -type entry -==== ================= -u8 magic -u8 version -u8 bootcount -u8 upgrade_available -==== ================= - -To prevent unattended usage of "altbootcmd", the "upgrade_available" variable is -used. -If "upgrade_available" is 0, "bootcount" is not saved. -If "upgrade_available" is 1, "bootcount" is saved. -So a userspace application should take care of setting the "upgrade_available" -and "bootcount" variables to 0, if the system boots successfully. -This also avoids writing the "bootcount" information on all reboots. diff --git a/doc/api/bootcount.rst b/doc/api/bootcount.rst new file mode 100644 index 0000000000..968c679c3c --- /dev/null +++ b/doc/api/bootcount.rst @@ -0,0 +1,58 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Boot Count Limit +================ + +This is enabled by CONFIG_BOOTCOUNT_LIMIT. + +This allows to detect multiple failed attempts to boot Linux. + +After a power-on reset, the ``bootcount`` variable will be initialized to 1, and +each reboot will increment the value by 1. + +If, after a reboot, the new value of ``bootcount`` exceeds the value of +``bootlimit``, then instead of the standard boot action (executing the contents +of ``bootcmd``), an alternate boot action will be performed, and the contents of +``altbootcmd`` will be executed. + +If the variable ``bootlimit`` is not defined in the environment, the Boot Count +Limit feature is disabled. If it is enabled, but ``altbootcmd`` is not defined, +then U-Boot will drop into interactive mode and remain there. + +It is the responsibility of some application code (typically a Linux +application) to reset the variable ``bootcount`` to 0 when the system booted +successfully, thus allowing for more boot cycles. + +CONFIG_BOOTCOUNT_FS +-------------------- + +This adds support for maintaining boot count in a file on a filesystem. +Tested filesystems are FAT and EXT. The file to use is defined by: + +CONFIG_SYS_BOOTCOUNT_FS_INTERFACE +CONFIG_SYS_BOOTCOUNT_FS_DEVPART +CONFIG_SYS_BOOTCOUNT_FS_NAME + +The format of the file is: + +.. list-table:: + :header-rows: 1 + + * - type + - entry + * - u8 + - magic + * - u8 + - version + * - u8 + - bootcount + * - u8 + - upgrade_available + +To prevent unintended usage of ``altbootcmd``, the ``upgrade_available`` +variable is used. +If ``upgrade_available`` is 0, ``bootcount`` is not saved. +If ``upgrade_available`` is 1, ``bootcount`` is saved. +So a userspace application should take care of setting the ``upgrade_available`` +and ``bootcount`` variables to 0, if the system boots successfully. +This also avoids writing the ``bootcount`` information on all reboots. diff --git a/doc/api/index.rst b/doc/api/index.rst index 51b2013af3..ec0b8adb2c 100644 --- a/doc/api/index.rst +++ b/doc/api/index.rst @@ -6,6 +6,7 @@ U-Boot API documentation .. toctree:: :maxdepth: 2 + bootcount clk dfu dm diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index eaf71673b7..bedc52e03e 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -72,7 +72,6 @@ List of mainline supported Rockchip boards: - GeekBox (geekbox) - PX5 EVB (evb-px5) - Rockchip Sheep (sheep-rk3368) - - Theobroma Systems RK3368-uQ7 SoM - Lion (lion-rk3368) * rk3399 - 96boards RK3399 Ficus (ficus-rk3399) - 96boards Rock960 (rock960-rk3399) @@ -124,6 +123,8 @@ List of mainline supported Rockchip boards: - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588) + - FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s) + - FriendlyElec NanoPi R6S (nanopi-r6s-rk3588s) - Generic RK3588S/RK3588 (generic-rk3588) - Indiedroid Nova (nova-rk3588s) - Pine64 QuartzPro64 (quartzpro64-rk3588) diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst index 88596f312c..d450b12bf8 100644 --- a/doc/develop/uefi/uefi.rst +++ b/doc/develop/uefi/uefi.rst @@ -580,10 +580,10 @@ and used by the steps highlighted below. } You can perform step-4 through the Kconfig symbol -CONFIG_EFI_CAPSULE_ESL_FILE. This symbol points to the esl file -generated in step-2. Once the symbol has been populated with the path -to the esl file, it will automatically get embedded into the -platform's dtb as part of U-Boot build. +CONFIG_EFI_CAPSULE_CRT_FILE. This symbol points to the signing key +generated in step-2. As part of U-Boot build, the ESL certificate file will +be generated from the signing key and automatically get embedded into the +platform's dtb. Anti-rollback Protection ************************ diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt index 306b05a995..40dde59991 100644 --- a/doc/sphinx/requirements.txt +++ b/doc/sphinx/requirements.txt @@ -1,6 +1,6 @@ alabaster==0.7.16 Babel==2.15.0 -certifi==2024.6.2 +certifi==2024.7.4 charset-normalizer==3.3.2 docutils==0.20.1 idna==3.7 @@ -22,4 +22,4 @@ sphinxcontrib-jquery==4.1 sphinxcontrib-jsmath==1.0.1 sphinxcontrib-qthelp==1.0.7 sphinxcontrib-serializinghtml==1.1.10 -urllib3==2.2.1 +urllib3==2.2.2 diff --git a/doc/usage/cmd/bootelf.rst b/doc/usage/cmd/bootelf.rst new file mode 100644 index 0000000000..705524c594 --- /dev/null +++ b/doc/usage/cmd/bootelf.rst @@ -0,0 +1,61 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later +.. Copyright 2024, Maxim Moskalets <maximmosk4@gmail.com> + +.. index:: + single: bootelf (command) + +bootelf command +=============== + +Synopsis +-------- + +:: + + bootelf [-p|-s] [-d <fdt_addr>] [<image_addr> [<arg>]...] + +Description +----------- + +The *bootelf* command is used to launch a ELF binary at *image_addr*. If +*image_addr* is not specified, the bootelf command will try to find image in +*image_load_addr* variable (*CONFIG\_SYS\_LOAD\_ADDR* by default). + +Args after *image_addr* will be passed to application in common *argc*, *argv* +format. + +A command sequence to run a ELF image using FDT might look like + +:: + + load mmc 0:1 ${loadaddr} /kernel.elf + load mmc 0:1 ${fdt_addr_r} /soc-board.dtb + bootelf -d ${fdt_addr_r} ${loadaddr} ${loadaddr} + +image_addr + Address of the ELF binary. + +fdt_addr + Address of the device-tree. This argument in only needed if bootable + application uses FDT that requires additional setup (like /memory node). + +arg + Any text arguments for bootable application. This is usually the address + of the device-tree. + +Flags: + +-p + Load ELF image via program headers. + +-s + Load ELF image via section headers. + +-d + Setup FDT by address. + +Configuration +------------- + +The bootelf command is only available if CONFIG_CMD_ELF=y. FDT setup by flag -d +need CONFIG_CMD_ELF_FDT_SETUP=y. diff --git a/doc/usage/cmd/itest.rst b/doc/usage/cmd/itest.rst index 9c307fb4bf..adcad05b2d 100644 --- a/doc/usage/cmd/itest.rst +++ b/doc/usage/cmd/itest.rst @@ -58,7 +58,7 @@ op ======== ====================== Examples -======== +-------- The itest command sets the result variable $? to true (0) or false (1): diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 2f211f748a..49b354e6ff 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -33,6 +33,7 @@ Shell commands cmd/bootd cmd/bootdev cmd/bootefi + cmd/bootelf cmd/bootflow cmd/booti cmd/bootm diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 3c56253b1e..2105cea3d4 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -25,13 +25,13 @@ config BOOTCOUNT_GENERIC Set to the address where the bootcount and bootcount magic will be stored. -config BOOTCOUNT_EXT - bool "Boot counter on EXT filesystem" - depends on FS_EXT4 - select EXT4_WRITE +config BOOTCOUNT_FS + bool "Boot counter on a filesystem" help - Add support for maintaining boot count in a file on an EXT - filesystem. + Add support for maintaining boot count in a file on a filesystem. + This requires that you have enabled write support for the filesystem + that will be used by the partition that you configure this feature + for. config BOOTCOUNT_AM33XX bool "Boot counter in AM33XX RTC IP block" @@ -184,26 +184,26 @@ config SYS_BOOTCOUNT_SINGLEWORD This option enables packing boot count magic value and boot count into single word (32 bits). -config SYS_BOOTCOUNT_EXT_INTERFACE - string "Interface on which to find boot counter EXT filesystem" +config SYS_BOOTCOUNT_FS_INTERFACE + string "Interface on which to find boot counter filesystem" default "mmc" - depends on BOOTCOUNT_EXT + depends on BOOTCOUNT_FS help Set the interface to use when locating the filesystem to use for the boot counter. -config SYS_BOOTCOUNT_EXT_DEVPART - string "Partition of the boot counter EXT filesystem" +config SYS_BOOTCOUNT_FS_DEVPART + string "Partition of the boot counter filesystem" default "0:1" - depends on BOOTCOUNT_EXT + depends on BOOTCOUNT_FS help Set the partition to use when locating the filesystem to use for the boot counter. -config SYS_BOOTCOUNT_EXT_NAME - string "Path and filename of the EXT filesystem based boot counter" +config SYS_BOOTCOUNT_FS_NAME + string "Path and filename of the FS filesystem based boot counter" default "/boot/failures" - depends on BOOTCOUNT_EXT + depends on BOOTCOUNT_FS help Set the filename and path of the file used to store the boot counter. @@ -211,18 +211,18 @@ config SYS_BOOTCOUNT_ADDR hex "RAM address used for reading and writing the boot counter" default 0x44E3E000 if BOOTCOUNT_AM33XX || BOOTCOUNT_AM33XX_NVMEM default 0xE0115FF8 if ARCH_LS1043A || ARCH_LS1021A - depends on BOOTCOUNT_AM33XX || BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \ + depends on BOOTCOUNT_AM33XX || BOOTCOUNT_GENERIC || BOOTCOUNT_FS || \ BOOTCOUNT_AM33XX_NVMEM help Set the address used for reading and writing the boot counter. config SYS_BOOTCOUNT_MAGIC hex "Magic value for the boot counter" - default 0xB001C041 if BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \ + default 0xB001C041 if BOOTCOUNT_GENERIC || BOOTCOUNT_FS || \ BOOTCOUNT_AM33XX || BOOTCOUNT_ENV || \ BOOTCOUNT_RAM || BOOTCOUNT_AT91 || DM_BOOTCOUNT default 0xB0 if BOOTCOUNT_AM33XX_NVMEM - depends on BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \ + depends on BOOTCOUNT_GENERIC || BOOTCOUNT_FS || \ BOOTCOUNT_AM33XX || BOOTCOUNT_ENV || \ BOOTCOUNT_RAM || BOOTCOUNT_AT91 || DM_BOOTCOUNT || \ BOOTCOUNT_AM33XX_NVMEM diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index e7771f5b36..245f879633 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_BOOTCOUNT_AT91) += bootcount_at91.o obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o -obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o +obj-$(CONFIG_BOOTCOUNT_FS) += bootcount_fs.o obj-$(CONFIG_BOOTCOUNT_AM33XX_NVMEM) += bootcount_nvmem.o obj-$(CONFIG_DM_BOOTCOUNT) += bootcount-uclass.o diff --git a/drivers/bootcount/bootcount_ext.c b/drivers/bootcount/bootcount_fs.c index 9639e638e9..569592d8aa 100644 --- a/drivers/bootcount/bootcount_ext.c +++ b/drivers/bootcount/bootcount_fs.c @@ -25,8 +25,8 @@ void bootcount_store(ulong a) loff_t len; int ret; - if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE, - CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) { + if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_FS_INTERFACE, + CONFIG_SYS_BOOTCOUNT_FS_DEVPART, FS_TYPE_ANY)) { puts("Error selecting device\n"); return; } @@ -42,7 +42,7 @@ void bootcount_store(ulong a) buf->upgrade_available = upgrade_available; unmap_sysmem(buf); - ret = fs_write(CONFIG_SYS_BOOTCOUNT_EXT_NAME, + ret = fs_write(CONFIG_SYS_BOOTCOUNT_FS_NAME, CONFIG_SYS_BOOTCOUNT_ADDR, 0, sizeof(bootcount_ext_t), &len); if (ret != 0) @@ -55,13 +55,13 @@ ulong bootcount_load(void) loff_t len_read; int ret; - if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE, - CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) { + if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_FS_INTERFACE, + CONFIG_SYS_BOOTCOUNT_FS_DEVPART, FS_TYPE_ANY)) { puts("Error selecting device\n"); return 0; } - ret = fs_read(CONFIG_SYS_BOOTCOUNT_EXT_NAME, CONFIG_SYS_BOOTCOUNT_ADDR, + ret = fs_read(CONFIG_SYS_BOOTCOUNT_FS_NAME, CONFIG_SYS_BOOTCOUNT_ADDR, 0, sizeof(bootcount_ext_t), &len_read); if (ret != 0 || len_read != sizeof(bootcount_ext_t)) { puts("Error loading bootcount\n"); diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index 85410e282e..292c8c44f9 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -16,6 +16,7 @@ static struct ccu_clk_gate v3s_gates[] = { [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), + [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), [CLK_BUS_OTG] = GATE(0x060, BIT(24)), @@ -30,6 +31,8 @@ static struct ccu_clk_gate v3s_gates[] = { [CLK_BUS_UART1] = GATE(0x06c, BIT(17)), [CLK_BUS_UART2] = GATE(0x06c, BIT(18)), + [CLK_BUS_EPHY] = GATE(0x070, BIT(0)), + [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), @@ -44,12 +47,15 @@ static struct ccu_reset v3s_resets[] = { [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), + [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), [RST_BUS_OTG] = RESET(0x2c0, BIT(24)), [RST_BUS_TCON0] = RESET(0x2c4, BIT(4)), [RST_BUS_DE] = RESET(0x2c4, BIT(12)), + [RST_BUS_EPHY] = RESET(0x2c8, BIT(2)), + [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)), [RST_BUS_I2C1] = RESET(0x2d8, BIT(1)), [RST_BUS_UART0] = RESET(0x2d8, BIT(16)), diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index c32c3f5c6a..2e3223e1c3 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -22,6 +22,7 @@ #include <linux/libfdt.h> #include <linux/printk.h> #include <linux/psci.h> +#include <power-domain-uclass.h> #define DRIVER_NAME "psci" @@ -171,6 +172,10 @@ static int bind_smccc_features(struct udevice *dev, int psci_method) static int psci_bind(struct udevice *dev) { +#if IS_ENABLED(CONFIG_POWER_DOMAIN) + ofnode node; +#endif + /* No SYSTEM_RESET support for PSCI 0.1 */ if (device_is_compatible(dev, "arm,psci-0.2") || device_is_compatible(dev, "arm,psci-1.0")) { @@ -187,6 +192,16 @@ static int psci_bind(struct udevice *dev) if (IS_ENABLED(CONFIG_ARM_SMCCC_FEATURES) && device_is_compatible(dev, "arm,psci-1.0")) dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); + /* Bind power-domain subnodes */ +#if IS_ENABLED(CONFIG_POWER_DOMAIN) + dev_for_each_subnode(node, dev) { + if (device_bind_driver_to_node(dev, "psci_power_domain", + ofnode_get_name(node), + node, NULL)) + pr_warn("failed to bind %s\n", ofnode_get_name(node)); + } +#endif + return 0; } @@ -323,3 +338,29 @@ U_BOOT_DRIVER(psci) = { #endif .flags = DM_FLAG_PRE_RELOC, }; + +#if IS_ENABLED(CONFIG_POWER_DOMAIN) +/* Accept #power-domain-cells == 0 */ +static int psci_power_domain_xlate(struct power_domain *power_domain, + struct ofnode_phandle_args *args) +{ + return args->args_count == 0 ? 0 : -EINVAL; +} + +static const struct power_domain_ops psci_power_ops = { + .of_xlate = psci_power_domain_xlate, +}; + +static int psci_power_domain_probe(struct udevice *dev) +{ + return 0; +} + +U_BOOT_DRIVER(psci_power_domain) = { + .name = "psci_power_domain", + .id = UCLASS_POWER_DOMAIN, + .ops = &psci_power_ops, + .probe = psci_power_domain_probe, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c index 04d4d07c41..cf4f7c3984 100644 --- a/drivers/misc/rockchip-io-domain.c +++ b/drivers/misc/rockchip-io-domain.c @@ -27,6 +27,10 @@ #define MAX_VOLTAGE_1_8 1980000 #define MAX_VOLTAGE_3_3 3600000 +#define PX30_IO_VSEL 0x180 +#define PX30_IO_VSEL_VCCIO6_SRC BIT(0) +#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1 + #define RK3328_SOC_CON4 0x410 #define RK3328_SOC_CON4_VCCIO2 BIT(7) #define RK3328_SOC_VCCIO2_SUPPLY_NUM 1 @@ -99,6 +103,22 @@ static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, int return regmap_write(grf, offset, val); } +static int px30_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) +{ + int ret = rockchip_iodomain_write(grf, offset, idx, uV); + + if (!ret && idx == PX30_IO_VSEL_VCCIO6_SUPPLY_NUM) { + /* + * set vccio6 iodomain to also use this framework + * instead of a special gpio. + */ + u32 val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16); + ret = regmap_write(grf, PX30_IO_VSEL, val); + } + + return ret; +} + static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) { int ret = rockchip_iodomain_write(grf, offset, idx, uV); @@ -131,6 +151,44 @@ static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, i return ret; } +static const struct rockchip_iodomain_soc_data soc_data_px30 = { + .grf_offset = 0x180, + .supply_names = { + NULL, + "vccio6-supply", + "vccio1-supply", + "vccio2-supply", + "vccio3-supply", + "vccio4-supply", + "vccio5-supply", + "vccio-oscgpi-supply", + }, + .write = px30_iodomain_write, +}; + +static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = { + .grf_offset = 0x100, + .supply_names = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + "pmuio1-supply", + "pmuio2-supply", + }, + .write = rockchip_iodomain_write, +}; + static const struct rockchip_iodomain_soc_data soc_data_rk3328 = { .grf_offset = 0x410, .supply_names = { @@ -191,6 +249,14 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = { static const struct udevice_id rockchip_iodomain_ids[] = { { + .compatible = "rockchip,px30-io-voltage-domain", + .data = (ulong)&soc_data_px30, + }, + { + .compatible = "rockchip,px30-pmu-io-voltage-domain", + .data = (ulong)&soc_data_px30_pmu, + }, + { .compatible = "rockchip,rk3328-io-voltage-domain", .data = (ulong)&soc_data_rk3328, }, diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index 48fac7a11b..b4c60a48d2 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -105,6 +105,8 @@ struct am654_sdhci_plat { #define FREQSEL_2_BIT BIT(2) #define STRBSEL_4_BIT BIT(3) #define DLL_CALIB BIT(4) + u32 quirks; +#define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0) }; struct timing_data { @@ -350,10 +352,8 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat) } #define MAX_SDCD_DEBOUNCE_TIME 2000 -static int am654_sdhci_deferred_probe(struct sdhci_host *host) +static int am654_sdhci_cd_poll(struct mmc *mmc) { - struct udevice *dev = host->mmc->dev; - struct am654_sdhci_plat *plat = dev_get_plat(dev); unsigned long start; int val; @@ -368,12 +368,35 @@ static int am654_sdhci_deferred_probe(struct sdhci_host *host) if (get_timer(start) > MAX_SDCD_DEBOUNCE_TIME) return -ENOMEDIUM; - val = mmc_getcd(host->mmc); + val = mmc_getcd(mmc); } while (!val); + return 0; +} + +static int am654_sdhci_deferred_probe(struct sdhci_host *host) +{ + struct udevice *dev = host->mmc->dev; + struct am654_sdhci_plat *plat = dev_get_plat(dev); + int ret; + + if (!(plat->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST)) { + if (am654_sdhci_cd_poll(host->mmc)) + return -ENOMEDIUM; + } + am654_sdhci_init(plat); - return sdhci_probe(dev); + ret = sdhci_probe(dev); + + if (plat->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) { + u8 hostctrlreg = sdhci_readb(host, SDHCI_HOST_CONTROL); + + hostctrlreg |= SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST; + sdhci_writeb(host, hostctrlreg, SDHCI_HOST_CONTROL); + } + + return ret; } static void am654_sdhci_write_b(struct sdhci_host *host, u8 val, int reg) @@ -679,6 +702,9 @@ static int am654_sdhci_probe(struct udevice *dev) regmap_init_mem_index(dev_ofnode(dev), &plat->base, 1); + if (plat->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) + am654_sdhci_deferred_probe(host); + return 0; } @@ -728,6 +754,8 @@ static int am654_sdhci_of_to_plat(struct udevice *dev) dev_read_u32(dev, "ti,strobe-sel", &plat->strb_sel); dev_read_u32(dev, "ti,clkbuf-sel", &plat->clkbuf_sel); + if (dev_read_bool(dev, "ti,fails-without-test-cd")) + plat->quirks |= SDHCI_AM654_QUIRK_FORCE_CDTEST; ret = mmc_of_parse(dev, cfg); if (ret) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index f4b97798d2..6fab34715d 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -892,6 +892,11 @@ static const struct emac_variant emac_variant_r40 = { .syscon_offset = 0x164, }; +static const struct emac_variant emac_variant_v3s = { + .syscon_offset = 0x30, + .soc_has_internal_phy = true, +}; + static const struct emac_variant emac_variant_a64 = { .syscon_offset = 0x30, .support_rmii = true, @@ -909,6 +914,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = { .data = (ulong)&emac_variant_h3 }, { .compatible = "allwinner,sun8i-r40-gmac", .data = (ulong)&emac_variant_r40 }, + { .compatible = "allwinner,sun8i-v3s-emac", + .data = (ulong)&emac_variant_v3s }, { .compatible = "allwinner,sun50i-a64-emac", .data = (ulong)&emac_variant_a64 }, { .compatible = "allwinner,sun50i-h6-emac", diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 3bb1a254ff..7459779dff 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -432,8 +432,8 @@ static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg, inno_write(inno, reg, tmp); } -#define inno_poll(reg, val, cond, sleep_us, timeout_us) \ - readl_poll_sleep_timeout((reg) * 4, val, cond, sleep_us, timeout_us) +#define inno_poll(inno, reg, val, cond, sleep_us, timeout_us) \ + readl_poll_sleep_timeout((inno)->regs + ((reg) * 4), val, cond, sleep_us, timeout_us) static unsigned long inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno, unsigned long rate) @@ -575,7 +575,7 @@ inno_hdmi_phy_rk3328_clk_set_rate(struct phy *phy, inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0); /* Wait for Pre-PLL lock */ - ret = inno_poll(0xa9, val, val & RK3328_PRE_PLL_LOCK_STATUS, + ret = inno_poll(inno, 0xa9, val, val & RK3328_PRE_PLL_LOCK_STATUS, 1000, 10000); if (ret) { dev_err(phy->dev, "Pre-PLL locking failed\n"); @@ -674,7 +674,7 @@ inno_hdmi_phy_rk3328_power_on(struct phy *phy, RK3328_TMDS_DRIVER_ENABLE); /* Wait for post PLL lock */ - ret = inno_poll(0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS, + ret = inno_poll(inno, 0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS, 1000, 10000); if (ret) { dev_err(phy->dev, "Post-PLL locking failed\n"); diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 3ad339bccc..1b85cbcce8 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -225,7 +225,7 @@ static int rockchip_combphy_xlate(struct phy *phy, struct ofnode_phandle_args *a return 0; } -static const struct phy_ops rochchip_combphy_ops = { +static const struct phy_ops rockchip_combphy_ops = { .init = rockchip_combphy_init, .exit = rockchip_combphy_exit, .of_xlate = rockchip_combphy_xlate, @@ -535,7 +535,7 @@ U_BOOT_DRIVER(rockchip_naneng_combphy) = { .name = "naneng-combphy", .id = UCLASS_PHY, .of_match = rockchip_combphy_ids, - .ops = &rochchip_combphy_ops, + .ops = &rockchip_combphy_ops, .probe = rockchip_combphy_probe, .priv_auto = sizeof(struct rockchip_combphy_priv), }; diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c index 2737bd81dd..62b42d1805 100644 --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c @@ -36,6 +36,8 @@ #define RK3588_BIFURCATION_LANE_0_1 BIT(0) #define RK3588_BIFURCATION_LANE_2_3 BIT(1) #define RK3588_LANE_AGGREGATION BIT(2) +#define RK3588_PCIE1LN_SEL_EN (GENMASK(1, 0) << 16) +#define RK3588_PCIE30_PHY_MODE_EN (GENMASK(2, 0) << 16) /** * struct rockchip_p3phy_priv - RK DW PCIe PHY state @@ -108,7 +110,7 @@ static int rockchip_p3phy_rk3588_init(struct phy *phy) { struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev); u32 reg = 0; - u8 mode = 0; + u8 mode = RK3588_LANE_AGGREGATION; /* Lane aggregation by default */ int ret; /* Deassert PCIe PMA output clamp mode */ @@ -117,31 +119,23 @@ static int rockchip_p3phy_rk3588_init(struct phy *phy) /* Set bifurcation if needed */ for (int i = 0; i < priv->num_lanes; i++) { - if (!priv->lanes[i]) - mode |= (BIT(i) << 3); - if (priv->lanes[i] > 1) - mode |= (BIT(i) >> 1); - } - - if (!mode) { - reg = RK3588_LANE_AGGREGATION; - } else { - if (mode & (BIT(0) | BIT(1))) - reg |= RK3588_BIFURCATION_LANE_0_1; - - if (mode & (BIT(2) | BIT(3))) - reg |= RK3588_BIFURCATION_LANE_2_3; + mode &= ~RK3588_LANE_AGGREGATION; + if (priv->lanes[i] == 3) + mode |= RK3588_BIFURCATION_LANE_0_1; + if (priv->lanes[i] == 4) + mode |= RK3588_BIFURCATION_LANE_2_3; } + reg = mode; regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, - (0x7 << 16) | reg); + RK3588_PCIE30_PHY_MODE_EN | reg); /* Set pcie1ln_sel in PHP_GRF_PCIESEL_CON */ - reg = (mode & (BIT(6) | BIT(7))) >> 6; + reg = mode & (RK3588_BIFURCATION_LANE_0_1 | RK3588_BIFURCATION_LANE_2_3); if (reg) regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON, - (reg << 16) | reg); + RK3588_PCIE1LN_SEL_EN | reg); reset_deassert(&priv->p30phy); udelay(1); @@ -164,7 +158,7 @@ static const struct rockchip_p3phy_ops rk3588_ops = { .phy_init = rockchip_p3phy_rk3588_init, }; -static int rochchip_p3phy_init(struct phy *phy) +static int rockchip_p3phy_init(struct phy *phy) { struct rockchip_p3phy_ops *ops = (struct rockchip_p3phy_ops *)dev_get_driver_data(phy->dev); @@ -185,7 +179,7 @@ static int rochchip_p3phy_init(struct phy *phy) return ret; } -static int rochchip_p3phy_exit(struct phy *phy) +static int rockchip_p3phy_exit(struct phy *phy) { struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev); @@ -251,9 +245,9 @@ static int rockchip_p3phy_probe(struct udevice *dev) return 0; } -static struct phy_ops rochchip_p3phy_ops = { - .init = rochchip_p3phy_init, - .exit = rochchip_p3phy_exit, +static struct phy_ops rockchip_p3phy_ops = { + .init = rockchip_p3phy_init, + .exit = rockchip_p3phy_exit, }; static const struct udevice_id rockchip_p3phy_of_match[] = { @@ -272,7 +266,7 @@ U_BOOT_DRIVER(rockchip_pcie3phy) = { .name = "rockchip_pcie3phy", .id = UCLASS_PHY, .of_match = rockchip_p3phy_of_match, - .ops = &rochchip_p3phy_ops, + .ops = &rockchip_p3phy_ops, .probe = rockchip_p3phy_probe, .priv_auto = sizeof(struct rockchip_p3phy_priv), }; diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 33b8bc1214..5556a22cf6 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -109,6 +109,13 @@ config AXP313_POWER Select this to enable support for the AXP313 PMIC found on some H616 boards. +config AXP717_POWER + bool "axp717 pmic support" + select AXP_PMIC_BUS + select CMD_POWEROFF + ---help--- + Select this to enable support for the AXP717 PMIC found on some boards. + config AXP809_POWER bool "axp809 pmic support" depends on MACH_SUN9I @@ -151,10 +158,11 @@ config AXP_DCDC1_VOLT config AXP_DCDC2_VOLT int "axp pmic dcdc2 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER || AXP717_POWER default 900 if AXP818_POWER default 1400 if AXP152_POWER || AXP209_POWER default 1000 if AXP313_POWER + default 1000 if AXP717_POWER default 1200 if MACH_SUN6I default 1100 if MACH_SUN8I default 0 if MACH_SUN9I @@ -167,11 +175,11 @@ config AXP_DCDC2_VOLT On A80 boards dcdc2 powers the GPU and can be left off. On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V. On R40 boards dcdc2 is VDD-CPU and should be 1.1V - On boards using the AXP313 it's often VDD-CPU. + On boards using the AXP313 or AXP717 it's often VDD-CPU. config AXP_DCDC3_VOLT int "axp pmic dcdc3 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER || AXP717_POWER default 900 if AXP809_POWER || AXP818_POWER default 1500 if AXP152_POWER default 1250 if AXP209_POWER @@ -188,7 +196,8 @@ config AXP_DCDC3_VOLT On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V. On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V. On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V. - On boards using the AXP313 it's often VDD-DRAM and should be 1.1V for LPDDR4. + On boards using the AXP313 or AXP717 it's often VDD-DRAM and should + be 1.1V for LPDDR4. config AXP_DCDC4_VOLT int "axp pmic dcdc4 voltage" diff --git a/drivers/power/Makefile b/drivers/power/Makefile index c7ee4595fc..9f94df8d64 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -8,13 +8,16 @@ obj-$(CONFIG_$(SPL_TPL_)POWER_DOMAIN) += domain/ obj-y += pmic/ obj-y += regulator/ +obj-$(CONFIG_AXP221_POWER) += axp221.o +ifdef CONFIG_SPL_BUILD obj-$(CONFIG_AXP152_POWER) += axp152.o obj-$(CONFIG_AXP209_POWER) += axp209.o -obj-$(CONFIG_AXP221_POWER) += axp221.o -obj-$(CONFIG_AXP305_POWER) += axp305.o -obj-$(CONFIG_AXP313_POWER) += axp313.o +obj-$(CONFIG_AXP305_POWER) += axp_spl.o +obj-$(CONFIG_AXP313_POWER) += axp_spl.o +obj-$(CONFIG_AXP717_POWER) += axp_spl.o obj-$(CONFIG_AXP809_POWER) += axp809.o obj-$(CONFIG_AXP818_POWER) += axp818.o +endif obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o obj-$(CONFIG_SY8106A_POWER) += sy8106a.o obj-$(CONFIG_TPS6586X_POWER) += tps6586x.o diff --git a/drivers/power/axp305.c b/drivers/power/axp305.c deleted file mode 100644 index 0312ad9af7..0000000000 --- a/drivers/power/axp305.c +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * AXP305 driver - * - * (C) Copyright 2020 Jernej Skrabec <jernej.skrabec@siol.net> - * - * Based on axp221.c - * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> - * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> - */ - -#include <command.h> -#include <errno.h> -#include <asm/arch/pmic_bus.h> -#include <axp_pmic.h> - -#define AXP305_DCDC4_1600MV_OFFSET 46 - -static u8 axp305_mvolt_to_cfg(int mvolt, int min, int max, int div) -{ - if (mvolt < min) - mvolt = min; - else if (mvolt > max) - mvolt = max; - - return (mvolt - min) / div; -} - -int axp_set_dcdc4(unsigned int mvolt) -{ - int ret; - u8 cfg; - - if (mvolt >= 1600) - cfg = AXP305_DCDC4_1600MV_OFFSET + - axp305_mvolt_to_cfg(mvolt, 1600, 3300, 100); - else - cfg = axp305_mvolt_to_cfg(mvolt, 600, 1500, 20); - - if (mvolt == 0) - return pmic_bus_clrbits(AXP305_OUTPUT_CTRL1, - AXP305_OUTPUT_CTRL1_DCDCD_EN); - - ret = pmic_bus_write(AXP305_DCDCD_VOLTAGE, cfg); - if (ret) - return ret; - - return pmic_bus_setbits(AXP305_OUTPUT_CTRL1, - AXP305_OUTPUT_CTRL1_DCDCD_EN); -} - -int axp_init(void) -{ - u8 axp_chip_id; - int ret; - - ret = pmic_bus_init(); - if (ret) - return ret; - - ret = pmic_bus_read(AXP305_CHIP_VERSION, &axp_chip_id); - if (ret) - return ret; - - if ((axp_chip_id & AXP305_CHIP_VERSION_MASK) != 0x40) - return -ENODEV; - - return ret; -} - -#if !CONFIG_IS_ENABLED(ARM_PSCI_FW) && !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) -int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - pmic_bus_write(AXP305_SHUTDOWN, AXP305_POWEROFF); - - /* infinite loop during shutdown */ - while (1) {} - - /* not reached */ - return 0; -} -#endif diff --git a/drivers/power/axp313.c b/drivers/power/axp313.c deleted file mode 100644 index 09ecb5b1ec..0000000000 --- a/drivers/power/axp313.c +++ /dev/null @@ -1,133 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * AXP313(a) driver - * - * (C) Copyright 2023 Arm Ltd. - * - * Based on axp305.c - * (C) Copyright 2020 Jernej Skrabec <jernej.skrabec@siol.net> - * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> - * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> - */ - -#include <command.h> -#include <errno.h> -#include <asm/arch/pmic_bus.h> -#include <axp_pmic.h> - -enum axp313_reg { - AXP313_CHIP_VERSION = 0x03, - AXP313_OUTPUT_CTRL = 0x10, - AXP313_DCDC1_CTRL = 0x13, - AXP313_SHUTDOWN = 0x1a, -}; - -#define AXP313_CHIP_VERSION_MASK 0xcf -#define AXP313_CHIP_VERSION_AXP1530 0x48 -#define AXP313_CHIP_VERSION_AXP313A 0x4b -#define AXP313_CHIP_VERSION_AXP313B 0x4c - -#define AXP313_DCDC_SPLIT_OFFSET 71 -#define AXP313_DCDC_SPLIT_MVOLT 1200 - -#define AXP313_POWEROFF BIT(7) - -static u8 mvolt_to_cfg(int mvolt, int min, int max, int div) -{ - if (mvolt < min) - mvolt = min; - else if (mvolt > max) - mvolt = max; - - return (mvolt - min) / div; -} - -static int axp_set_dcdc(int dcdc_num, unsigned int mvolt) -{ - int ret; - u8 cfg, enable_mask = 1U << (dcdc_num - 1); - int volt_reg = AXP313_DCDC1_CTRL + dcdc_num - 1; - int max_mV; - - switch (dcdc_num) { - case 1: - case 2: - max_mV = 1540; - break; - case 3: - /* - * The manual defines a different split point, but tests - * show that it's the same 1200mV as for DCDC1/2. - */ - max_mV = 1840; - break; - default: - return -EINVAL; - } - - if (mvolt > AXP313_DCDC_SPLIT_MVOLT) - cfg = AXP313_DCDC_SPLIT_OFFSET + mvolt_to_cfg(mvolt, - AXP313_DCDC_SPLIT_MVOLT + 20, max_mV, 20); - else - cfg = mvolt_to_cfg(mvolt, 500, AXP313_DCDC_SPLIT_MVOLT, 10); - - if (mvolt == 0) - return pmic_bus_clrbits(AXP313_OUTPUT_CTRL, enable_mask); - - debug("DCDC%d: writing 0x%x to reg 0x%x\n", dcdc_num, cfg, volt_reg); - ret = pmic_bus_write(volt_reg, cfg); - if (ret) - return ret; - - return pmic_bus_setbits(AXP313_OUTPUT_CTRL, enable_mask); -} - -int axp_set_dcdc2(unsigned int mvolt) -{ - return axp_set_dcdc(2, mvolt); -} - -int axp_set_dcdc3(unsigned int mvolt) -{ - return axp_set_dcdc(3, mvolt); -} - -int axp_init(void) -{ - u8 axp_chip_id; - int ret; - - ret = pmic_bus_init(); - if (ret) - return ret; - - ret = pmic_bus_read(AXP313_CHIP_VERSION, &axp_chip_id); - if (ret) - return ret; - - axp_chip_id &= AXP313_CHIP_VERSION_MASK; - switch (axp_chip_id) { - case AXP313_CHIP_VERSION_AXP1530: - case AXP313_CHIP_VERSION_AXP313A: - case AXP313_CHIP_VERSION_AXP313B: - break; - default: - debug("unknown PMIC: 0x%x\n", axp_chip_id); - return -EINVAL; - } - - return ret; -} - -#if !CONFIG_IS_ENABLED(ARM_PSCI_FW) && !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) -int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - pmic_bus_write(AXP313_SHUTDOWN, AXP313_POWEROFF); - - /* infinite loop during shutdown */ - while (1) {} - - /* not reached */ - return 0; -} -#endif diff --git a/drivers/power/axp_spl.c b/drivers/power/axp_spl.c new file mode 100644 index 0000000000..3c86eb20ab --- /dev/null +++ b/drivers/power/axp_spl.c @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * AXP PMIC SPL driver + * (C) Copyright 2024 Arm Ltd. + */ + +#include <errno.h> +#include <linux/types.h> +#include <asm/arch/pmic_bus.h> +#include <axp_pmic.h> + +struct axp_reg_desc_spl { + u8 enable_reg; + u8 enable_mask; + u8 volt_reg; + u8 volt_mask; + u16 min_mV; + u16 max_mV; + u8 step_mV; + u8 split; +}; + +#define NA 0xff + +#if defined(CONFIG_AXP717_POWER) /* AXP717 */ + +static const struct axp_reg_desc_spl axp_spl_dcdc_regulators[] = { + { 0x80, BIT(0), 0x83, 0x7f, 500, 1540, 10, 70 }, + { 0x80, BIT(1), 0x84, 0x7f, 500, 1540, 10, 70 }, + { 0x80, BIT(2), 0x85, 0x7f, 500, 1840, 10, 70 }, +}; + +#define AXP_CHIP_VERSION 0x0 +#define AXP_CHIP_VERSION_MASK 0x0 +#define AXP_CHIP_ID 0x0 +#define AXP_SHUTDOWN_REG 0x27 +#define AXP_SHUTDOWN_MASK BIT(0) + +#elif defined(CONFIG_AXP313_POWER) /* AXP313 */ + +static const struct axp_reg_desc_spl axp_spl_dcdc_regulators[] = { + { 0x10, BIT(0), 0x13, 0x7f, 500, 1540, 10, 70 }, + { 0x10, BIT(1), 0x14, 0x7f, 500, 1540, 10, 70 }, + { 0x10, BIT(2), 0x15, 0x7f, 500, 1840, 10, 70 }, +}; + +#define AXP_CHIP_VERSION 0x3 +#define AXP_CHIP_VERSION_MASK 0xc8 +#define AXP_CHIP_ID 0x48 +#define AXP_SHUTDOWN_REG 0x1a +#define AXP_SHUTDOWN_MASK BIT(7) + +#elif defined(CONFIG_AXP305_POWER) /* AXP305 */ + +static const struct axp_reg_desc_spl axp_spl_dcdc_regulators[] = { + { 0x10, BIT(0), 0x12, 0x7f, 600, 1520, 10, 50 }, + { 0x10, BIT(1), 0x13, 0x1f, 1000, 2550, 50, NA }, + { 0x10, BIT(2), 0x14, 0x7f, 600, 1520, 10, 50 }, + { 0x10, BIT(3), 0x15, 0x3f, 600, 1500, 20, NA }, + { 0x10, BIT(4), 0x16, 0x1f, 1100, 3400, 100, NA }, +}; + +#define AXP_CHIP_VERSION 0x3 +#define AXP_CHIP_VERSION_MASK 0xcf +#define AXP_CHIP_ID 0x40 +#define AXP_SHUTDOWN_REG 0x32 +#define AXP_SHUTDOWN_MASK BIT(7) + +#else + + #error "Please define the regulator registers in axp_spl_regulators[]." + +#endif + +static u8 axp_mvolt_to_cfg(int mvolt, const struct axp_reg_desc_spl *reg) +{ + if (mvolt < reg->min_mV) + mvolt = reg->min_mV; + else if (mvolt > reg->max_mV) + mvolt = reg->max_mV; + + mvolt -= reg->min_mV; + + /* voltage in the first range ? */ + if (mvolt <= reg->split * reg->step_mV) + return mvolt / reg->step_mV; + + mvolt -= reg->split * reg->step_mV; + + return reg->split + mvolt / (reg->step_mV * 2); +} + +static int axp_set_dcdc(int dcdc_num, unsigned int mvolt) +{ + const struct axp_reg_desc_spl *reg; + int ret; + + if (dcdc_num < 1 || dcdc_num > ARRAY_SIZE(axp_spl_dcdc_regulators)) + return -EINVAL; + + reg = &axp_spl_dcdc_regulators[dcdc_num - 1]; + + if (mvolt == 0) + return pmic_bus_clrbits(reg->enable_reg, reg->enable_mask); + + ret = pmic_bus_write(reg->volt_reg, axp_mvolt_to_cfg(mvolt, reg)); + if (ret) + return ret; + + return pmic_bus_setbits(reg->enable_reg, reg->enable_mask); +} + +int axp_set_dcdc1(unsigned int mvolt) +{ + return axp_set_dcdc(1, mvolt); +} + +int axp_set_dcdc2(unsigned int mvolt) +{ + return axp_set_dcdc(2, mvolt); +} + +int axp_set_dcdc3(unsigned int mvolt) +{ + return axp_set_dcdc(3, mvolt); +} + +int axp_set_dcdc4(unsigned int mvolt) +{ + return axp_set_dcdc(4, mvolt); +} + +int axp_set_dcdc5(unsigned int mvolt) +{ + return axp_set_dcdc(5, mvolt); +} + +int axp_init(void) +{ + int ret = pmic_bus_init(); + + if (ret) + return ret; + + if (AXP_CHIP_VERSION_MASK) { + u8 axp_chip_id; + + ret = pmic_bus_read(AXP_CHIP_VERSION, &axp_chip_id); + if (ret) + return ret; + + if ((axp_chip_id & AXP_CHIP_VERSION_MASK) != AXP_CHIP_ID) { + debug("unknown PMIC: 0x%x\n", axp_chip_id); + return -EINVAL; + } + } + + return 0; +} + +#if !CONFIG_IS_ENABLED(ARM_PSCI_FW) && !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) +int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + pmic_bus_setbits(AXP_SHUTDOWN_REG, AXP_SHUTDOWN_MASK); + + /* infinite loop during shutdown */ + while (1) + ; + + /* not reached */ + return 0; +} +#endif diff --git a/drivers/power/pmic/axp.c b/drivers/power/pmic/axp.c index 0e1e45fba7..521a39dd56 100644 --- a/drivers/power/pmic/axp.c +++ b/drivers/power/pmic/axp.c @@ -88,6 +88,7 @@ static const struct udevice_id axp_pmic_ids[] = { { .compatible = "x-powers,axp221", .data = AXP221_ID }, { .compatible = "x-powers,axp223", .data = AXP223_ID }, { .compatible = "x-powers,axp313a", .data = AXP313_ID }, + { .compatible = "x-powers,axp717", .data = AXP717_ID }, { .compatible = "x-powers,axp803", .data = AXP803_ID }, { .compatible = "x-powers,axp806", .data = AXP806_ID }, { .compatible = "x-powers,axp809", .data = AXP809_ID }, diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c index 617bb511e4..4d5a5ceafa 100644 --- a/drivers/power/pmic/rk8xx.c +++ b/drivers/power/pmic/rk8xx.c @@ -281,6 +281,8 @@ static int rk8xx_probe(struct udevice *dev) show_variant = bitfield_extract_by_mask(priv->variant, RK8XX_ID_MSK); switch (priv->variant) { case RK808_ID: + /* RK808 ID is 0x0000, so fix show_variant for that PMIC */ + show_variant = 0x808; break; case RK805_ID: case RK816_ID: diff --git a/drivers/power/regulator/axp_regulator.c b/drivers/power/regulator/axp_regulator.c index d27e09538e..75cdbca30f 100644 --- a/drivers/power/regulator/axp_regulator.c +++ b/drivers/power/regulator/axp_regulator.c @@ -189,6 +189,33 @@ static const struct axp_regulator_plat axp313_regulators[] = { { } }; +/* + * The "dcdc2" regulator has another range, beyond 1.54V up to 3.4V, in + * steps of 100mV. We cannot model this easily, but also don't need that, + * since it's typically only used for lower voltages anyway, so just ignore it. + */ +static const struct axp_regulator_plat axp717_regulators[] = { + { "dcdc1", 0x80, BIT(0), 0x83, 0x7f, 500, 1540, 10, 70 }, + { "dcdc2", 0x80, BIT(1), 0x84, 0x7f, 500, 1540, 10, 70 }, + { "dcdc3", 0x80, BIT(2), 0x85, 0x7f, 500, 1840, 10, 70 }, + { "dcdc4", 0x80, BIT(3), 0x86, 0x7f, 1000, 3700, 100, NA }, + { "aldo1", 0x90, BIT(0), 0x93, 0x1f, 500, 3500, 100, NA }, + { "aldo2", 0x90, BIT(1), 0x94, 0x1f, 500, 3500, 100, NA }, + { "aldo3", 0x90, BIT(2), 0x95, 0x1f, 500, 3500, 100, NA }, + { "aldo4", 0x90, BIT(3), 0x96, 0x1f, 500, 3500, 100, NA }, + { "bldo1", 0x90, BIT(4), 0x97, 0x1f, 500, 3500, 100, NA }, + { "bldo2", 0x90, BIT(5), 0x98, 0x1f, 500, 3500, 100, NA }, + { "bldo3", 0x90, BIT(6), 0x99, 0x1f, 500, 3500, 100, NA }, + { "bldo4", 0x90, BIT(7), 0x9a, 0x1f, 500, 3500, 100, NA }, + { "cldo1", 0x91, BIT(0), 0x9b, 0x1f, 500, 3500, 100, NA }, + { "cldo2", 0x91, BIT(1), 0x9c, 0x1f, 500, 3500, 100, NA }, + { "cldo3", 0x91, BIT(2), 0x9d, 0x1f, 500, 3500, 100, NA }, + { "cldo4", 0x91, BIT(3), 0x9e, 0x1f, 500, 3500, 100, NA }, + {"cpusldo",0x91, BIT(4), 0x9f, 0x1f, 500, 1400, 50, NA }, + {" boost", 0x19, BIT(4), 0x1e, 0xf0, 4550, 5510, 64, NA }, + { } +}; + static const struct axp_regulator_plat axp803_regulators[] = { { "dcdc1", 0x10, BIT(0), 0x20, 0x1f, 1600, 3400, 100, NA }, { "dcdc2", 0x10, BIT(1), 0x21, 0x7f, 500, 1300, 10, 70 }, @@ -291,6 +318,7 @@ static const struct axp_regulator_plat *const axp_regulators[] = { [AXP221_ID] = axp22x_regulators, [AXP223_ID] = axp22x_regulators, [AXP313_ID] = axp313_regulators, + [AXP717_ID] = axp717_regulators, [AXP803_ID] = axp803_regulators, [AXP806_ID] = axp806_regulators, [AXP809_ID] = axp809_regulators, diff --git a/drivers/rng/smccc_trng.c b/drivers/rng/smccc_trng.c index f59b80666b..1da1affd8e 100644 --- a/drivers/rng/smccc_trng.c +++ b/drivers/rng/smccc_trng.c @@ -135,10 +135,6 @@ static bool smccc_trng_is_supported(void (*invoke_fn)(unsigned long a0, unsigned { struct arm_smccc_res res; - (*invoke_fn)(ARM_SMCCC_ARCH_FEATURES, ARM_SMCCC_TRNG_VERSION, 0, 0, 0, 0, 0, 0, &res); - if (res.a0 == ARM_SMCCC_RET_NOT_SUPPORTED) - return false; - (*invoke_fn)(ARM_SMCCC_TRNG_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); if (res.a0 & BIT(31)) return false; diff --git a/drivers/rtc/goldfish_rtc.c b/drivers/rtc/goldfish_rtc.c index 3231eb0daf..e63a2766c7 100644 --- a/drivers/rtc/goldfish_rtc.c +++ b/drivers/rtc/goldfish_rtc.c @@ -2,7 +2,9 @@ /* * Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com> * - * This driver emulates a real time clock based on timer ticks. + * This driver supports the Google Goldfish virtual platform RTC device. + * The device is provided by the RISC-V virt machine in QEMU. It exposes + * a 64-bit nanosecond timer via two memory-mapped 32-bit registers. */ #include <div64.h> diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c index 13725ee7a2..a7333d8d9c 100644 --- a/drivers/spi/spi-sunxi.c +++ b/drivers/spi/spi-sunxi.c @@ -135,7 +135,6 @@ struct sun4i_spi_variant { struct sun4i_spi_plat { struct sun4i_spi_variant *variant; u32 base; - u32 max_hz; }; struct sun4i_spi_priv { @@ -238,6 +237,13 @@ static void sun4i_spi_set_speed_mode(struct udevice *dev) u32 reg; /* + * The uclass should take care that this won't happen. But anyway, + * avoid a div-by-zero exception. + */ + if (!priv->freq) + return; + + /* * Setup clock divider. * * We have two choices there. Either we can use the clock @@ -401,11 +407,10 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen, static int sun4i_spi_set_speed(struct udevice *dev, uint speed) { - struct sun4i_spi_plat *plat = dev_get_plat(dev); struct sun4i_spi_priv *priv = dev_get_priv(dev); - if (speed > plat->max_hz) - speed = plat->max_hz; + if (speed > SUN4I_SPI_MAX_RATE) + speed = SUN4I_SPI_MAX_RATE; if (speed < SUN4I_SPI_MIN_RATE) speed = SUN4I_SPI_MIN_RATE; @@ -458,7 +463,6 @@ static int sun4i_spi_probe(struct udevice *bus) priv->variant = plat->variant; priv->base = plat->base; - priv->freq = plat->max_hz; return 0; } @@ -466,16 +470,9 @@ static int sun4i_spi_probe(struct udevice *bus) static int sun4i_spi_of_to_plat(struct udevice *bus) { struct sun4i_spi_plat *plat = dev_get_plat(bus); - int node = dev_of_offset(bus); plat->base = dev_read_addr(bus); plat->variant = (struct sun4i_spi_variant *)dev_get_driver_data(bus); - plat->max_hz = fdtdec_get_int(gd->fdt_blob, node, - "spi-max-frequency", - SUN4I_SPI_DEFAULT_RATE); - - if (plat->max_hz > SUN4I_SPI_MAX_RATE) - plat->max_hz = SUN4I_SPI_MAX_RATE; return 0; } diff --git a/drivers/timer/mtk_timer.c b/drivers/timer/mtk_timer.c index 8216c28983..06deb23eb9 100644 --- a/drivers/timer/mtk_timer.c +++ b/drivers/timer/mtk_timer.c @@ -73,7 +73,8 @@ static int mtk_timer_probe(struct udevice *dev) return ret; ret = clk_get_by_index(dev, 1, &parent); - if (!ret) { + /* Skip setting the parent with dummy fixed-clock */ + if (!ret && parent.dev->driver != DM_DRIVER_GET(fixed_clock)) { ret = clk_set_parent(&clk, &parent); if (ret) return ret; diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c index b4e931646b..cbe06a9e7b 100644 --- a/drivers/usb/cdns3/core.c +++ b/drivers/usb/cdns3/core.c @@ -20,6 +20,7 @@ #include <linux/bug.h> #include <linux/kernel.h> #include <linux/io.h> +#include <linux/usb/gadget.h> #include <usb.h> #include <usb/xhci.h> @@ -462,15 +463,38 @@ static int cdns3_gadget_remove(struct udevice *dev) return cdns3_remove(cdns); } +static int cdns3_gadget_handle_interrupts(struct udevice *dev) +{ + struct cdns3 *cdns = dev_get_priv(dev); + + cdns3_gadget_uboot_handle_interrupt(cdns); + + return 0; +} + +static const struct usb_gadget_generic_ops cdns3_gadget_ops = { + .handle_interrupts = cdns3_gadget_handle_interrupts, +}; + U_BOOT_DRIVER(cdns_usb3_peripheral) = { .name = "cdns-usb3-peripheral", .id = UCLASS_USB_GADGET_GENERIC, .of_match = cdns3_ids, + .ops = &cdns3_gadget_ops, .probe = cdns3_gadget_probe, .remove = cdns3_gadget_remove, .priv_auto = sizeof(struct cdns3_gadget_priv), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; +#else +int dm_usb_gadget_handle_interrupts(struct udevice *dev) +{ + struct cdns3 *cdns = dev_get_priv(dev); + + cdns3_gadget_uboot_handle_interrupt(cdns); + + return 0; +} #endif #if defined(CONFIG_SPL_USB_HOST) || \ diff --git a/drivers/usb/cdns3/gadget-export.h b/drivers/usb/cdns3/gadget-export.h index 577469eee9..b3fd7c5303 100644 --- a/drivers/usb/cdns3/gadget-export.h +++ b/drivers/usb/cdns3/gadget-export.h @@ -25,4 +25,6 @@ static inline void cdns3_gadget_exit(struct cdns3 *cdns) { } #endif +void cdns3_gadget_uboot_handle_interrupt(struct cdns3 *cdns); + #endif /* __LINUX_CDNS3_GADGET_EXPORT */ diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index d11175dc5b..32b2c41206 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -2755,19 +2755,10 @@ int cdns3_gadget_init(struct cdns3 *cdns) * * Handles ep0 and gadget interrupt */ -static void cdns3_gadget_uboot_handle_interrupt(struct cdns3 *cdns) +void cdns3_gadget_uboot_handle_interrupt(struct cdns3 *cdns) { int ret = cdns3_device_irq_handler(0, cdns); if (ret == IRQ_WAKE_THREAD) cdns3_device_thread_irq_handler(0, cdns); } - -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - struct cdns3 *cdns = dev_get_priv(dev); - - cdns3_gadget_uboot_handle_interrupt(cdns); - - return 0; -} diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 8db678eb85..731ede2fea 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -194,34 +194,39 @@ static int dwc3_generic_of_to_plat(struct udevice *dev) } #if CONFIG_IS_ENABLED(DM_USB_GADGET) -int dm_usb_gadget_handle_interrupts(struct udevice *dev) +static int dwc3_generic_peripheral_probe(struct udevice *dev) { struct dwc3_generic_priv *priv = dev_get_priv(dev); - struct dwc3 *dwc3 = &priv->dwc3; - dwc3_gadget_uboot_handle_interrupt(dwc3); - - return 0; + return dwc3_generic_probe(dev, priv); } -static int dwc3_generic_peripheral_probe(struct udevice *dev) +static int dwc3_generic_peripheral_remove(struct udevice *dev) { struct dwc3_generic_priv *priv = dev_get_priv(dev); - return dwc3_generic_probe(dev, priv); + return dwc3_generic_remove(dev, priv); } -static int dwc3_generic_peripheral_remove(struct udevice *dev) +static int dwc3_gadget_handle_interrupts(struct udevice *dev) { struct dwc3_generic_priv *priv = dev_get_priv(dev); + struct dwc3 *dwc3 = &priv->dwc3; - return dwc3_generic_remove(dev, priv); + dwc3_gadget_uboot_handle_interrupt(dwc3); + + return 0; } +static const struct usb_gadget_generic_ops dwc3_gadget_ops = { + .handle_interrupts = dwc3_gadget_handle_interrupts, +}; + U_BOOT_DRIVER(dwc3_generic_peripheral) = { .name = "dwc3-generic-peripheral", .id = UCLASS_USB_GADGET_GENERIC, .of_to_plat = dwc3_generic_of_to_plat, + .ops = &dwc3_gadget_ops, .probe = dwc3_generic_peripheral_probe, .remove = dwc3_generic_peripheral_remove, .priv_auto = sizeof(struct dwc3_generic_priv), diff --git a/drivers/usb/dwc3/dwc3-layerscape.c b/drivers/usb/dwc3/dwc3-layerscape.c index ff83bf71e8..108b44c67e 100644 --- a/drivers/usb/dwc3/dwc3-layerscape.c +++ b/drivers/usb/dwc3/dwc3-layerscape.c @@ -99,33 +99,38 @@ static int dwc3_layerscape_of_to_plat(struct udevice *dev) } #if CONFIG_IS_ENABLED(DM_USB_GADGET) -int dm_usb_gadget_handle_interrupts(struct udevice *dev) +static int dwc3_layerscape_peripheral_probe(struct udevice *dev) { struct dwc3_layerscape_priv *priv = dev_get_priv(dev); - dwc3_gadget_uboot_handle_interrupt(&priv->dwc3); - - return 0; + return dwc3_layerscape_probe(dev, priv); } -static int dwc3_layerscape_peripheral_probe(struct udevice *dev) +static int dwc3_layerscape_peripheral_remove(struct udevice *dev) { struct dwc3_layerscape_priv *priv = dev_get_priv(dev); - return dwc3_layerscape_probe(dev, priv); + return dwc3_layerscape_remove(dev, priv); } -static int dwc3_layerscape_peripheral_remove(struct udevice *dev) +static int dwc3_layerscape_gadget_handle_interrupts(struct udevice *dev) { struct dwc3_layerscape_priv *priv = dev_get_priv(dev); - return dwc3_layerscape_remove(dev, priv); + dwc3_gadget_uboot_handle_interrupt(&priv->dwc3); + + return 0; } +static const struct usb_gadget_generic_ops dwc3_layerscape_gadget_ops = { + .handle_interrupts = dwc3_layerscape_gadget_handle_interrupts, +}; + U_BOOT_DRIVER(dwc3_layerscape_peripheral) = { .name = "dwc3-layerscape-peripheral", .id = UCLASS_USB_GADGET_GENERIC, .of_to_plat = dwc3_layerscape_of_to_plat, + .ops = &dwc3_layerscape_gadget_ops, .probe = dwc3_layerscape_peripheral_probe, .remove = dwc3_layerscape_peripheral_remove, .priv_auto = sizeof(struct dwc3_layerscape_priv), diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 92c7c6d08b..8f08fda746 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1606,6 +1606,38 @@ static int dwc3_gadget_stop(struct usb_gadget *g) return 0; } +static struct usb_ep *dwc3_find_ep(struct usb_gadget *gadget, const char *name) +{ + struct usb_ep *ep; + + list_for_each_entry(ep, &gadget->ep_list, ep_list) + if (!strcmp(ep->name, name)) + return ep; + + return NULL; +} + +static struct +usb_ep *dwc3_gadget_match_ep(struct usb_gadget *gadget, + struct usb_endpoint_descriptor *desc, + struct usb_ss_ep_comp_descriptor *comp_desc) +{ + /* + * First try standard, common configuration: ep1in-bulk, + * ep2out-bulk, ep3in-int to match other udc drivers to avoid + * confusion in already deployed software (endpoint numbers + * hardcoded in userspace software/drivers) + */ + if (usb_endpoint_is_bulk_in(desc)) + return dwc3_find_ep(gadget, "ep1in"); + if (usb_endpoint_is_bulk_out(desc)) + return dwc3_find_ep(gadget, "ep2out"); + if (usb_endpoint_is_int_in(desc)) + return dwc3_find_ep(gadget, "ep3in"); + + return NULL; +} + static const struct usb_gadget_ops dwc3_gadget_ops = { .get_frame = dwc3_gadget_get_frame, .wakeup = dwc3_gadget_wakeup, @@ -1613,6 +1645,7 @@ static const struct usb_gadget_ops dwc3_gadget_ops = { .pullup = dwc3_gadget_pullup, .udc_start = dwc3_gadget_start, .udc_stop = dwc3_gadget_stop, + .match_ep = dwc3_gadget_match_ep, }; /* -------------------------------------------------------------------------- */ diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c index 7bfd285b3a..a0aa5c25e4 100644 --- a/drivers/usb/eth/asix88179.c +++ b/drivers/usb/eth/asix88179.c @@ -629,6 +629,12 @@ static int ax88179_eth_probe(struct udevice *dev) usb_dev = priv->ueth.pusb_dev; priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT]; + ret = asix_basic_reset(&priv->ueth, priv); + if (ret) { + printf("Failed to reset ethernet device\n"); + return ret; + } + /* Get the MAC address */ ret = asix_read_mac(&priv->ueth, pdata->enetaddr); if (ret) diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 6bd395a623..7e9dd6f426 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -941,11 +941,6 @@ int dwc2_udc_handle_interrupt(void) return 0; } -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - return dwc2_udc_handle_interrupt(); -} - #if CONFIG_IS_ENABLED(DM_USB_GADGET) struct dwc2_priv_data { struct clk_bulk clks; @@ -1173,6 +1168,15 @@ static int dwc2_udc_otg_remove(struct udevice *dev) return dm_scan_fdt_dev(dev); } +static int dwc2_gadget_handle_interrupts(struct udevice *dev) +{ + return dwc2_udc_handle_interrupt(); +} + +static const struct usb_gadget_generic_ops dwc2_gadget_ops = { + .handle_interrupts = dwc2_gadget_handle_interrupts, +}; + static const struct udevice_id dwc2_udc_otg_ids[] = { { .compatible = "snps,dwc2" }, { .compatible = "brcm,bcm2835-usb" }, @@ -1185,6 +1189,7 @@ U_BOOT_DRIVER(dwc2_udc_otg) = { .name = "dwc2-udc-otg", .id = UCLASS_USB_GADGET_GENERIC, .of_match = dwc2_udc_otg_ids, + .ops = &dwc2_gadget_ops, .of_to_plat = dwc2_udc_otg_of_to_plat, .probe = dwc2_udc_otg_probe, .remove = dwc2_udc_otg_remove, @@ -1200,4 +1205,9 @@ int dwc2_udc_B_session_valid(struct udevice *dev) return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID; } +#else +int dm_usb_gadget_handle_interrupts(struct udevice *dev) +{ + return dwc2_udc_handle_interrupt(); +} #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */ diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index 0a70035ce0..a4da4f72de 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -12,7 +12,6 @@ #include <linux/errno.h> #include <linux/usb/gadget.h> #include <asm/unaligned.h> -#include "gadget_chips.h" #define isdigit(c) ('0' <= (c) && (c) <= '9') @@ -167,18 +166,6 @@ static int ep_matches( return 1; } -static struct usb_ep * -find_ep(struct usb_gadget *gadget, const char *name) -{ - struct usb_ep *ep; - - list_for_each_entry(ep, &gadget->ep_list, ep_list) { - if (0 == strcmp(ep->name, name)) - return ep; - } - return NULL; -} - /** * usb_ep_autoconfig - choose an endpoint matching the descriptor * @gadget: The device to which the endpoint must belong. @@ -214,76 +201,14 @@ struct usb_ep *usb_ep_autoconfig( struct usb_endpoint_descriptor *desc ) { - struct usb_ep *ep = NULL; - u8 type; - - type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; - - /* First, apply chip-specific "best usage" knowledge. - * This might make a good usb_gadget_ops hook ... - */ - if (gadget_is_net2280(gadget) && type == USB_ENDPOINT_XFER_INT) { - /* ep-e, ep-f are PIO with only 64 byte fifos */ - ep = find_ep(gadget, "ep-e"); - if (ep && ep_matches(gadget, ep, desc)) - return ep; - ep = find_ep(gadget, "ep-f"); - if (ep && ep_matches(gadget, ep, desc)) - return ep; - - } else if (gadget_is_goku(gadget)) { - if (USB_ENDPOINT_XFER_INT == type) { - /* single buffering is enough */ - ep = find_ep(gadget, "ep3-bulk"); - if (ep && ep_matches(gadget, ep, desc)) - return ep; - } else if (USB_ENDPOINT_XFER_BULK == type - && (USB_DIR_IN & desc->bEndpointAddress)) { - /* DMA may be available */ - ep = find_ep(gadget, "ep2-bulk"); - if (ep && ep_matches(gadget, ep, desc)) - return ep; - } - - } else if (gadget_is_sh(gadget) && USB_ENDPOINT_XFER_INT == type) { - /* single buffering is enough; maybe 8 byte fifo is too */ - ep = find_ep(gadget, "ep3in-bulk"); - if (ep && ep_matches(gadget, ep, desc)) - return ep; + struct usb_ep *ep; - } else if (gadget_is_mq11xx(gadget) && USB_ENDPOINT_XFER_INT == type) { - ep = find_ep(gadget, "ep1-bulk"); - if (ep && ep_matches(gadget, ep, desc)) - return ep; -#ifndef CONFIG_SPL_BUILD - } else if (gadget_is_dwc3(gadget)) { - const char *name = NULL; - /* - * First try standard, common configuration: ep1in-bulk, - * ep2out-bulk, ep3in-int to match other udc drivers to avoid - * confusion in already deployed software (endpoint numbers - * hardcoded in userspace software/drivers) - */ - if ((desc->bEndpointAddress & USB_DIR_IN) && - type == USB_ENDPOINT_XFER_BULK) - name = "ep1in"; - else if ((desc->bEndpointAddress & USB_DIR_IN) == 0 && - type == USB_ENDPOINT_XFER_BULK) - name = "ep2out"; - else if ((desc->bEndpointAddress & USB_DIR_IN) && - type == USB_ENDPOINT_XFER_INT) - name = "ep3in"; - - if (name) - ep = find_ep(gadget, name); + if (gadget->ops->match_ep) { + ep = gadget->ops->match_ep(gadget, desc, NULL); if (ep && ep_matches(gadget, ep, desc)) return ep; -#endif } - if (gadget->ops->match_ep) - ep = gadget->ops->match_ep(gadget, desc, NULL); - /* Second, look at endpoints until an unclaimed one looks usable */ list_for_each_entry(ep, &gadget->ep_list, ep_list) { if (ep_matches(gadget, ep, desc)) diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index b8b29d399b..b7b7bacb00 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -22,8 +22,8 @@ #include <malloc.h> #include <memalign.h> #include <linux/ctype.h> +#include <version.h> -#include "gadget_chips.h" #include "rndis.h" #include <dm.h> @@ -1989,28 +1989,15 @@ static int eth_bind(struct usb_gadget *gadget) * standard protocol is _strongly_ preferred for interop purposes. * (By everyone except Microsoft.) */ - if (gadget_is_musbhdrc(gadget)) { + + if (IS_ENABLED(CONFIG_USB_MUSB_GADGET) && + !strcmp("musb-hdrc", gadget->name)) { /* reduce tx dma overhead by avoiding special cases */ zlp = 0; - } else if (gadget_is_sh(gadget)) { - /* sh doesn't support multiple interfaces or configs */ - cdc = 0; - rndis = 0; } - gcnum = usb_gadget_controller_number(gadget); - if (gcnum >= 0) - device_desc.bcdDevice = cpu_to_le16(0x0300 + gcnum); - else { - /* - * can't assume CDC works. don't want to default to - * anything less functional on CDC-capable hardware, - * so we fail in this case. - */ - pr_err("controller '%s' not recognized", - gadget->name); - return -ENODEV; - } + gcnum = (U_BOOT_VERSION_NUM << 4) | U_BOOT_VERSION_NUM_PATCH; + device_desc.bcdDevice = cpu_to_le16(gcnum); /* * If there's an RNDIS configuration, that's what Windows wants to diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index b5b5f5d8c1..631969b340 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -17,10 +17,10 @@ #include <usb_mass_storage.h> #include <dfu.h> #include <thor.h> +#include <version.h> #include <env_callback.h> -#include "gadget_chips.h" #include "composite.c" /* @@ -199,18 +199,6 @@ void g_dnl_clear_detach(void) g_dnl_detach_request = false; } -static int g_dnl_get_bcd_device_number(struct usb_composite_dev *cdev) -{ - struct usb_gadget *gadget = cdev->gadget; - int gcnum; - - gcnum = usb_gadget_controller_number(gadget); - if (gcnum > 0) - gcnum += 0x200; - - return g_dnl_get_board_bcd_device_number(gcnum); -} - /** * Update internal serial number variable when the "serial#" env var changes. * @@ -261,7 +249,8 @@ static int g_dnl_bind(struct usb_composite_dev *cdev) if (ret) goto error; - gcnum = g_dnl_get_bcd_device_number(cdev); + gcnum = g_dnl_get_board_bcd_device_number((U_BOOT_VERSION_NUM << 4) | + U_BOOT_VERSION_NUM_PATCH); if (gcnum >= 0) device_desc.bcdDevice = cpu_to_le16(gcnum); else { diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h deleted file mode 100644 index 98156c312d..0000000000 --- a/drivers/usb/gadget/gadget_chips.h +++ /dev/null @@ -1,210 +0,0 @@ -/* - * USB device controllers have lots of quirks. Use these macros in - * gadget drivers or other code that needs to deal with them, and which - * autoconfigures instead of using early binding to the hardware. - * - * This SHOULD eventually work like the ARM mach_is_*() stuff, driven by - * some config file that gets updated as new hardware is supported. - * (And avoiding all runtime comparisons in typical one-choice configs!) - * - * NOTE: some of these controller drivers may not be available yet. - * Some are available on 2.4 kernels; several are available, but not - * yet pushed in the 2.6 mainline tree. - * - * Ported to U-Boot by: Thomas Smits <ts.smits@gmail.com> and - * Remy Bohmer <linux@bohmer.net> - */ -#ifdef CONFIG_USB_GADGET_NET2280 -#define gadget_is_net2280(g) (!strcmp("net2280", (g)->name)) -#else -#define gadget_is_net2280(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_AMD5536UDC -#define gadget_is_amd5536udc(g) (!strcmp("amd5536udc", (g)->name)) -#else -#define gadget_is_amd5536udc(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_DUMMY_HCD -#define gadget_is_dummy(g) (!strcmp("dummy_udc", (g)->name)) -#else -#define gadget_is_dummy(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_GOKU -#define gadget_is_goku(g) (!strcmp("goku_udc", (g)->name)) -#else -#define gadget_is_goku(g) 0 -#endif - -/* SH3 UDC -- not yet ported 2.4 --> 2.6 */ -#ifdef CONFIG_USB_GADGET_SUPERH -#define gadget_is_sh(g) (!strcmp("sh_udc", (g)->name)) -#else -#define gadget_is_sh(g) 0 -#endif - -/* handhelds.org tree (?) */ -#ifdef CONFIG_USB_GADGET_MQ11XX -#define gadget_is_mq11xx(g) (!strcmp("mq11xx_udc", (g)->name)) -#else -#define gadget_is_mq11xx(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_OMAP -#define gadget_is_omap(g) (!strcmp("omap_udc", (g)->name)) -#else -#define gadget_is_omap(g) 0 -#endif - -/* not yet ported 2.4 --> 2.6 */ -#ifdef CONFIG_USB_GADGET_N9604 -#define gadget_is_n9604(g) (!strcmp("n9604_udc", (g)->name)) -#else -#define gadget_is_n9604(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_ATMEL_USBA -#define gadget_is_atmel_usba(g) (!strcmp("atmel_usba_udc", (g)->name)) -#else -#define gadget_is_atmel_usba(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_AT91 -#define gadget_is_at91(g) (!strcmp("at91_udc", (g)->name)) -#else -#define gadget_is_at91(g) 0 -#endif - -/* status unclear */ -#ifdef CONFIG_USB_GADGET_IMX -#define gadget_is_imx(g) (!strcmp("imx_udc", (g)->name)) -#else -#define gadget_is_imx(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_FSL_USB2 -#define gadget_is_fsl_usb2(g) (!strcmp("fsl-usb2-udc", (g)->name)) -#else -#define gadget_is_fsl_usb2(g) 0 -#endif - -/* Mentor high speed function controller */ -/* from Montavista kernel (?) */ -#ifdef CONFIG_USB_GADGET_MUSBHSFC -#define gadget_is_musbhsfc(g) (!strcmp("musbhsfc_udc", (g)->name)) -#else -#define gadget_is_musbhsfc(g) 0 -#endif - -/* Mentor high speed "dual role" controller, in peripheral role */ -#ifdef CONFIG_USB_MUSB_GADGET -#define gadget_is_musbhdrc(g) (!strcmp("musb-hdrc", (g)->name)) -#else -#define gadget_is_musbhdrc(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_M66592 -#define gadget_is_m66592(g) (!strcmp("m66592_udc", (g)->name)) -#else -#define gadget_is_m66592(g) 0 -#endif - -#ifdef CONFIG_CI_UDC -#define gadget_is_ci(g) (!strcmp("ci_udc", (g)->name)) -#else -#define gadget_is_ci(g) 0 -#endif - -#ifdef CONFIG_USB_DWC3_GADGET -#define gadget_is_dwc3(g) (!strcmp("dwc3-gadget", (g)->name)) -#else -#define gadget_is_dwc3(g) 0 -#endif - -#ifdef CONFIG_USB_CDNS3_GADGET -#define gadget_is_cdns3(g) (!strcmp("cdns3-gadget", (g)->name)) -#else -#define gadget_is_cdns3(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_MAX3420 -#define gadget_is_max3420(g) (!strcmp("max3420-udc", (g)->name)) -#else -#define gadget_is_max3420(g) 0 -#endif - -#ifdef CONFIG_USB_MTU3_GADGET -#define gadget_is_mtu3(g) (!strcmp("mtu3-gadget", (g)->name)) -#else -#define gadget_is_mtu3(g) 0 -#endif - -#ifdef CONFIG_USB_GADGET_DWC2_OTG -#define gadget_is_dwc2(g) (!strcmp("dwc2-udc", (g)->name)) -#else -#define gadget_is_dwc2(g) 0 -#endif - -/** - * usb_gadget_controller_number - support bcdDevice id convention - * @gadget: the controller being driven - * - * Return a 2-digit BCD value associated with the peripheral controller, - * suitable for use as part of a bcdDevice value, or a negative error code. - * - * NOTE: this convention is purely optional, and has no meaning in terms of - * any USB specification. If you want to use a different convention in your - * gadget driver firmware -- maybe a more formal revision ID -- feel free. - * - * Hosts see these bcdDevice numbers, and are allowed (but not encouraged!) - * to change their behavior accordingly. For example it might help avoiding - * some chip bug. - */ -static inline int usb_gadget_controller_number(struct usb_gadget *gadget) -{ - if (gadget_is_net2280(gadget)) - return 0x01; - else if (gadget_is_dummy(gadget)) - return 0x02; - else if (gadget_is_sh(gadget)) - return 0x04; - else if (gadget_is_goku(gadget)) - return 0x06; - else if (gadget_is_mq11xx(gadget)) - return 0x07; - else if (gadget_is_omap(gadget)) - return 0x08; - else if (gadget_is_n9604(gadget)) - return 0x09; - else if (gadget_is_at91(gadget)) - return 0x12; - else if (gadget_is_imx(gadget)) - return 0x13; - else if (gadget_is_musbhsfc(gadget)) - return 0x14; - else if (gadget_is_musbhdrc(gadget)) - return 0x15; - else if (gadget_is_atmel_usba(gadget)) - return 0x17; - else if (gadget_is_fsl_usb2(gadget)) - return 0x18; - else if (gadget_is_amd5536udc(gadget)) - return 0x19; - else if (gadget_is_m66592(gadget)) - return 0x20; - else if (gadget_is_ci(gadget)) - return 0x21; - else if (gadget_is_dwc3(gadget)) - return 0x23; - else if (gadget_is_cdns3(gadget)) - return 0x24; - else if (gadget_is_max3420(gadget)) - return 0x25; - else if (gadget_is_mtu3(gadget)) - return 0x26; - else if (gadget_is_dwc2(gadget)) - return 0x27; - return -ENOENT; -} diff --git a/drivers/usb/gadget/max3420_udc.c b/drivers/usb/gadget/max3420_udc.c index 5a227c0ffd..557a1f0644 100644 --- a/drivers/usb/gadget/max3420_udc.c +++ b/drivers/usb/gadget/max3420_udc.c @@ -808,13 +808,6 @@ static void max3420_setup_spi(struct max3420_udc *udc) spi_wr8(udc, MAX3420_REG_PINCTL, bFDUPSPI); } -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - struct max3420_udc *udc = dev_get_priv(dev); - - return max3420_irq(udc); -} - static int max3420_udc_probe(struct udevice *dev) { struct max3420_udc *udc = dev_get_priv(dev); @@ -859,6 +852,17 @@ static int max3420_udc_remove(struct udevice *dev) return 0; } +static int max3420_gadget_handle_interrupts(struct udevice *dev) +{ + struct max3420_udc *udc = dev_get_priv(dev); + + return max3420_irq(udc); +} + +static const struct usb_gadget_generic_ops max3420_gadget_ops = { + .handle_interrupts = max3420_gadget_handle_interrupts, +}; + static const struct udevice_id max3420_ids[] = { { .compatible = "maxim,max3421-udc" }, { } @@ -868,6 +872,7 @@ U_BOOT_DRIVER(max3420_generic_udc) = { .name = "max3420-udc", .id = UCLASS_USB_GADGET_GENERIC, .of_match = max3420_ids, + .ops = &max3420_gadget_ops, .probe = max3420_udc_probe, .remove = max3420_udc_remove, .priv_auto = sizeof(struct max3420_udc), diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c index 5dc23a55bb..fbe62bbce4 100644 --- a/drivers/usb/gadget/udc/udc-uclass.c +++ b/drivers/usb/gadget/udc/udc-uclass.c @@ -12,6 +12,25 @@ #include <linux/usb/gadget.h> #if CONFIG_IS_ENABLED(DM_USB_GADGET) +static inline const struct usb_gadget_generic_ops * +usb_gadget_generic_dev_ops(struct udevice *dev) +{ + return (const struct usb_gadget_generic_ops *)dev->driver->ops; +} + +int dm_usb_gadget_handle_interrupts(struct udevice *dev) +{ + const struct usb_gadget_generic_ops *ops; + + ops = usb_gadget_generic_dev_ops(dev); + if (!ops) + return -EFAULT; + if (!ops->handle_interrupts) + return -ENOSYS; + + return ops->handle_interrupts(dev); +} + int udc_device_get_by_index(int index, struct udevice **udev) { struct udevice *dev = NULL; @@ -54,6 +73,11 @@ int udc_device_put(struct udevice *udev) { return board_usb_cleanup(legacy_index, USB_INIT_DEVICE); } + +__weak int dm_usb_gadget_handle_interrupts(struct udevice *dev) +{ + return 0; +} #endif #if CONFIG_IS_ENABLED(DM) diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c index e26f0b292e..f687fe2c43 100644 --- a/drivers/usb/host/usb-sandbox.c +++ b/drivers/usb/host/usb-sandbox.c @@ -123,12 +123,7 @@ static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev, return ret; } -#if CONFIG_IS_ENABLED(DM_USB_GADGET) -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - return 0; -} -#else +#if !CONFIG_IS_ENABLED(DM_USB_GADGET) int usb_gadget_register_driver(struct usb_gadget_driver *driver) { struct sandbox_udc *dev = this_controller; diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c index ca86b58dfc..f8e14eabfb 100644 --- a/drivers/usb/mtu3/mtu3_plat.c +++ b/drivers/usb/mtu3/mtu3_plat.c @@ -223,15 +223,6 @@ static const struct udevice_id ssusb_of_match[] = { }; #if CONFIG_IS_ENABLED(DM_USB_GADGET) -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - struct mtu3 *mtu = dev_get_priv(dev); - - mtu3_irq(0, mtu); - - return 0; -} - static int mtu3_gadget_probe(struct udevice *dev) { struct ssusb_mtk *ssusb = dev_to_ssusb(dev->parent); @@ -250,10 +241,24 @@ static int mtu3_gadget_remove(struct udevice *dev) return 0; } +static int mtu3_gadget_handle_interrupts(struct udevice *dev) +{ + struct mtu3 *mtu = dev_get_priv(dev); + + mtu3_irq(0, mtu); + + return 0; +} + +static const struct usb_gadget_generic_ops mtu3_gadget_ops = { + .handle_interrupts = mtu3_gadget_handle_interrupts, +}; + U_BOOT_DRIVER(mtu3_peripheral) = { .name = "mtu3-peripheral", .id = UCLASS_USB_GADGET_GENERIC, .of_match = ssusb_of_match, + .ops = &mtu3_gadget_ops, .probe = mtu3_gadget_probe, .remove = mtu3_gadget_remove, .priv_auto = sizeof(struct mtu3), diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c index c8dd73050b..96771c28ce 100644 --- a/drivers/usb/musb-new/omap2430.c +++ b/drivers/usb/musb-new/omap2430.c @@ -46,16 +46,6 @@ static inline void omap2430_low_level_init(struct musb *musb) musb_writel(musb->mregs, OTG_FORCESTDBY, l); } -#ifdef CONFIG_DM_USB_GADGET -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - struct musb_host_data *host = dev_get_priv(dev); - - host->host->isr(0, host->host); - return 0; -} -#endif - static int omap2430_musb_init(struct musb *musb) { u32 l; @@ -273,6 +263,21 @@ static int omap2430_musb_remove(struct udevice *dev) return 0; } +#ifndef CONFIG_USB_MUSB_HOST +static int omap2340_gadget_handle_interrupts(struct udevice *dev) +{ + struct musb_host_data *host = dev_get_priv(dev); + + host->host->isr(0, host->host); + + return 0; +} + +static const struct usb_gadget_generic_ops omap2340_gadget_ops = { + .handle_interrupts = omap2340_gadget_handle_interrupts, +}; +#endif + static const struct udevice_id omap2430_musb_ids[] = { { .compatible = "ti,omap3-musb" }, { .compatible = "ti,omap4-musb" }, @@ -285,6 +290,7 @@ U_BOOT_DRIVER(omap2430_musb) = { .id = UCLASS_USB, #else .id = UCLASS_USB_GADGET_GENERIC, + .ops = &omap2340_gadget_ops, #endif .of_match = omap2430_musb_ids, .of_to_plat = omap2430_musb_of_to_plat, diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c index 76e8b88369..ec1baa9337 100644 --- a/drivers/usb/musb-new/ti-musb.c +++ b/drivers/usb/musb-new/ti-musb.c @@ -233,15 +233,6 @@ static int ti_musb_peripheral_of_to_plat(struct udevice *dev) } #endif -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - struct ti_musb_peripheral *priv = dev_get_priv(dev); - - priv->periph->isr(0, priv->periph); - - return 0; -} - static int ti_musb_peripheral_probe(struct udevice *dev) { struct ti_musb_peripheral *priv = dev_get_priv(dev); @@ -269,12 +260,26 @@ static int ti_musb_peripheral_remove(struct udevice *dev) return 0; } +static int ti_musb_gadget_handle_interrupts(struct udevice *dev) +{ + struct ti_musb_peripheral *priv = dev_get_priv(dev); + + priv->periph->isr(0, priv->periph); + + return 0; +} + +static const struct usb_gadget_generic_ops ti_musb_gadget_ops = { + .handle_interrupts = ti_musb_gadget_handle_interrupts, +}; + U_BOOT_DRIVER(ti_musb_peripheral) = { .name = "ti-musb-peripheral", .id = UCLASS_USB_GADGET_GENERIC, #if CONFIG_IS_ENABLED(OF_CONTROL) .of_to_plat = ti_musb_peripheral_of_to_plat, #endif + .ops = &ti_musb_gadget_ops, .probe = ti_musb_peripheral_probe, .remove = ti_musb_peripheral_remove, .ops = &musb_usb_ops, diff --git a/drivers/usb/musb-new/ux500.c b/drivers/usb/musb-new/ux500.c index 6b4ef3c857..89dd75b7d0 100644 --- a/drivers/usb/musb-new/ux500.c +++ b/drivers/usb/musb-new/ux500.c @@ -91,14 +91,6 @@ static const struct musb_platform_ops ux500_musb_ops = { .disable = ux500_musb_disable, }; -int dm_usb_gadget_handle_interrupts(struct udevice *dev) -{ - struct ux500_glue *glue = dev_get_priv(dev); - - glue->mdata.host->isr(0, glue->mdata.host); - return 0; -} - static int ux500_musb_probe(struct udevice *dev) { #ifdef CONFIG_USB_MUSB_HOST @@ -155,6 +147,19 @@ static int ux500_musb_remove(struct udevice *dev) return 0; } +static int ux500_gadget_handle_interrupts(struct udevice *dev) +{ + struct ux500_glue *glue = dev_get_priv(dev); + + glue->mdata.host->isr(0, glue->mdata.host); + + return 0; +} + +static const struct usb_gadget_generic_ops ux500_gadget_ops = { + .handle_interrupts = ux500_gadget_handle_interrupts, +}; + static const struct udevice_id ux500_musb_ids[] = { { .compatible = "stericsson,db8500-musb" }, { } @@ -168,6 +173,7 @@ U_BOOT_DRIVER(ux500_musb) = { .id = UCLASS_USB_GADGET_GENERIC, #endif .of_match = ux500_musb_ids, + .ops = &ux500_gadget_ops, .probe = ux500_musb_probe, .remove = ux500_musb_remove, #ifdef CONFIG_USB_MUSB_HOST diff --git a/dts/Kconfig b/dts/Kconfig index 6883a000a0..569d4be338 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -145,6 +145,12 @@ config OF_EMBED endchoice +config OF_INITIAL_DTB_READONLY + bool "Initial DTB for DT control is read-only" + help + If initial DTB for DT control is read-only (e.g. points to + memory-mapped flash memory), then set this option. + config OF_BOARD bool "Provided by the board (e.g a previous loader) at runtime" default y if SANDBOX || OF_HAS_PRIOR_STAGE diff --git a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts index 7d7303f8ec..678ed8b4dc 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts @@ -72,6 +72,27 @@ }; }; + /* + * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE + * clock generator. + * The clock output is gated via the OE pin on the clock generator. + * This is modeled as a fixed-clock plus a gpio-gate-clock. + */ + pcie_refclk_gen: pcie-refclk-gen-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + pcie_refclk: pcie-refclk-clock { + compatible = "gpio-gate-clock"; + clocks = <&pcie_refclk_gen>; + #clock-cells = <0>; + enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; /* PCIE30X4_CLKREQN_M0 */ + pinctrl-names = "default"; + pinctrl-0 = <&pcie30x4_clkreqn_m0>; + }; + pps { compatible = "pps-gpio"; gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; @@ -353,6 +374,30 @@ status = "okay"; }; +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + /* + * The board has a gpio-controlled "pcie_refclk" generator, + * so add it to the list of clocks. + */ + clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, + <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, + <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, + <&pcie_refclk>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe", + "ref"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie30x4_waken_m0 &pcie30x4_perstn_m0>; + reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTN_M0 */ + vpcie3v3-supply = <&vcc3v3_mdot2>; + status = "okay"; +}; + &pinctrl { emmc { emmc_reset: emmc-reset { @@ -371,6 +416,20 @@ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + pcie30x4 { + pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 { + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie30x4_perstn_m0: pcie30x4-perstn-m0 { + rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie30x4_waken_m0: pcie30x4-waken-m0 { + rockchip,pins = <0 RK_PC7 12 &pcfg_pull_none>; + }; + }; }; &saradc { diff --git a/env/Kconfig b/env/Kconfig index 451bab45ea..031cf58186 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -655,7 +655,7 @@ config SYS_RELOC_GD_ENV_ADDR config SYS_MMC_ENV_DEV int "mmc device number" - depends on ENV_IS_IN_MMC || ENV_IS_IN_FAT || \ + depends on ENV_IS_IN_MMC || ENV_IS_IN_FAT || ENV_IS_IN_EXT4 || \ CMD_MVEBU_BUBT || FMAN_ENET || QE || PHY_CORTINA default 0 help diff --git a/env/common.c b/env/common.c index d8c276dddf..8d47d72605 100644 --- a/env/common.c +++ b/env/common.c @@ -394,7 +394,6 @@ void env_set_default(const char *s, int flags) gd->flags |= GD_FLG_ENV_DEFAULT; } - /* [re]set individual variables to their value in the default environment */ int env_set_default_vars(int nvars, char * const vars[], int flags) { @@ -588,7 +587,6 @@ int env_complete(char *var, int maxv, char *cmdv[], int bufsz, char *buf, found = 0; cmdv[0] = NULL; - while ((idx = hmatch_r(var, idx, &match, &env_htab))) { int vallen = strlen(match->key) + 1; diff --git a/examples/api/glue.c b/examples/api/glue.c index 08c21a8cb9..0aaa82bccb 100644 --- a/examples/api/glue.c +++ b/examples/api/glue.c @@ -153,7 +153,6 @@ unsigned long ub_get_timer(unsigned long base) return cur; } - /**************************************************************************** * * devices diff --git a/examples/standalone/sched.c b/examples/standalone/sched.c index d507163f6f..57ae67e1a5 100644 --- a/examples/standalone/sched.c +++ b/examples/standalone/sched.c @@ -21,7 +21,6 @@ * timer interrupts. */ - #define MAX_THREADS 8 #define CTX_SIZE 512 @@ -55,7 +54,6 @@ struct lthread { static volatile struct lthread lthreads[MAX_THREADS]; static volatile int current_tid = MASTER_THREAD; - static uchar dbg = 0; #define PDEBUG(fmt, args...) { \ @@ -162,7 +160,6 @@ static int testthread (void *name) return *(int *) name + 1; } - static void sched_init (void) { int i; diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h index 59439552a4..b7be09d5df 100644 --- a/fs/btrfs/ctree.h +++ b/fs/btrfs/ctree.h @@ -461,7 +461,6 @@ static inline u8 *btrfs_dev_extent_chunk_tree_uuid(struct btrfs_dev_extent *dev) return (u8 *)((unsigned long)dev + ptr); } - /* struct btrfs_extent_item */ BTRFS_SETGET_FUNCS(extent_refs, struct btrfs_extent_item, refs, 64); BTRFS_SETGET_STACK_FUNCS(stack_extent_refs, struct btrfs_extent_item, refs, 64); diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c index e5bfaf461c..34d9d53512 100644 --- a/fs/btrfs/disk-io.c +++ b/fs/btrfs/disk-io.c @@ -69,7 +69,6 @@ static int check_tree_block(struct btrfs_fs_info *fs_info, btrfs_header_fsid(), BTRFS_FSID_SIZE); - if (fsid_match) { ret = 0; break; diff --git a/fs/btrfs/kernel-shared/btrfs_tree.h b/fs/btrfs/kernel-shared/btrfs_tree.h index d8eff0b912..f9dc005c50 100644 --- a/fs/btrfs/kernel-shared/btrfs_tree.h +++ b/fs/btrfs/kernel-shared/btrfs_tree.h @@ -115,7 +115,6 @@ #define BTRFS_LAST_FREE_OBJECTID -256ULL #define BTRFS_FIRST_CHUNK_TREE_OBJECTID 256ULL - /* * The device items go into the chunk tree. * @@ -333,7 +332,6 @@ */ #define BTRFS_STRING_ITEM_KEY 253 - /* 32 bytes in various csum fields */ #define BTRFS_CSUM_SIZE 32 @@ -508,7 +506,6 @@ struct btrfs_free_space_header { #define BTRFS_SUPER_FLAG_CHANGING_FSID (1ULL << 35) #define BTRFS_SUPER_FLAG_CHANGING_FSID_V2 (1ULL << 36) - /* * Items in the extent tree are used to record the objectid of the * owner of the block and the number of references. @@ -523,7 +520,6 @@ struct btrfs_extent_item_v0 { __le32 refs; } __attribute__ ((__packed__)); - #define BTRFS_EXTENT_FLAG_DATA (1ULL << 0) #define BTRFS_EXTENT_FLAG_TREE_BLOCK (1ULL << 1) @@ -565,7 +561,6 @@ struct btrfs_extent_ref_v0 { __le32 count; } __attribute__ ((__packed__)); - /* Dev extents record used space on individual devices. * * The owner field points back to the chunk allocation mapping tree that diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index 8ec545eded..5726981b19 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c @@ -255,7 +255,6 @@ static int device_list_add(struct btrfs_super_block *disk_super, } } - if (found_transid > fs_devices->latest_trans) { fs_devices->latest_devid = devid; fs_devices->latest_trans = found_transid; diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 857c15d878..52152a2295 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -1205,7 +1205,6 @@ fail: } - static void alloc_single_indirect_block(struct ext2_inode *file_inode, unsigned int *total_remaining_blocks, unsigned int *no_blks_reqd) @@ -2380,7 +2379,6 @@ int ext4fs_mount(void) if (le16_to_cpu(data->sblock.magic) != EXT2_MAGIC) goto fail_noerr; - if (le32_to_cpu(data->sblock.revision_level) == 0) { fs->inodesz = 128; fs->gdsize = 32; diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c index 38da3923c4..a2dfff8197 100644 --- a/fs/ext4/ext4_write.c +++ b/fs/ext4/ext4_write.c @@ -20,7 +20,6 @@ * ext4write : Based on generic ext4 protocol. */ - #include <blk.h> #include <log.h> #include <malloc.h> @@ -746,7 +745,6 @@ void ext4fs_deinit(void) fs->inode_bmaps = NULL; } - free(fs->gdtable); fs->gdtable = NULL; /* diff --git a/fs/jffs2/compr_lzo.c b/fs/jffs2/compr_lzo.c index e648ec4fb2..892766e12e 100644 --- a/fs/jffs2/compr_lzo.c +++ b/fs/jffs2/compr_lzo.c @@ -65,7 +65,6 @@ */ - #include <config.h> #include <linux/stddef.h> #include <jffs2/jffs2.h> diff --git a/fs/jffs2/compr_rubin.c b/fs/jffs2/compr_rubin.c index 9ff2217738..88b6584599 100644 --- a/fs/jffs2/compr_rubin.c +++ b/fs/jffs2/compr_rubin.c @@ -42,7 +42,6 @@ #include <jffs2/jffs2.h> #include <jffs2/compr_rubin.h> - void rubin_do_decompress(unsigned char *bits, unsigned char *in, unsigned char *page_out, __u32 destlen) { diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 5b7d7f4ae8..b5f74d6501 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -110,7 +110,6 @@ * it should probably be dumped and replaced by something like jffs2reader! */ - #include <config.h> #include <malloc.h> #include <div64.h> @@ -126,7 +125,6 @@ #include "jffs2_private.h" - #define NODE_CHUNK 1024 /* size of memory allocation chunk in b_nodes */ #define SPIN_BLKSIZE 18 /* spin after having scanned 1<<BLKSIZE bytes */ @@ -135,7 +133,6 @@ #undef DEBUG_FRAGMENTS /* print fragment list after scan */ #undef DEBUG /* enable debugging messages */ - #ifdef DEBUG # define DEBUGF(fmt,args...) printf(fmt ,##args) #else @@ -370,14 +367,12 @@ static void *get_node_mem_onenand(u32 off, void *ext_buf) return ret; } - static void put_fl_mem_onenand(void *buf) { free(buf); } #endif - #if defined(CONFIG_CMD_FLASH) #include <flash.h> @@ -414,7 +409,6 @@ static inline void *get_node_mem_nor(u32 off, void *ext_buf) } #endif - /* * Generic jffs2 raw memory and node read routines. * @@ -515,7 +509,6 @@ struct mem_block { struct b_node nodes[NODE_CHUNK]; }; - static void free_nodes(struct b_list *list) { @@ -1854,7 +1847,6 @@ jffs2_1pass_build_lists(struct part_info * part) return 1; } - static u32 jffs2_1pass_fill_info(struct b_lists * pL, struct b_jffs2_info * piL) { @@ -1883,7 +1875,6 @@ jffs2_1pass_fill_info(struct b_lists * pL, struct b_jffs2_info * piL) return 0; } - static struct b_lists * jffs2_get_list(struct part_info * part, const char *who) { @@ -1899,7 +1890,6 @@ jffs2_get_list(struct part_info * part, const char *who) return (struct b_lists *)part->jffs2_priv; } - /* Print directory / file contents */ u32 jffs2_1pass_ls(struct part_info * part, const char *fname) @@ -1916,7 +1906,6 @@ jffs2_1pass_ls(struct part_info * part, const char *fname) return 0; } - #if 0 putLabeledWord("found file at inode = ", inode); putLabeledWord("read_inode returns = ", ret); @@ -1925,7 +1914,6 @@ jffs2_1pass_ls(struct part_info * part, const char *fname) return ret; } - /* Load a file from flash into memory. fname can be a full path */ u32 jffs2_1pass_load(char *dest, struct part_info * part, const char *fname) diff --git a/fs/jffs2/jffs2_private.h b/fs/jffs2/jffs2_private.h index 65d19a76f9..9284ab5c2c 100644 --- a/fs/jffs2/jffs2_private.h +++ b/fs/jffs2/jffs2_private.h @@ -3,7 +3,6 @@ #include <jffs2/jffs2.h> - struct b_node { u32 offset; struct b_node *next; diff --git a/fs/jffs2/mini_inflate.c b/fs/jffs2/mini_inflate.c index 3072eedd8c..12ab180d2f 100644 --- a/fs/jffs2/mini_inflate.c +++ b/fs/jffs2/mini_inflate.c @@ -336,11 +336,9 @@ static void decompress_fixed(struct bitstream *stream, unsigned char *dest) cramfs_memset(distance->lengths, 5, 32); distance->count[5] = 32; - fill_code_tables(lengths); fill_code_tables(distance); - decompress_huffman(stream, dest); } diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index 788f88f049..d8d78a2d3d 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -2452,7 +2452,6 @@ retry: EXPORT_SYMBOL(sget); - static struct dentry *ubifs_mount(struct file_system_type *fs_type, int flags, const char *name, void *data) { diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index f0ea7e5c16..048730db7f 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -110,7 +110,6 @@ static struct ubifs_compressor zstd_compr = { /* All UBIFS compressors */ struct ubifs_compressor *ubifs_compressors[UBIFS_COMPR_TYPES_CNT] = {NULL}; - #ifdef __UBOOT__ struct crypto_comp { diff --git a/fs/yaffs2/yaffs_attribs.c b/fs/yaffs2/yaffs_attribs.c index 69664268e1..81927cb943 100644 --- a/fs/yaffs2/yaffs_attribs.c +++ b/fs/yaffs2/yaffs_attribs.c @@ -13,7 +13,6 @@ #include "yaffs_attribs.h" - void yaffs_load_attribs(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh) { obj->yst_uid = oh->yst_uid; @@ -24,7 +23,6 @@ void yaffs_load_attribs(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh) obj->yst_rdev = oh->yst_rdev; } - void yaffs_load_attribs_oh(struct yaffs_obj_hdr *oh, struct yaffs_obj *obj) { #ifdef CONFIG_YAFFS_WINCE diff --git a/fs/yaffs2/yaffs_ecc.c b/fs/yaffs2/yaffs_ecc.c index 9294107c15..0860a3c784 100644 --- a/fs/yaffs2/yaffs_ecc.c +++ b/fs/yaffs2/yaffs_ecc.c @@ -67,7 +67,6 @@ static const unsigned char column_parity_table[] = { 0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00, }; - /* Calculate the ECC for a 256-byte block of data */ void yaffs_ecc_calc(const unsigned char *data, unsigned char *ecc) { diff --git a/fs/yaffs2/yaffs_flashif.h b/fs/yaffs2/yaffs_flashif.h index e6e8979ee6..886901a0ff 100644 --- a/fs/yaffs2/yaffs_flashif.h +++ b/fs/yaffs2/yaffs_flashif.h @@ -16,7 +16,6 @@ #ifndef __YAFFS_FLASH_H__ #define __YAFFS_FLASH_H__ - #include "yaffs_guts.h" int yflash_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber); int yflash_WriteChunkToNAND(struct yaffs_dev *dev, int nand_chunk, diff --git a/fs/yaffs2/yaffs_flashif2.h b/fs/yaffs2/yaffs_flashif2.h index cfdbde9dc8..c69862668b 100644 --- a/fs/yaffs2/yaffs_flashif2.h +++ b/fs/yaffs2/yaffs_flashif2.h @@ -16,7 +16,6 @@ #ifndef __YAFFS_FLASH2_H__ #define __YAFFS_FLASH2_H__ - #include "yaffs_guts.h" int yflash2_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber); int yflash2_WriteChunkToNAND(struct yaffs_dev *dev, int nand_chunk, diff --git a/fs/yaffs2/yaffs_guts.c b/fs/yaffs2/yaffs_guts.c index e13a73298b..e89d02513c 100644 --- a/fs/yaffs2/yaffs_guts.c +++ b/fs/yaffs2/yaffs_guts.c @@ -41,8 +41,6 @@ static int yaffs_wr_data_obj(struct yaffs_obj *in, int inode_chunk, const u8 *buffer, int n_bytes, int use_reserve); - - /* Function to calculate chunk and offset */ void yaffs_addr_to_chunk(struct yaffs_dev *dev, loff_t addr, @@ -355,7 +353,6 @@ static int yaffs_verify_chunk_written(struct yaffs_dev *dev, return retval; } - int yaffs_check_alloc_available(struct yaffs_dev *dev, int n_chunks) { int reserved_chunks; @@ -1989,7 +1986,6 @@ static struct yaffs_obj *yaffs_create_fake_dir(struct yaffs_dev *dev, } - static void yaffs_init_tnodes_and_objs(struct yaffs_dev *dev) { int i; @@ -2233,8 +2229,6 @@ struct yaffs_obj *yaffs_link_obj(struct yaffs_obj *parent, const YCHAR * name, } - - /*---------------------- Block Management and Page Allocation -------------*/ static void yaffs_deinit_blocks(struct yaffs_dev *dev) @@ -2292,7 +2286,6 @@ static int yaffs_init_blocks(struct yaffs_dev *dev) if (!dev->chunk_bits) goto alloc_error; - memset(dev->block_info, 0, n_blocks * sizeof(struct yaffs_block_info)); memset(dev->chunk_bits, 0, dev->chunk_bit_stride * n_blocks); return YAFFS_OK; @@ -2302,7 +2295,6 @@ alloc_error: return YAFFS_FAIL; } - void yaffs_block_became_dirty(struct yaffs_dev *dev, int block_no) { struct yaffs_block_info *bi = yaffs_get_block_info(dev, block_no); @@ -3036,8 +3028,6 @@ static int yaffs_wr_data_obj(struct yaffs_obj *in, int inode_chunk, } - - static int yaffs_do_xattrib_mod(struct yaffs_obj *obj, int set, const YCHAR *name, const void *value, int size, int flags) @@ -3396,7 +3386,6 @@ int yaffs_update_oh(struct yaffs_obj *in, const YCHAR *name, int force, bi->has_shrink_hdr = 1; } - return new_chunk_id; } @@ -3804,7 +3793,6 @@ int yaffs_flush_file(struct yaffs_obj *in, int update_time, int data_sync) YAFFS_OK : YAFFS_FAIL; } - /* yaffs_del_file deletes the whole file data * and the inode associated with the file. * It does not delete the links associated with the file. @@ -4306,7 +4294,6 @@ static void yaffs_empty_l_n_f(struct yaffs_dev *dev) yaffs_del_dir_contents(dev->lost_n_found); } - struct yaffs_obj *yaffs_find_by_name(struct yaffs_obj *directory, const YCHAR *name) { diff --git a/fs/yaffs2/yaffs_guts.h b/fs/yaffs2/yaffs_guts.h index e3558c5a6d..f4e7f796bd 100644 --- a/fs/yaffs2/yaffs_guts.h +++ b/fs/yaffs2/yaffs_guts.h @@ -64,8 +64,6 @@ #define YAFFS_MIN_YAFFS2_CHUNK_SIZE 1024 #define YAFFS_MIN_YAFFS2_SPARE_SIZE 32 - - #define YAFFS_ALLOCATION_NOBJECTS 100 #define YAFFS_ALLOCATION_NTNODES 100 #define YAFFS_ALLOCATION_NLINKS 100 @@ -155,7 +153,6 @@ union yaffs_tags_union { u8 as_bytes[8]; }; - /* Stuff used for extended tags in YAFFS2 */ enum yaffs_ecc_result { @@ -969,5 +966,4 @@ void yaffs_oh_size_load(struct yaffs_obj_hdr *oh, loff_t fsize); loff_t yaffs_oh_to_size(struct yaffs_obj_hdr *oh); loff_t yaffs_max_file_size(struct yaffs_dev *dev); - #endif diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c index 0eec22bc4a..d4af0a329e 100644 --- a/fs/yaffs2/yaffs_mtdif.c +++ b/fs/yaffs2/yaffs_mtdif.c @@ -15,7 +15,6 @@ #include "yportenv.h" - #include "yaffs_mtdif.h" #include <linux/mtd/mtd.h> @@ -23,7 +22,6 @@ #include <linux/time.h> #include <linux/mtd/rawnand.h> - static inline void translate_spare2oob(const struct yaffs_spare *spare, u8 *oob) { oob[0] = spare->tb0; @@ -57,7 +55,6 @@ static inline void translate_oob2spare(struct yaffs_spare *spare, u8 *oob) nspare->eccres1 = nspare->eccres2 = 0; /* FIXME */ } - int nandmtd_WriteChunkToNAND(struct yaffs_dev *dev, int chunkInNAND, const u8 *data, const struct yaffs_spare *spare) { @@ -148,7 +145,6 @@ int nandmtd_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber) /* Todo finish off the ei if required */ - retval = mtd_erase(mtd, &ei); if (retval == 0) diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c index 2bf171f99f..f21f15bfbd 100644 --- a/fs/yaffs2/yaffs_mtdif2.c +++ b/fs/yaffs2/yaffs_mtdif2.c @@ -32,7 +32,6 @@ #define yaffs_dev_to_mtd(dev) ((struct mtd_info *)((dev)->driver_context)) #define yaffs_dev_to_lc(dev) ((struct yaffs_linux_context *)((dev)->os_context)) - /* NB For use with inband tags.... * We assume that the data buffer is of size total_bytes_per_chunk so * that we can also use it to load the tags. @@ -169,7 +168,6 @@ int nandmtd2_read_chunk_tags(struct yaffs_dev *dev, int nand_chunk, return YAFFS_FAIL; } - int nandmtd2_MarkNANDBlockBad(struct yaffs_dev *dev, int blockNo) { struct mtd_info *mtd = (struct mtd_info *)(dev->driver_context); diff --git a/fs/yaffs2/yaffs_nandif.c b/fs/yaffs2/yaffs_nandif.c index ee5a172060..632f427551 100644 --- a/fs/yaffs2/yaffs_nandif.c +++ b/fs/yaffs2/yaffs_nandif.c @@ -15,7 +15,6 @@ #include "yaffs_guts.h" #include <malloc.h> - #include "yaffs_nandif.h" #include "yaffs_packedtags2.h" @@ -24,7 +23,6 @@ #include "yaffs_trace.h" #include "yaffsfs.h" - /* NB For use with inband tags.... * We assume that the data buffer is of size totalBytersPerChunk so that * we can also use it to load the tags. @@ -44,7 +42,6 @@ int ynandif_WriteChunkWithTagsToNAND(struct yaffs_dev *dev, int nand_chunk, "nandmtd2_WriteChunkWithTagsToNAND chunk %d data %p tags %p", nand_chunk, data, tags); - /* For yaffs2 writing there must be both data and tags. * If we're using inband tags, then the tags are stuffed into * the end of the data buffer. @@ -152,7 +149,6 @@ int ynandif_EraseBlockInNAND(struct yaffs_dev *dev, int blockId) } - static int ynandif_IsBlockOk(struct yaffs_dev *dev, int blockId) { struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); @@ -186,7 +182,6 @@ int ynandif_QueryNANDBlock(struct yaffs_dev *dev, int blockId, return YAFFS_OK; } - int ynandif_InitialiseNAND(struct yaffs_dev *dev) { struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); @@ -205,7 +200,6 @@ int ynandif_Deinitialise_flash_fn(struct yaffs_dev *dev) return YAFFS_OK; } - struct yaffs_dev * yaffs_add_dev_from_geometry(const YCHAR *name, const struct ynandif_Geometry *geometry) diff --git a/fs/yaffs2/yaffs_nandif.h b/fs/yaffs2/yaffs_nandif.h index e780f7f3b4..6454cea20a 100644 --- a/fs/yaffs2/yaffs_nandif.h +++ b/fs/yaffs2/yaffs_nandif.h @@ -13,7 +13,6 @@ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. */ - #ifndef __YNANDIF_H__ #define __YNANDIF_H__ @@ -61,5 +60,4 @@ struct yaffs_dev * yaffs_add_dev_from_geometry(const YCHAR *name, const struct ynandif_Geometry *geometry); - #endif diff --git a/fs/yaffs2/yaffs_osglue.h b/fs/yaffs2/yaffs_osglue.h index f629a4b59e..c2bb682c92 100644 --- a/fs/yaffs2/yaffs_osglue.h +++ b/fs/yaffs2/yaffs_osglue.h @@ -18,11 +18,9 @@ * a direct interface. */ - #ifndef __YAFFS_OSGLUE_H__ #define __YAFFS_OSGLUE_H__ - #include "yportenv.h" void yaffsfs_Lock(void); @@ -37,5 +35,4 @@ void yaffsfs_free(void *ptr); void yaffsfs_OSInitialisation(void); - #endif diff --git a/fs/yaffs2/yaffs_summary.c b/fs/yaffs2/yaffs_summary.c index 4f9449a844..2efd73a022 100644 --- a/fs/yaffs2/yaffs_summary.c +++ b/fs/yaffs2/yaffs_summary.c @@ -52,7 +52,6 @@ struct yaffs_summary_header { unsigned sum; /* Just add up all the bytes in the tags */ }; - static void yaffs_summary_clear(struct yaffs_dev *dev) { if (!dev->sum_tags) @@ -61,7 +60,6 @@ static void yaffs_summary_clear(struct yaffs_dev *dev) sizeof(struct yaffs_summary_tags)); } - void yaffs_summary_deinit(struct yaffs_dev *dev) { kfree(dev->sum_tags); @@ -168,11 +166,9 @@ static int yaffs_summary_write(struct yaffs_dev *dev, int blk) } while (result == YAFFS_OK && n_bytes > 0); yaffs_release_temp_buffer(dev, buffer); - if (result == YAFFS_OK) bi->has_summary = 1; - return result; } diff --git a/fs/yaffs2/yaffs_summary.h b/fs/yaffs2/yaffs_summary.h index be141d0733..e2e027b925 100644 --- a/fs/yaffs2/yaffs_summary.h +++ b/fs/yaffs2/yaffs_summary.h @@ -18,7 +18,6 @@ #include "yaffs_packedtags2.h" - int yaffs_summary_init(struct yaffs_dev *dev); void yaffs_summary_deinit(struct yaffs_dev *dev); @@ -33,5 +32,4 @@ int yaffs_summary_read(struct yaffs_dev *dev, int blk); void yaffs_summary_gc(struct yaffs_dev *dev, int blk); - #endif diff --git a/fs/yaffs2/yaffs_tagscompat.c b/fs/yaffs2/yaffs_tagscompat.c index 9ac5896da3..1a367fe698 100644 --- a/fs/yaffs2/yaffs_tagscompat.c +++ b/fs/yaffs2/yaffs_tagscompat.c @@ -19,7 +19,6 @@ static void yaffs_handle_rd_data_error(struct yaffs_dev *dev, int nand_chunk); - /********** Tags ECC calculations *********/ void yaffs_calc_ecc(const u8 *data, struct yaffs_spare *spare) diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c index deddbaac51..c52362b3ed 100644 --- a/fs/yaffs2/yaffs_uboot_glue.c +++ b/fs/yaffs2/yaffs_uboot_glue.c @@ -40,7 +40,6 @@ unsigned yaffs_trace_mask = 0x0; /* Disable logging */ static int yaffs_errno; - void yaffs_bug_fn(const char *fn, int n) { printf("yaffs bug at %s:%d\n", fn, n); @@ -66,7 +65,6 @@ int yaffsfs_GetLastError(void) return yaffs_errno; } - int yaffsfs_GetError(void) { return yaffs_errno; @@ -100,7 +98,6 @@ void yaffsfs_LocalInitialisation(void) /* No locking used */ } - static const char *yaffs_file_type_str(struct yaffs_stat *stat) { switch (stat->st_mode & S_IFMT) { @@ -305,7 +302,6 @@ void make_a_file(char *yaffsName, char bval, int sizeOfFile) } while (sizeOfFile > 0); - yaffs_close(outh); } @@ -341,7 +337,6 @@ void cmd_yaffs_mount(char *mp) yaffsfs_GetError(), yaffs_error_str()); } - void cmd_yaffs_umount(char *mp) { if (yaffs_unmount(mp) == -1) @@ -354,13 +349,11 @@ void cmd_yaffs_write_file(char *yaffsName, char bval, int sizeOfFile) make_a_file(yaffsName, bval, sizeOfFile); } - void cmd_yaffs_read_file(char *fn) { read_a_file(fn); } - void cmd_yaffs_mread_file(char *fn, char *addr) { int h; @@ -381,7 +374,6 @@ void cmd_yaffs_mread_file(char *fn, char *addr) yaffs_close(h); } - void cmd_yaffs_mwrite_file(char *fn, char *addr, int size) { int outh; @@ -395,7 +387,6 @@ void cmd_yaffs_mwrite_file(char *fn, char *addr, int size) yaffs_close(outh); } - void cmd_yaffs_ls(const char *mountpt, int longlist) { int i; @@ -429,7 +420,6 @@ void cmd_yaffs_ls(const char *mountpt, int longlist) yaffs_closedir(d); } - void cmd_yaffs_mkdir(const char *dir) { int retval = yaffs_mkdir(dir, 0); diff --git a/fs/yaffs2/yaffs_verify.c b/fs/yaffs2/yaffs_verify.c index 3fef28bdcb..f10fe03bc4 100644 --- a/fs/yaffs2/yaffs_verify.c +++ b/fs/yaffs2/yaffs_verify.c @@ -240,7 +240,6 @@ void yaffs_verify_file(struct yaffs_obj *obj) dev = obj->my_dev; obj_id = obj->obj_id; - /* Check file size is consistent with tnode depth */ yaffs_addr_to_chunk(dev, obj->variant.file_variant.file_size, &last_chunk, &offset_in_chunk); diff --git a/fs/yaffs2/yaffs_yaffs2.c b/fs/yaffs2/yaffs_yaffs2.c index 14d497eb99..627a701a45 100644 --- a/fs/yaffs2/yaffs_yaffs2.c +++ b/fs/yaffs2/yaffs_yaffs2.c @@ -592,7 +592,6 @@ static int yaffs2_rd_checkpt_objs(struct yaffs_dev *dev) int done = 0; LIST_HEAD(hard_list); - while (ok && !done) { ok = (yaffs2_checkpt_rd(dev, &cp, sizeof(cp)) == sizeof(cp)); if (cp.struct_type != sizeof(cp)) { diff --git a/fs/yaffs2/yaffscfg.h b/fs/yaffs2/yaffscfg.h index 718504eeac..4f723d6480 100644 --- a/fs/yaffs2/yaffscfg.h +++ b/fs/yaffs2/yaffscfg.h @@ -18,21 +18,17 @@ * a direct interface. */ - #ifndef __YAFFSCFG_H__ #define __YAFFSCFG_H__ - #include "yportenv.h" #define YAFFSFS_N_HANDLES 100 #define YAFFSFS_N_DSC 20 - struct yaffsfs_DeviceConfiguration { const YCHAR *prefix; struct yaffs_dev *dev; }; - #endif diff --git a/fs/yaffs2/yaffsfs.c b/fs/yaffs2/yaffsfs.c index d615f02d3f..c4909af9fc 100644 --- a/fs/yaffs2/yaffsfs.c +++ b/fs/yaffs2/yaffsfs.c @@ -82,7 +82,6 @@ struct yaffsfs_Handle { short int useCount; }; - struct yaffsfs_DirSearchContxt { struct yaffs_dirent de; /* directory entry */ YCHAR name[NAME_MAX + 1]; /* name of directory being searched */ diff --git a/fs/yaffs2/yaffsfs.h b/fs/yaffs2/yaffsfs.h index f2c7666625..e14f41c63e 100644 --- a/fs/yaffs2/yaffsfs.h +++ b/fs/yaffs2/yaffsfs.h @@ -18,21 +18,18 @@ * a direct interface. */ - #ifndef __YAFFSFS_H__ #define __YAFFSFS_H__ #include "yaffscfg.h" #include "yportenv.h" - #ifndef NAME_MAX #define NAME_MAX 256 #endif #define YAFFS_MAX_FILE_SIZE (0x800000000LL - 1) - struct yaffs_dirent { long d_ino; /* inode number */ off_t d_off; /* offset to this dirent */ @@ -44,8 +41,6 @@ struct yaffs_dirent { typedef struct opaque_structure yaffs_DIR; - - struct yaffs_stat { int st_dev; /* device */ int st_ino; /* inode */ @@ -69,13 +64,11 @@ struct yaffs_stat { #endif }; - struct yaffs_utimbuf { unsigned long actime; unsigned long modtime; }; - int yaffs_open(const YCHAR *path, int oflag, int mode) ; int yaffs_close(int fd) ; @@ -108,7 +101,6 @@ int yaffs_fstat(int fd, struct yaffs_stat *buf) ; int yaffs_utime(const YCHAR *path, const struct yaffs_utimbuf *buf); int yaffs_futime(int fd, const struct yaffs_utimbuf *buf); - int yaffs_setxattr(const char *path, const char *name, const void *data, int size, int flags); int yaffs_lsetxattr(const char *path, const char *name, @@ -131,7 +123,6 @@ int yaffs_listxattr(const char *path, char *list, int size); int yaffs_llistxattr(const char *path, char *list, int size); int yaffs_flistxattr(int fd, char *list, int size); - #ifdef CONFIG_YAFFS_WINCE int yaffs_set_wince_times(int fd, @@ -164,7 +155,6 @@ int yaffs_unmount(const YCHAR *path) ; int yaffs_unmount2(const YCHAR *path, int force); int yaffs_remount(const YCHAR *path, int force, int read_only); - int yaffs_sync(const YCHAR *path) ; int yaffs_symlink(const YCHAR *oldpath, const YCHAR *newpath); diff --git a/fs/yaffs2/ydirectenv.h b/fs/yaffs2/ydirectenv.h index 790f8512f7..14b13ce2bd 100644 --- a/fs/yaffs2/ydirectenv.h +++ b/fs/yaffs2/ydirectenv.h @@ -27,8 +27,6 @@ void yaffs_bug_fn(const char *file_name, int line_no); - - #define YCHAR char #define YUCHAR unsigned char #define _Y(x) x @@ -45,7 +43,6 @@ void yaffs_bug_fn(const char *file_name, int line_no); #define yaffs_strncmp(a, b, c) strncmp(a, b, c) #endif - void yaffs_qsort(void *aa, size_t n, size_t es, int (*cmp)(const void *, const void *)); @@ -62,7 +59,6 @@ void yaffs_qsort(void *aa, size_t n, size_t es, printf("yaffs: " fmt "\n", ##__VA_ARGS__); \ } while (0) - #define YAFFS_LOSTNFOUND_NAME "lost+found" #define YAFFS_LOSTNFOUND_PREFIX "obj" diff --git a/fs/yaffs2/yportenv.h b/fs/yaffs2/yportenv.h index 081391a1d0..b23042948d 100644 --- a/fs/yaffs2/yportenv.h +++ b/fs/yaffs2/yportenv.h @@ -13,7 +13,6 @@ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. */ - #ifndef __YPORTENV_H__ #define __YPORTENV_H__ @@ -27,11 +26,9 @@ typedef unsigned short u16; typedef unsigned u32; #endif - #ifdef CONFIG_YAFFS_PROVIDE_DEFS /* File types */ - #define DT_UNKNOWN 0 #define DT_FIFO 1 #define DT_CHR 2 @@ -42,7 +39,6 @@ typedef unsigned u32; #define DT_SOCK 12 #define DT_WHT 14 - /* * Attribute flags. * These are or-ed together to select what has been changed. @@ -69,13 +65,10 @@ struct iattr { #endif - - #if defined CONFIG_YAFFS_WINCE #include "ywinceenv.h" - #elif defined CONFIG_YAFFS_DIRECT /* Direct interface */ @@ -215,7 +208,6 @@ struct iattr { #define ELOOP 40 #endif - /* Mode flags */ #ifndef S_IFMT @@ -258,7 +250,6 @@ struct iattr { #define S_ISCHR(m) (((m) & S_IFMT) == S_IFCHR) #define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO) - #ifndef S_IREAD #define S_IREAD 0000400 #endif diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c index 722c6a8617..0eceafab2a 100644 --- a/fs/zfs/dev.c +++ b/fs/zfs/dev.c @@ -7,7 +7,6 @@ * Sysgo AG, <www.elinos.com>, Pavel Bartusek <pba@sysgo.com> */ - #include <config.h> #include <fs_internal.h> #include <zfs_common.h> diff --git a/fs/zfs/zfs.c b/fs/zfs/zfs.c index 9906d553fa..410a61aa61 100644 --- a/fs/zfs/zfs.c +++ b/fs/zfs/zfs.c @@ -50,10 +50,8 @@ struct blk_desc *zfs_dev_desc; #include <zfs/dsl_dir.h> #include <zfs/dsl_dataset.h> - #define ZPOOL_PROP_BOOTFS "bootfs" - /* * For nvlist manipulation. (from nvpair.h) */ @@ -66,7 +64,6 @@ struct blk_desc *zfs_dev_desc; #define DATA_TYPE_NVLIST 19 #define DATA_TYPE_NVLIST_ARRAY 20 - /* * Macros to get fields in a bp or DVA. */ @@ -120,7 +117,6 @@ struct blk_desc *zfs_dev_desc; ((zap_leaf_chunk_t *)(l->l_hash + ZAP_LEAF_HASH_NUMENTRIES(bs)))[idx] #define ZAP_LEAF_ENTRY(l, bs, idx) (&ZAP_LEAF_CHUNK(l, bs, idx).l_entry) - /* * Decompression Entry - lzjb */ @@ -128,8 +124,6 @@ struct blk_desc *zfs_dev_desc; #define NBBY 8 #endif - - typedef int zfs_decomp_func_t(void *s_start, void *d_start, uint32_t s_len, uint32_t d_len); typedef struct decomp_entry { @@ -176,9 +170,6 @@ struct zfs_data { }; - - - static int zlib_decompress(void *s, void *d, uint32_t slen, uint32_t dlen) @@ -206,8 +197,6 @@ static decomp_entry_t decomp_table[ZIO_COMPRESS_FUNCTIONS] = { {"gzip-9", zlib_decompress}, /* ZIO_COMPRESS_GZIP9 */ }; - - static int zio_read_data(blkptr_t *bp, zfs_endian_t endian, void *buf, struct zfs_data *data); @@ -231,7 +220,6 @@ zfs_log2(uint64_t num) return i; } - /* Checksum Functions */ static void zio_checksum_off(const void *buf __attribute__ ((unused)), @@ -812,7 +800,6 @@ zap_leaf_array_get(zap_leaf_phys_t *l, zfs_endian_t endian, int blksft, return ZFS_ERR_NONE; } - /* * Given a zap_leaf_phys_t, walk thru the zap leaf chunks to get the * value for the property "name". @@ -879,7 +866,6 @@ zap_leaf_lookup(zap_leaf_phys_t *l, zfs_endian_t endian, return ZFS_ERR_FILE_NOT_FOUND; } - /* Verify if this is a fat zap header block */ static int zap_verify(zap_phys_t *zap) @@ -1029,7 +1015,6 @@ fzap_iterate(dnode_end_t *zap_dnode, zap_phys_t *zap, return 0; } - /* * Read in the data of a zap object and find the value for a matching * property name. @@ -1104,7 +1089,6 @@ zap_iterate(dnode_end_t *zap_dnode, return 0; } - /* * Get the dnode of an object number from the metadnode of an object set. * @@ -1299,7 +1283,6 @@ dnode_get_path(dnode_end_t *mdn, const char *path_in, dnode_end_t *dn, return err; } - /* * Given a MOS metadnode, get the metadnode of a given filesystem name (fsname), * e.g. pool/rootfs, or a given object number (obj), e.g. the object number @@ -1434,7 +1417,6 @@ dnode_get_fullpath(const char *fullpath, dnode_end_t *mdn, fsname, snapname, filename); } - err = get_filesystem_dnode(&(data->mos), fsname, dn, data); if (err) { @@ -2336,7 +2318,6 @@ zfs_ls(device_t device, const char *path, return err; } - zap_iterate(&dn, iterate_zap_fs, data); err = dnode_get(&(data->mos), headobj, DMU_OT_DSL_DATASET, &dn, data); diff --git a/include/axp_pmic.h b/include/axp_pmic.h index aabafc8501..ae62ef0d76 100644 --- a/include/axp_pmic.h +++ b/include/axp_pmic.h @@ -33,6 +33,7 @@ enum { AXP221_ID, AXP223_ID, AXP313_ID, + AXP717_ID, AXP803_ID, AXP806_ID, AXP809_ID, diff --git a/include/bloblist.h b/include/bloblist.h index 7fbdd622bc..b0706b5637 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -78,12 +78,10 @@ enum { BLOBLIST_VERSION = 1, BLOBLIST_MAGIC = 0x4a0fb10b, - /* - * FIXME: - * Register convention version should be placed into a higher byte - * https://github.com/FirmwareHandoff/firmware_handoff/issues/32 - */ - BLOBLIST_REGCONV_VER = 1 << 24, + BLOBLIST_REGCONV_SHIFT_64 = 32, + BLOBLIST_REGCONV_SHIFT_32 = 24, + BLOBLIST_REGCONV_MASK = 0xff, + BLOBLIST_REGCONV_VER = 1, BLOBLIST_BLOB_ALIGN_LOG2 = 3, BLOBLIST_BLOB_ALIGN = 1 << BLOBLIST_BLOB_ALIGN_LOG2, diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b75c648388..e3432ebeaa 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -15,7 +15,7 @@ #include <configs/ti_omap3_common.h> /* Board NAND Info. */ -#ifdef CONFIG_MTD_RAW_NAND +#if defined(CONFIG_MTD_RAW_NAND) #define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ 11, 12, 13, 14, 16, 17, 18, 19, 20, \ 21, 22, 23, 24, 25, 26, 27, 28, 30, \ @@ -35,61 +35,8 @@ * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 * RootFS Remaining Flash Space @ 0xB20000 */ -#endif /* CONFIG_MTD_RAW_NAND */ - -/* Environment information */ -#define CFG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "console=ttyS2,115200n8\0" \ - "fdtfile=am3517-evm.dtb\0" \ - "fdtaddr=0x82C00000\0" \ - "vram=16M\0" \ - "bootenv=uEnv.txt\0" \ - "cmdline=\0" \ - "optargs=\0" \ - "mmcdev=0\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext4 rootwait fixrtc\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "${mtdparts} " \ - "${optargs} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype} " \ - "${cmdline}\0" \ - "nandargs=setenv bootargs console=${console} " \ - "${mtdparts} " \ - "${optargs} " \ - "root=ubi0:rootfs rw ubi.mtd=rootfs " \ - "rootfstype=ubifs rootwait " \ - "${cmdline}\0" \ - "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\ - "importbootenv=echo Importing environment from mmc ...; " \ - "env import -t ${loadaddr} ${filesize}\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "nand read ${loadaddr} 2a0000 800000; " \ - "nand read ${fdtaddr} aa0000 80000; " \ - "bootm ${loadaddr} - ${fdtaddr}\0" \ - -/* Miscellaneous configurable options */ - -/* memtest works on */ -/* FLASH and environment organization */ - -/* **** PISMO SUPPORT *** */ - /* on one chip */ - -#if defined(CONFIG_MTD_RAW_NAND) #define CFG_SYS_FLASH_BASE NAND_BASE -#endif +#endif /* CONFIG_MTD_RAW_NAND */ #endif /* __CONFIG_H */ diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 6fbcec0898..9525657558 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright (C) 2024 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2014 Stefan Roese <sr@denx.de> */ @@ -16,16 +17,9 @@ * U-Boot into it. */ -/* I2C */ #define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-common.h" - -/* * Memory layout while starting into the bin_hdr via the * BootROM: * @@ -38,21 +32,54 @@ * L2 cache thus cannot be used. */ -/* SPL */ -/* Defines for SPL */ +/* Keep device tree and initrd in lower memory so the kernel can access them */ +#define RELOCATION_LIMITS_ENV_SETTINGS \ + "fdt_high=0x10000000\0" \ + "initrd_high=0x10000000\0" -/* Default Environment */ +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#ifndef CONFIG_SPL_BUILD -#define CFG_EXTRA_ENV_SETTINGS \ - "initrd_high=0xffffffff\0" \ - "ramdisk_addr_r=0x8000000\0" \ - "usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \ - "ethmtu=1500\0eth1mtu=1500\0" \ - "update_uboot=sf probe; dhcp; " \ - "mw.b ${loadaddr} 0x0 0xd0000; " \ - "tftpboot ${loadaddr} u-boot-with-spl.kwb; " \ +#define KERNEL_ADDR_R __stringify(0x1000000) +#define FDT_ADDR_R __stringify(0x2000000) +#define RAMDISK_ADDR_R __stringify(0x2200000) +#define SCRIPT_ADDR_R __stringify(0x1800000) +#define PXEFILE_ADDR_R __stringify(0x1900000) + +#define EXTRA_ENV_SETTINGS_LEGACY \ + "bootargs_legacy=console=ttyS0,115200 ip=off initrd=0x8000040,8M " \ + "root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 " \ + "flash_size=8 SataLedSpecial=1 HddHotplug=1\0" \ + "bootcmd_legacy=sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; " \ + "sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \ + "setenv bootargs $bootargs_legacy; " \ + "bootm ${loadaddr} ${ramdisk_addr_r}\0" \ + "usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \ + "ethmtu=1500\0eth1mtu=1500\0" \ + "update_uboot=sf probe; dhcp; " \ + "mw.b ${loadaddr} 0x0 0xd0000; " \ + "tftpboot ${loadaddr} u-boot-with-spl.kwb; " \ "sf update ${loadaddr} 0x0 0xd0000\0" -/* increase autoneg timeout, my NIC sucks */ +#define LOAD_ADDRESS_ENV_SETTINGS \ + "kernel_addr_r=" KERNEL_ADDR_R "\0" \ + "fdt_addr_r=" FDT_ADDR_R "\0" \ + "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ + "scriptaddr=" SCRIPT_ADDR_R "\0" \ + "pxefile_addr_r=" PXEFILE_ADDR_R "\0" + +#define CFG_EXTRA_ENV_SETTINGS \ + RELOCATION_LIMITS_ENV_SETTINGS \ + LOAD_ADDRESS_ENV_SETTINGS \ + EXTRA_ENV_SETTINGS_LEGACY \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "console=ttyS0,115200\0" + +#endif /* CONFIG_SPL_BUILD */ #endif /* _CONFIG_SYNOLOGY_DS414_H */ diff --git a/include/configs/lion_rk3368.h b/include/configs/lion_rk3368.h deleted file mode 100644 index 0d29e1ddc7..0000000000 --- a/include/configs/lion_rk3368.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH - */ - -#ifndef __CONFIGS_LION_RK3368_H -#define __CONFIGS_LION_RK3368_H - -#include <configs/rk3368_common.h> - -#define KERNEL_LOAD_ADDR 0x280000 -#define DTB_LOAD_ADDR 0x5600000 -#define INITRD_LOAD_ADDR 0x5bf0000 -/* PHY needs longer aneg time at 1G */ - -#endif diff --git a/include/configs/nanopi-r6c-rk3588s.h b/include/configs/nanopi-r6c-rk3588s.h new file mode 100644 index 0000000000..2b57d60eb5 --- /dev/null +++ b/include/configs/nanopi-r6c-rk3588s.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __NANOPI_R6C_RK3588S_H +#define __NANOPI_R6C_RK3588S_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __NANOPI_R6C_RK3588S_H */ diff --git a/include/configs/nanopi-r6s-rk3588s.h b/include/configs/nanopi-r6s-rk3588s.h new file mode 100644 index 0000000000..a1b19783c5 --- /dev/null +++ b/include/configs/nanopi-r6s-rk3588s.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __NANOPI_R6S_RK3588S_H +#define __NANOPI_R6S_RK3588S_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __NANOPI_R6S_RK3588S_H */ diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 861154fbeb..2de55538fd 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,24 +8,28 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xfff80000 +#define CFG_IRAM_BASE 0xfff80000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x03e00000\0" \ - "fdtoverlay_addr_r=0x03f00000\0" \ - "kernel_addr_r=0x00680000\0" \ - "ramdisk_addr_r=0x04000000\0" +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x01e00000\0" \ + "fdtoverlay_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02080000\0" \ + "ramdisk_addr_r=0x06000000\0" \ + "kernel_comp_addr_r=0x08000000\0" \ + "kernel_comp_size=0x2000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - ENV_MEM_LAYOUT_SETTINGS \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3308_COMMON_H */ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 2c40674b22..bd2bfe2910 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -8,25 +8,28 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xff090000 +#define CFG_IRAM_BASE 0xff090000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x01f00000\0" \ - "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x06000000\0" \ - "kernel_comp_addr_r=0x08000000\0" \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x01e00000\0" \ + "fdtoverlay_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02080000\0" \ + "ramdisk_addr_r=0x06000000\0" \ + "kernel_comp_addr_r=0x08000000\0" \ "kernel_comp_size=0x2000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3328_COMMON_H */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 4e75771055..d652ae4ca3 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -8,36 +8,36 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xff8c0000 +#define CFG_IRAM_BASE 0xff8c0000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 #ifndef CONFIG_SPL_BUILD -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "script_offset_f=0xffe000\0" \ - "script_size_f=0x2000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x01f00000\0" \ - "fdtoverlay_addr_r=0x02000000\0" \ - "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x06000000\0" \ - "kernel_comp_addr_r=0x08000000\0" \ - "kernel_comp_size=0x2000000\0" - #ifndef ROCKCHIP_DEVICE_SETTINGS #define ROCKCHIP_DEVICE_SETTINGS #endif -#define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x01e00000\0" \ + "fdtoverlay_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02080000\0" \ + "ramdisk_addr_r=0x06000000\0" \ + "kernel_comp_addr_r=0x08000000\0" \ + "kernel_comp_size=0x2000000\0" + +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* CONFIG_SPL_BUILD */ -#endif +#endif /* __CONFIG_RK3399_COMMON_H */ diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 48f93083de..09b7b71c6a 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ @@ -10,7 +10,7 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xfdcc0000 +#define CFG_IRAM_BASE 0xfdcc0000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 @@ -28,10 +28,10 @@ "kernel_comp_size=0x8000000\0" #define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3568_COMMON_H */ diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h index 70430612ef..e6654c275a 100644 --- a/include/configs/rk3588_common.h +++ b/include/configs/rk3588_common.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2021 Rockchip Electronics Co., Ltd * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. @@ -26,11 +26,11 @@ "ramdisk_addr_r=0x12180000\0" \ "kernel_comp_size=0x8000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ENV_MEM_LAYOUT_SETTINGS \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" #endif /* __CONFIG_RK3588_COMMON_H */ diff --git a/include/configs/turris_1x.h b/include/configs/turris_1x.h new file mode 100644 index 0000000000..3d398a6c1e --- /dev/null +++ b/include/configs/turris_1x.h @@ -0,0 +1,335 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* (C) 2022 Pali Rohár <pali@kernel.org> */ + +#ifndef _CONFIG_TURRIS_1X_H +#define _CONFIG_TURRIS_1X_H + +#include <linux/sizes.h> + +/* + * Turris 1.x memory map: + * + * 0x0000_0000 - 0x7fff_ffff 2 GB DDR cacheable + * 0x8000_0000 - 0xbfff_ffff 1 GB PCIe MEM (bus 1-2) non-cacheable + * 0xc000_0000 - 0xc01f_ffff 2 MB PCIe MEM (bus 3) non-cacheable + * 0xc020_0000 - 0xeeff_ffff 750 MB unused + * 0xef00_0000 - 0xefff_ffff 16 MB NOR (CS0) non-cacheable + * 0xf000_0000 - 0xf8f7_ffff 143 MB unused + * 0xf8f8_0000 - 0xf8ff_ffff 512 kB L2 SRAM cacheable (early boot, SD card only) + * 0xf900_0000 - 0xff6f_ffff 103 MB unused + * 0xff70_0000 - 0xff7f_ffff 1 MB CCSR non-cacheable (SPL only) + * 0xff80_0000 - 0xff83_ffff 256 kB NAND (CS1) non-cacheable + * 0xffa0_0000 - 0xffa1_ffff 128 kB CPLD (CS3) non-cacheable + * 0xffc0_0000 - 0xffc2_ffff 192 kB PCIe IO non-cacheable + * 0xffd0_0000 - 0xffd0_3fff 16 kB L1 stack cacheable (early boot) + * 0xffe0_0000 - 0xffef_ffff 1 MB CCSR non-cacheable (not in SPL) + * 0xffff_f000 - 0xffff_ffff 4 kB Boot page non-cacheable + */ + +/* + * Global settings + */ + +/* + * CONFIG_ENABLE_36BIT_PHYS needs to be always defined when processor supports + * 36-bit addressing (which is case for P2020), also when only 32-bit addressing + * mode is used. Name of this config option is misleading and should have been + * called SUPPORT instead of ENABLE. + * When CONFIG_PHYS_64BIT is set then 36-bit addressing is used, when unset then + * 32-bit addressing is used. Name of this config option is misleading too and + * should have been called 36BIT and ENABLED, not 64BIT. + * Due to performance reasons (see document AN4064), Turris 1.x boards use only + * 32-bit addressing. Also all config options are currently defined only for + * 32-bit addressing, so compiling U-Boot for 36-bit addressing is not possible + * yet. + */ +#ifdef CONFIG_PHYS_64BIT +#error "36-bit addressing is not implemented for this board" +#endif + +/* + * Boot settings + */ + +/* + * Booting from SD card + * BootROM configures L2 cache as SRAM, loads image from SD card into L2 SRAM + * and starts executing directly _start entry point in L2 SRAM. Therefore reset + * vector is not used and maximal size of the image is L2 cache size. For builds + * with SPL there is no limit of U-Boot proper as BootROM loads SPL which then + * loads U-Boot proper directly into DDR. + */ + +/* + * For SD card builds without SPL it is needed to set CONFIG_SYS_RAMBOOT + * + * if CONFIG_SPL_BUILD + * if CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR + * define CONFIG_SPL_MAX_SIZE = (CONFIG_SYS_L2_SIZE+CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA + * * SZ_512) + * else + * define CONFIG_SPL_MAX_SIZE = CONFIG_SYS_L2_SIZE + */ + +#ifdef CONFIG_SDCARD +#define CFG_SYS_MMC_U_BOOT_SIZE CONFIG_BOARD_SIZE_LIMIT +#define CFG_SYS_MMC_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_MMC_U_BOOT_START CONFIG_TEXT_BASE +#endif + +/* + * Booting from NOR + * Last 4kB page of the NOR is mapped into CPU address space and CPU starts + * executing last instruction of that page, which is reset vector address. + * We have 16 MB large NOR memory, so define correct reset vector address. + * + * CONFIG_RESET_VECTOR_ADDRESS = (CONFIG_SYS_FLASH_BASE + SZ_16M - 4) + */ + +/* + * CONFIG_BOARD_SIZE_LIMIT must be hex number because it is used in Makefile. + * For NOR build, size of the U-Boot binary must always be 768 kB. + * For SD card build with SPL, there is no limit, just broken build system which + * cannot fill CFG_SYS_MMC_U_BOOT_SIZE and CONFIG_SYS_MONITOR_LEN values + * automatically. So choose it as lowest value as possible with which build + * process does not fail, to minimize final binary size. + * For SD card build without SPL, there is upper limit of L2 cache size. + * + * if SDCARD + * CONFIG_BOARD_SIZE_LIMIT = 0x000c0000 // 768 kB + * elif SPL + * CONFIG_BOARD_SIZE_LIMIT = 0x00100000 // 1 MB + * else + * CONFIG_BOARD_SIZE_LIMIT = 0x00080000 // 512 kB - must be same as CONFIG_SYS_L2_SIZE + */ + +/* + * Initial stack in L1 cache + */ + +#define CFG_SYS_INIT_RAM_ADDR 0xffd00000 +#define CFG_SYS_INIT_RAM_ADDR_PHYS CFG_SYS_INIT_RAM_ADDR +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW CFG_SYS_INIT_RAM_ADDR_PHYS +#define CFG_SYS_INIT_RAM_SIZE SZ_16K + +#define CFG_SYS_GBL_DATA_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET CFG_SYS_GBL_DATA_OFFSET + +/* + * Initial SRAM in L2 cache + */ + +/* Initial SRAM is used only for SD card boot in first stage image */ +#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) +#define CFG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CFG_SYS_INIT_L2_ADDR_PHYS CFG_SYS_INIT_L2_ADDR +/* + * CONFIG_SPL_RELOC_TEXT_BASE = CONFIG_SYS_MONITOR_BASE + * CONFIG_SPL_GD_ADDR = (CFG_SYS_INIT_L2_ADDR + 112 * SZ_1K) + * CONFIG_SPL_RELOC_STACK = (CFG_SYS_INIT_L2_ADDR + 116 * SZ_1K) + * CONFIG_SPL_RELOC_MALLOC_ADDR = (CFG_SYS_INIT_L2_ADDR + 148 * SZ_1K) + * CONFIG_SPL_RELOC_MALLOC_SIZE = (364 * SZ_1K) + */ +#endif + +/* + * CCSR + */ + +#define CFG_SYS_CCSRBAR 0xffe00000 +#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR +/* + * CFG_SYS_CCSRBAR_PHYS_HIGH = 0x0 + */ + +/* + * U-Boot _start code expects that if CCSRBAR is configured to its default + * location and automatically relocate it to the new CONFIG_SYS_CCSRBAR_PHYS + * location. Relocation to the new location can be skipped by defining macro + * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. + * + * All addresses in device tree are set to according the new relocated CCSRBAR. + * So device tree code cannot be used when CONFIG_SYS_CCSR_DO_NOT_RELOCATE is + * set. + * + * If CCSRBAR is not configured to its default location then _start code hangs + * or crashes. + * + * So relocation of CCSRBAR must be disabled in every code which runs before + * U-Boot proper (e.g. SPL), otherwise U-Boot proper's _start code crashes. + */ + +/* + * DDR + */ + +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE + +#define CFG_SYS_I2C_PCA9557_ADDR 0x18 +#define SPD_EEPROM_ADDRESS 0x52 + +/* + * NOR + */ + +#define CFG_SYS_FLASH_BASE 0xef000000 +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE +#define CFG_RESET_VECTOR_ADDRESS (CFG_SYS_FLASH_BASE + SZ_16M - 4) + +/* + * CONFIG_SYS_BR0_PRELIM = (BR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_MS_GPCM | BR_V) + * CONFIG_SYS_OR0_PRELIM = (OR_AM_16MB | OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS + * | OR_GPCM_SCY_15 | OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD) + */ + +/* + * NAND + */ + +#define CFG_SYS_NAND_BASE 0xff800000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE + +/* + * CONFIG_SYS_BR1_PRELIM = BR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) | BR_PS_8 | BR_MS_FCM | BR_V) + * CONFIG_SYS_OR1_PRELIM = (OR_AM_256KB | OR_FCM_PGS | OR_FCM_CSCT | OR_FCM_CST | OR_FCM_CHT + * | OR_FCM_SCY_1 | OR_FCM_TRLX | OR_FCM_EHTR) + */ + +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } +#define CFG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM + +/* + * CPLD + */ + +#define CFG_SYS_CPLD_BASE 0xffa00000 +#define CFG_SYS_CPLD_BASE_PHYS CFG_SYS_CPLD_BASE + +/* + * CONFIG_SYS_BR3_PRELIM = (BR_PHYS_ADDR(CFG_SYS_CPLD_BASE_PHYS) | BR_PS_8 | BR_MS_GPCM | BR_V) + * CONFIG_SYS_OR3_PRELIM = (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | OR_GPCM_SCY_15 + * | OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD) + */ + +/* + * Serial Port + */ + +#if !CONFIG_IS_ENABLED(DM_SERIAL) +#define CFG_SYS_NS16550_CLK get_bus_freq(0) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR + 0x4500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR + 0x4600) +#endif + +/* + * PCIe + */ + +/* PCIe bus on mPCIe slot 1 (CN5) for expansion mPCIe card */ +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_IO_VIRT 0xffc00000 +#define CFG_SYS_PCIE1_MEM_PHYS CFG_SYS_PCIE1_MEM_VIRT +#define CFG_SYS_PCIE1_IO_PHYS CFG_SYS_PCIE1_IO_VIRT + +/* PCIe bus on mPCIe slot 2 (CN6) for expansion mPCIe card */ +#define CFG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE2_IO_VIRT 0xffc10000 +#define CFG_SYS_PCIE2_MEM_PHYS CFG_SYS_PCIE2_MEM_VIRT +#define CFG_SYS_PCIE2_IO_PHYS CFG_SYS_PCIE2_IO_VIRT + +/* PCIe bus for on-board TUSB7340RKM USB 3.0 xHCI controller */ +#define CFG_SYS_PCIE3_MEM_VIRT 0xc0000000 +#define CFG_SYS_PCIE3_IO_VIRT 0xffc20000 +#define CFG_SYS_PCIE3_MEM_PHYS CFG_SYS_PCIE3_MEM_VIRT +#define CFG_SYS_PCIE3_IO_PHYS CFG_SYS_PCIE3_IO_VIRT + +/* + * eSDHC + */ + +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define SDHC_WP_IS_GPIO /* SDHC_WP pin is not connected to SD card slot, it is GPIO pin */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 64 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CFG_SYS_BOOTMAPSZ SZ_64M /* Initial Memory for Linux */ + +/* + * Environment Configuration + */ + +#ifdef CONFIG_SDCARD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(NVME, nvme, 0) \ + func(SCSI, scsi, 0) \ + func(USB, usb, 0) \ + func(USB, usb, 1) \ + func(USB, usb, 2) \ + func(USB, usb, 3) \ + func(USB, usb, 4) \ + func(UBIFS, ubifs, 0, rootfs, rootfs, 512) \ + func(UBIFS, ubifs, 1, rootfs, rootfs, 2048) \ + func(DHCP, dhcp, na) +#else +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(NVME, nvme, 0) \ + func(SCSI, scsi, 0) \ + func(USB, usb, 0) \ + func(USB, usb, 1) \ + func(USB, usb, 2) \ + func(USB, usb, 3) \ + func(USB, usb, 4) \ + func(DHCP, dhcp, na) +#endif + +#include <config_distro_bootcmd.h> + +/* These boot source switches macros must be constant numbers as they are stringified */ +#define __SW_BOOT_MASK 0x03 +#define __SW_BOOT_NOR 0xc8 +#define __SW_BOOT_SPI 0x28 +#define __SW_BOOT_SD 0x68 +#define __SW_BOOT_SD2 0x18 +#define __SW_BOOT_NAND 0xe8 +#define __SW_BOOT_PCIE 0xa8 +#define __SW_NOR_BANK_MASK 0xfd +#define __SW_NOR_BANK_UP 0x00 +#define __SW_NOR_BANK_LO 0x02 +#define __SW_BOOT_NOR_BANK_UP 0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ +#define __SW_BOOT_NOR_BANK_LO 0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ +#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ + +#include "p1_p2_bootsrc.h" + +#define REBOOT_ENV_SETTINGS \ + RST_NOR_UP_CMD(reboot_to_nor, echo Rebooting to NOR bootloader;) \ + RST_SD_CMD(reboot_to_sd, echo Rebooting to SD bootloader;) \ + RST_DEF_CMD(reboot_to_def, echo Rebooting to default bootloader;) \ + "" + +#define BOOTCMD_RESCUE \ + "setenv bootargs root=mtd2 ro rootfstype=jffs2 console=ttyS0,115200; " \ + "mw.b 0xffa00002 0x03; " \ + "bootm 0xef020000 - 0xef000000" \ + "" + +#define CFG_EXTRA_ENV_SETTINGS \ + "fdt_addr_r=0x2000000\0" \ + "kernel_addr_r=0x2100000\0" \ + "scriptaddr=0x3000000\0" \ + "pxefile_addr_r=0x3100000\0" \ + "ramdisk_addr_r=0x4000000\0" \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "fdt_addr=0xef000000\0" \ + "bootcmd_rescue=" BOOTCMD_RESCUE "\0" \ + REBOOT_ENV_SETTINGS \ + BOOTENV + +#endif /* _CONFIG_TURRIS_1X_H */ diff --git a/include/configs/verdin-am62.h b/include/configs/verdin-am62.h index ac44809fdf..e8bc22d4c3 100644 --- a/include/configs/verdin-am62.h +++ b/include/configs/verdin-am62.h @@ -35,9 +35,18 @@ "" #endif /* CONFIG_TARGET_VERDIN_AM62_A53 */ +#define EXTRA_ENV_DFUARGS \ + "dfu_alt_info_ram=" \ + "tispl.bin ram 0x80080000 0x200000;" \ + "u-boot.img ram 0x81000000 0x400000;" \ + "loadaddr ram " __stringify(CONFIG_SYS_LOAD_ADDR) " 0x80000;" \ + "scriptaddr ram " __stringify(SCRIPTADDR) " 0x80000;" \ + "ramdisk_addr_r ram " __stringify(RAMDISK_ADDR_R) " 0x8000000\0" + /* Incorporate settings into the U-Boot environment */ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ + EXTRA_ENV_DFUARGS \ MEM_LAYOUT_ENV_SETTINGS \ "boot_script_dhcp=boot.scr\0" \ "console=ttyS2\0" \ diff --git a/include/dt-bindings/clock/axg-aoclkc.h b/include/dt-bindings/clock/axg-aoclkc.h deleted file mode 100644 index 8ec4a269c7..0000000000 --- a/include/dt-bindings/clock/axg-aoclkc.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -/* - * Copyright (c) 2016 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Copyright (c) 2018 Amlogic, inc. - * Author: Qiufang Dai <qiufang.dai@amlogic.com> - */ - -#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK -#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK - -#define CLKID_AO_REMOTE 0 -#define CLKID_AO_I2C_MASTER 1 -#define CLKID_AO_I2C_SLAVE 2 -#define CLKID_AO_UART1 3 -#define CLKID_AO_UART2 4 -#define CLKID_AO_IR_BLASTER 5 -#define CLKID_AO_SAR_ADC 6 -#define CLKID_AO_CLK81 7 -#define CLKID_AO_SAR_ADC_SEL 8 -#define CLKID_AO_SAR_ADC_DIV 9 -#define CLKID_AO_SAR_ADC_CLK 10 -#define CLKID_AO_CTS_OSCIN 11 -#define CLKID_AO_32K_PRE 12 -#define CLKID_AO_32K_DIV 13 -#define CLKID_AO_32K_SEL 14 -#define CLKID_AO_32K 15 -#define CLKID_AO_CTS_RTC_OSCIN 16 - -#endif diff --git a/include/dt-bindings/clock/g12a-aoclkc.h b/include/dt-bindings/clock/g12a-aoclkc.h deleted file mode 100644 index e916e49ff2..0000000000 --- a/include/dt-bindings/clock/g12a-aoclkc.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -/* - * Copyright (c) 2016 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Copyright (c) 2018 Amlogic, inc. - * Author: Qiufang Dai <qiufang.dai@amlogic.com> - */ - -#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK -#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK - -#define CLKID_AO_AHB 0 -#define CLKID_AO_IR_IN 1 -#define CLKID_AO_I2C_M0 2 -#define CLKID_AO_I2C_S0 3 -#define CLKID_AO_UART 4 -#define CLKID_AO_PROD_I2C 5 -#define CLKID_AO_UART2 6 -#define CLKID_AO_IR_OUT 7 -#define CLKID_AO_SAR_ADC 8 -#define CLKID_AO_MAILBOX 9 -#define CLKID_AO_M3 10 -#define CLKID_AO_AHB_SRAM 11 -#define CLKID_AO_RTI 12 -#define CLKID_AO_M4_FCLK 13 -#define CLKID_AO_M4_HCLK 14 -#define CLKID_AO_CLK81 15 -#define CLKID_AO_SAR_ADC_SEL 16 -#define CLKID_AO_SAR_ADC_CLK 18 -#define CLKID_AO_CTS_OSCIN 19 -#define CLKID_AO_32K 23 -#define CLKID_AO_CEC 27 -#define CLKID_AO_CTS_RTC_OSCIN 28 - -#endif diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h deleted file mode 100644 index a93b58c5e1..0000000000 --- a/include/dt-bindings/clock/g12a-clkc.h +++ /dev/null @@ -1,153 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ OR MIT */ -/* - * Meson-G12A clock tree IDs - * - * Copyright (c) 2018 Amlogic, Inc. All rights reserved. - */ - -#ifndef __G12A_CLKC_H -#define __G12A_CLKC_H - -#define CLKID_SYS_PLL 0 -#define CLKID_FIXED_PLL 1 -#define CLKID_FCLK_DIV2 2 -#define CLKID_FCLK_DIV3 3 -#define CLKID_FCLK_DIV4 4 -#define CLKID_FCLK_DIV5 5 -#define CLKID_FCLK_DIV7 6 -#define CLKID_GP0_PLL 7 -#define CLKID_CLK81 10 -#define CLKID_MPLL0 11 -#define CLKID_MPLL1 12 -#define CLKID_MPLL2 13 -#define CLKID_MPLL3 14 -#define CLKID_DDR 15 -#define CLKID_DOS 16 -#define CLKID_AUDIO_LOCKER 17 -#define CLKID_MIPI_DSI_HOST 18 -#define CLKID_ETH_PHY 19 -#define CLKID_ISA 20 -#define CLKID_PL301 21 -#define CLKID_PERIPHS 22 -#define CLKID_SPICC0 23 -#define CLKID_I2C 24 -#define CLKID_SANA 25 -#define CLKID_SD 26 -#define CLKID_RNG0 27 -#define CLKID_UART0 28 -#define CLKID_SPICC1 29 -#define CLKID_HIU_IFACE 30 -#define CLKID_MIPI_DSI_PHY 31 -#define CLKID_ASSIST_MISC 32 -#define CLKID_SD_EMMC_A 33 -#define CLKID_SD_EMMC_B 34 -#define CLKID_SD_EMMC_C 35 -#define CLKID_AUDIO_CODEC 36 -#define CLKID_AUDIO 37 -#define CLKID_ETH 38 -#define CLKID_DEMUX 39 -#define CLKID_AUDIO_IFIFO 40 -#define CLKID_ADC 41 -#define CLKID_UART1 42 -#define CLKID_G2D 43 -#define CLKID_RESET 44 -#define CLKID_PCIE_COMB 45 -#define CLKID_PARSER 46 -#define CLKID_USB 47 -#define CLKID_PCIE_PHY 48 -#define CLKID_AHB_ARB0 49 -#define CLKID_AHB_DATA_BUS 50 -#define CLKID_AHB_CTRL_BUS 51 -#define CLKID_HTX_HDCP22 52 -#define CLKID_HTX_PCLK 53 -#define CLKID_BT656 54 -#define CLKID_USB1_DDR_BRIDGE 55 -#define CLKID_MMC_PCLK 56 -#define CLKID_UART2 57 -#define CLKID_VPU_INTR 58 -#define CLKID_GIC 59 -#define CLKID_SD_EMMC_A_CLK0 60 -#define CLKID_SD_EMMC_B_CLK0 61 -#define CLKID_SD_EMMC_C_CLK0 62 -#define CLKID_HIFI_PLL 74 -#define CLKID_VCLK2_VENCI0 80 -#define CLKID_VCLK2_VENCI1 81 -#define CLKID_VCLK2_VENCP0 82 -#define CLKID_VCLK2_VENCP1 83 -#define CLKID_VCLK2_VENCT0 84 -#define CLKID_VCLK2_VENCT1 85 -#define CLKID_VCLK2_OTHER 86 -#define CLKID_VCLK2_ENCI 87 -#define CLKID_VCLK2_ENCP 88 -#define CLKID_DAC_CLK 89 -#define CLKID_AOCLK 90 -#define CLKID_IEC958 91 -#define CLKID_ENC480P 92 -#define CLKID_RNG1 93 -#define CLKID_VCLK2_ENCT 94 -#define CLKID_VCLK2_ENCL 95 -#define CLKID_VCLK2_VENCLMMC 96 -#define CLKID_VCLK2_VENCL 97 -#define CLKID_VCLK2_OTHER1 98 -#define CLKID_FCLK_DIV2P5 99 -#define CLKID_DMA 105 -#define CLKID_EFUSE 106 -#define CLKID_ROM_BOOT 107 -#define CLKID_RESET_SEC 108 -#define CLKID_SEC_AHB_APB3 109 -#define CLKID_VPU_0_SEL 110 -#define CLKID_VPU_0 112 -#define CLKID_VPU_1_SEL 113 -#define CLKID_VPU_1 115 -#define CLKID_VPU 116 -#define CLKID_VAPB_0_SEL 117 -#define CLKID_VAPB_0 119 -#define CLKID_VAPB_1_SEL 120 -#define CLKID_VAPB_1 122 -#define CLKID_VAPB_SEL 123 -#define CLKID_VAPB 124 -#define CLKID_HDMI_PLL 128 -#define CLKID_VID_PLL 129 -#define CLKID_VCLK 138 -#define CLKID_VCLK2 139 -#define CLKID_VCLK_DIV1 148 -#define CLKID_VCLK_DIV2 149 -#define CLKID_VCLK_DIV4 150 -#define CLKID_VCLK_DIV6 151 -#define CLKID_VCLK_DIV12 152 -#define CLKID_VCLK2_DIV1 153 -#define CLKID_VCLK2_DIV2 154 -#define CLKID_VCLK2_DIV4 155 -#define CLKID_VCLK2_DIV6 156 -#define CLKID_VCLK2_DIV12 157 -#define CLKID_CTS_ENCI 162 -#define CLKID_CTS_ENCP 163 -#define CLKID_CTS_VDAC 164 -#define CLKID_HDMI_TX 165 -#define CLKID_HDMI 168 -#define CLKID_MALI_0_SEL 169 -#define CLKID_MALI_0 171 -#define CLKID_MALI_1_SEL 172 -#define CLKID_MALI_1 174 -#define CLKID_MALI 175 -#define CLKID_MPLL_50M 177 -#define CLKID_CPU_CLK 187 -#define CLKID_PCIE_PLL 201 -#define CLKID_VDEC_1 204 -#define CLKID_VDEC_HEVC 207 -#define CLKID_VDEC_HEVCF 210 -#define CLKID_TS 212 -#define CLKID_CPUB_CLK 224 -#define CLKID_GP1_PLL 243 -#define CLKID_DSU_CLK 252 -#define CLKID_CPU1_CLK 253 -#define CLKID_CPU2_CLK 254 -#define CLKID_CPU3_CLK 255 -#define CLKID_SPICC0_SCLK 258 -#define CLKID_SPICC1_SCLK 261 -#define CLKID_NNA_AXI_CLK 264 -#define CLKID_NNA_CORE_CLK 267 -#define CLKID_MIPI_DSI_PXCLK_SEL 269 -#define CLKID_MIPI_DSI_PXCLK 270 - -#endif /* __G12A_CLKC_H */ diff --git a/include/dt-bindings/clock/gxbb-aoclkc.h b/include/dt-bindings/clock/gxbb-aoclkc.h deleted file mode 100644 index ec3b26319f..0000000000 --- a/include/dt-bindings/clock/gxbb-aoclkc.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * GPL LICENSE SUMMARY - * - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - * The full GNU General Public License is included in this distribution - * in the file called COPYING. - * - * BSD LICENSE - * - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_GXBB_AOCLK -#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_GXBB_AOCLK - -#define CLKID_AO_REMOTE 0 -#define CLKID_AO_I2C_MASTER 1 -#define CLKID_AO_I2C_SLAVE 2 -#define CLKID_AO_UART1 3 -#define CLKID_AO_UART2 4 -#define CLKID_AO_IR_BLASTER 5 -#define CLKID_AO_CEC_32K 6 -#define CLKID_AO_CTS_OSCIN 7 -#define CLKID_AO_32K_PRE 8 -#define CLKID_AO_32K_DIV 9 -#define CLKID_AO_32K_SEL 10 -#define CLKID_AO_32K 11 -#define CLKID_AO_CTS_RTC_OSCIN 12 -#define CLKID_AO_CLK81 13 - -#endif diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h deleted file mode 100644 index 4073eb7a9d..0000000000 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ /dev/null @@ -1,151 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * GXBB clock tree IDs - */ - -#ifndef __GXBB_CLKC_H -#define __GXBB_CLKC_H - -#define CLKID_SYS_PLL 0 -#define CLKID_HDMI_PLL 2 -#define CLKID_FIXED_PLL 3 -#define CLKID_FCLK_DIV2 4 -#define CLKID_FCLK_DIV3 5 -#define CLKID_FCLK_DIV4 6 -#define CLKID_FCLK_DIV5 7 -#define CLKID_FCLK_DIV7 8 -#define CLKID_GP0_PLL 9 -#define CLKID_CLK81 12 -#define CLKID_MPLL0 13 -#define CLKID_MPLL1 14 -#define CLKID_MPLL2 15 -#define CLKID_DDR 16 -#define CLKID_DOS 17 -#define CLKID_ISA 18 -#define CLKID_PL301 19 -#define CLKID_PERIPHS 20 -#define CLKID_SPICC 21 -#define CLKID_I2C 22 -#define CLKID_SAR_ADC 23 -#define CLKID_SMART_CARD 24 -#define CLKID_RNG0 25 -#define CLKID_UART0 26 -#define CLKID_SDHC 27 -#define CLKID_STREAM 28 -#define CLKID_ASYNC_FIFO 29 -#define CLKID_SDIO 30 -#define CLKID_ABUF 31 -#define CLKID_HIU_IFACE 32 -#define CLKID_ASSIST_MISC 33 -#define CLKID_SPI 34 -#define CLKID_ETH 36 -#define CLKID_I2S_SPDIF 35 -#define CLKID_DEMUX 37 -#define CLKID_AIU_GLUE 38 -#define CLKID_IEC958 39 -#define CLKID_I2S_OUT 40 -#define CLKID_AMCLK 41 -#define CLKID_AIFIFO2 42 -#define CLKID_MIXER 43 -#define CLKID_MIXER_IFACE 44 -#define CLKID_ADC 45 -#define CLKID_BLKMV 46 -#define CLKID_AIU 47 -#define CLKID_UART1 48 -#define CLKID_G2D 49 -#define CLKID_USB0 50 -#define CLKID_USB1 51 -#define CLKID_RESET 52 -#define CLKID_NAND 53 -#define CLKID_DOS_PARSER 54 -#define CLKID_USB 55 -#define CLKID_VDIN1 56 -#define CLKID_AHB_ARB0 57 -#define CLKID_EFUSE 58 -#define CLKID_BOOT_ROM 59 -#define CLKID_AHB_DATA_BUS 60 -#define CLKID_AHB_CTRL_BUS 61 -#define CLKID_HDMI_INTR_SYNC 62 -#define CLKID_HDMI_PCLK 63 -#define CLKID_USB1_DDR_BRIDGE 64 -#define CLKID_USB0_DDR_BRIDGE 65 -#define CLKID_MMC_PCLK 66 -#define CLKID_DVIN 67 -#define CLKID_UART2 68 -#define CLKID_SANA 69 -#define CLKID_VPU_INTR 70 -#define CLKID_SEC_AHB_AHB3_BRIDGE 71 -#define CLKID_CLK81_A53 72 -#define CLKID_VCLK2_VENCI0 73 -#define CLKID_VCLK2_VENCI1 74 -#define CLKID_VCLK2_VENCP0 75 -#define CLKID_VCLK2_VENCP1 76 -#define CLKID_GCLK_VENCI_INT0 77 -#define CLKID_GCLK_VENCI_INT 78 -#define CLKID_DAC_CLK 79 -#define CLKID_AOCLK_GATE 80 -#define CLKID_IEC958_GATE 81 -#define CLKID_ENC480P 82 -#define CLKID_RNG1 83 -#define CLKID_GCLK_VENCI_INT1 84 -#define CLKID_VCLK2_VENCLMCC 85 -#define CLKID_VCLK2_VENCL 86 -#define CLKID_VCLK_OTHER 87 -#define CLKID_EDP 88 -#define CLKID_AO_MEDIA_CPU 89 -#define CLKID_AO_AHB_SRAM 90 -#define CLKID_AO_AHB_BUS 91 -#define CLKID_AO_IFACE 92 -#define CLKID_AO_I2C 93 -#define CLKID_SD_EMMC_A 94 -#define CLKID_SD_EMMC_B 95 -#define CLKID_SD_EMMC_C 96 -#define CLKID_SAR_ADC_CLK 97 -#define CLKID_SAR_ADC_SEL 98 -#define CLKID_MALI_0_SEL 100 -#define CLKID_MALI_0 102 -#define CLKID_MALI_1_SEL 103 -#define CLKID_MALI_1 105 -#define CLKID_MALI 106 -#define CLKID_CTS_AMCLK 107 -#define CLKID_CTS_MCLK_I958 110 -#define CLKID_CTS_I958 113 -#define CLKID_32K_CLK 114 -#define CLKID_SD_EMMC_A_CLK0 119 -#define CLKID_SD_EMMC_B_CLK0 122 -#define CLKID_SD_EMMC_C_CLK0 125 -#define CLKID_VPU_0_SEL 126 -#define CLKID_VPU_0 128 -#define CLKID_VPU_1_SEL 129 -#define CLKID_VPU_1 131 -#define CLKID_VPU 132 -#define CLKID_VAPB_0_SEL 133 -#define CLKID_VAPB_0 135 -#define CLKID_VAPB_1_SEL 136 -#define CLKID_VAPB_1 138 -#define CLKID_VAPB_SEL 139 -#define CLKID_VAPB 140 -#define CLKID_VDEC_1 153 -#define CLKID_VDEC_HEVC 156 -#define CLKID_GEN_CLK 159 -#define CLKID_VID_PLL 166 -#define CLKID_VCLK 175 -#define CLKID_VCLK2 176 -#define CLKID_VCLK_DIV1 185 -#define CLKID_VCLK_DIV2 186 -#define CLKID_VCLK_DIV4 187 -#define CLKID_VCLK_DIV6 188 -#define CLKID_VCLK_DIV12 189 -#define CLKID_VCLK2_DIV1 190 -#define CLKID_VCLK2_DIV2 191 -#define CLKID_VCLK2_DIV4 192 -#define CLKID_VCLK2_DIV6 193 -#define CLKID_VCLK2_DIV12 194 -#define CLKID_CTS_ENCI 199 -#define CLKID_CTS_ENCP 200 -#define CLKID_CTS_VDAC 201 -#define CLKID_HDMI_TX 202 -#define CLKID_HDMI 205 -#define CLKID_ACODEC 206 - -#endif /* __GXBB_CLKC_H */ diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h deleted file mode 100644 index c92ff1e602..0000000000 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ /dev/null @@ -1,158 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright 2013 Ideas On Board SPRL - */ - -#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__ -#define __DT_BINDINGS_CLOCK_R8A7790_H__ - -/* CPG */ -#define R8A7790_CLK_MAIN 0 -#define R8A7790_CLK_PLL0 1 -#define R8A7790_CLK_PLL1 2 -#define R8A7790_CLK_PLL3 3 -#define R8A7790_CLK_LB 4 -#define R8A7790_CLK_QSPI 5 -#define R8A7790_CLK_SDH 6 -#define R8A7790_CLK_SD0 7 -#define R8A7790_CLK_SD1 8 -#define R8A7790_CLK_Z 9 -#define R8A7790_CLK_RCAN 10 -#define R8A7790_CLK_ADSP 11 - -/* MSTP0 */ -#define R8A7790_CLK_MSIOF0 0 - -/* MSTP1 */ -#define R8A7790_CLK_VCP1 0 -#define R8A7790_CLK_VCP0 1 -#define R8A7790_CLK_VPC1 2 -#define R8A7790_CLK_VPC0 3 -#define R8A7790_CLK_JPU 6 -#define R8A7790_CLK_SSP1 9 -#define R8A7790_CLK_TMU1 11 -#define R8A7790_CLK_3DG 12 -#define R8A7790_CLK_2DDMAC 15 -#define R8A7790_CLK_FDP1_2 17 -#define R8A7790_CLK_FDP1_1 18 -#define R8A7790_CLK_FDP1_0 19 -#define R8A7790_CLK_TMU3 21 -#define R8A7790_CLK_TMU2 22 -#define R8A7790_CLK_CMT0 24 -#define R8A7790_CLK_TMU0 25 -#define R8A7790_CLK_VSP1_DU1 27 -#define R8A7790_CLK_VSP1_DU0 28 -#define R8A7790_CLK_VSP1_R 30 -#define R8A7790_CLK_VSP1_S 31 - -/* MSTP2 */ -#define R8A7790_CLK_SCIFA2 2 -#define R8A7790_CLK_SCIFA1 3 -#define R8A7790_CLK_SCIFA0 4 -#define R8A7790_CLK_MSIOF2 5 -#define R8A7790_CLK_SCIFB0 6 -#define R8A7790_CLK_SCIFB1 7 -#define R8A7790_CLK_MSIOF1 8 -#define R8A7790_CLK_MSIOF3 15 -#define R8A7790_CLK_SCIFB2 16 -#define R8A7790_CLK_SYS_DMAC1 18 -#define R8A7790_CLK_SYS_DMAC0 19 - -/* MSTP3 */ -#define R8A7790_CLK_IIC2 0 -#define R8A7790_CLK_TPU0 4 -#define R8A7790_CLK_MMCIF1 5 -#define R8A7790_CLK_SCIF2 10 -#define R8A7790_CLK_SDHI3 11 -#define R8A7790_CLK_SDHI2 12 -#define R8A7790_CLK_SDHI1 13 -#define R8A7790_CLK_SDHI0 14 -#define R8A7790_CLK_MMCIF0 15 -#define R8A7790_CLK_IIC0 18 -#define R8A7790_CLK_PCIEC 19 -#define R8A7790_CLK_IIC1 23 -#define R8A7790_CLK_SSUSB 28 -#define R8A7790_CLK_CMT1 29 -#define R8A7790_CLK_USBDMAC0 30 -#define R8A7790_CLK_USBDMAC1 31 - -/* MSTP4 */ -#define R8A7790_CLK_IRQC 7 -#define R8A7790_CLK_INTC_SYS 8 - -/* MSTP5 */ -#define R8A7790_CLK_AUDIO_DMAC1 1 -#define R8A7790_CLK_AUDIO_DMAC0 2 -#define R8A7790_CLK_ADSP_MOD 6 -#define R8A7790_CLK_THERMAL 22 -#define R8A7790_CLK_PWM 23 - -/* MSTP7 */ -#define R8A7790_CLK_EHCI 3 -#define R8A7790_CLK_HSUSB 4 -#define R8A7790_CLK_HSCIF1 16 -#define R8A7790_CLK_HSCIF0 17 -#define R8A7790_CLK_SCIF1 20 -#define R8A7790_CLK_SCIF0 21 -#define R8A7790_CLK_DU2 22 -#define R8A7790_CLK_DU1 23 -#define R8A7790_CLK_DU0 24 -#define R8A7790_CLK_LVDS1 25 -#define R8A7790_CLK_LVDS0 26 - -/* MSTP8 */ -#define R8A7790_CLK_MLB 2 -#define R8A7790_CLK_VIN3 8 -#define R8A7790_CLK_VIN2 9 -#define R8A7790_CLK_VIN1 10 -#define R8A7790_CLK_VIN0 11 -#define R8A7790_CLK_ETHERAVB 12 -#define R8A7790_CLK_ETHER 13 -#define R8A7790_CLK_SATA1 14 -#define R8A7790_CLK_SATA0 15 - -/* MSTP9 */ -#define R8A7790_CLK_GPIO5 7 -#define R8A7790_CLK_GPIO4 8 -#define R8A7790_CLK_GPIO3 9 -#define R8A7790_CLK_GPIO2 10 -#define R8A7790_CLK_GPIO1 11 -#define R8A7790_CLK_GPIO0 12 -#define R8A7790_CLK_RCAN1 15 -#define R8A7790_CLK_RCAN0 16 -#define R8A7790_CLK_QSPI_MOD 17 -#define R8A7790_CLK_IICDVFS 26 -#define R8A7790_CLK_I2C3 28 -#define R8A7790_CLK_I2C2 29 -#define R8A7790_CLK_I2C1 30 -#define R8A7790_CLK_I2C0 31 - -/* MSTP10 */ -#define R8A7790_CLK_SSI_ALL 5 -#define R8A7790_CLK_SSI9 6 -#define R8A7790_CLK_SSI8 7 -#define R8A7790_CLK_SSI7 8 -#define R8A7790_CLK_SSI6 9 -#define R8A7790_CLK_SSI5 10 -#define R8A7790_CLK_SSI4 11 -#define R8A7790_CLK_SSI3 12 -#define R8A7790_CLK_SSI2 13 -#define R8A7790_CLK_SSI1 14 -#define R8A7790_CLK_SSI0 15 -#define R8A7790_CLK_SCU_ALL 17 -#define R8A7790_CLK_SCU_DVC1 18 -#define R8A7790_CLK_SCU_DVC0 19 -#define R8A7790_CLK_SCU_CTU1_MIX1 20 -#define R8A7790_CLK_SCU_CTU0_MIX0 21 -#define R8A7790_CLK_SCU_SRC9 22 -#define R8A7790_CLK_SCU_SRC8 23 -#define R8A7790_CLK_SCU_SRC7 24 -#define R8A7790_CLK_SCU_SRC6 25 -#define R8A7790_CLK_SCU_SRC5 26 -#define R8A7790_CLK_SCU_SRC4 27 -#define R8A7790_CLK_SCU_SRC3 28 -#define R8A7790_CLK_SCU_SRC2 29 -#define R8A7790_CLK_SCU_SRC1 30 -#define R8A7790_CLK_SCU_SRC0 31 - -#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */ diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h deleted file mode 100644 index bb4f18b1b3..0000000000 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ /dev/null @@ -1,161 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright 2013 Ideas On Board SPRL - */ - -#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__ -#define __DT_BINDINGS_CLOCK_R8A7791_H__ - -/* CPG */ -#define R8A7791_CLK_MAIN 0 -#define R8A7791_CLK_PLL0 1 -#define R8A7791_CLK_PLL1 2 -#define R8A7791_CLK_PLL3 3 -#define R8A7791_CLK_LB 4 -#define R8A7791_CLK_QSPI 5 -#define R8A7791_CLK_SDH 6 -#define R8A7791_CLK_SD0 7 -#define R8A7791_CLK_Z 8 -#define R8A7791_CLK_RCAN 9 -#define R8A7791_CLK_ADSP 10 - -/* MSTP0 */ -#define R8A7791_CLK_MSIOF0 0 - -/* MSTP1 */ -#define R8A7791_CLK_VCP0 1 -#define R8A7791_CLK_VPC0 3 -#define R8A7791_CLK_JPU 6 -#define R8A7791_CLK_SSP1 9 -#define R8A7791_CLK_TMU1 11 -#define R8A7791_CLK_3DG 12 -#define R8A7791_CLK_2DDMAC 15 -#define R8A7791_CLK_FDP1_1 18 -#define R8A7791_CLK_FDP1_0 19 -#define R8A7791_CLK_TMU3 21 -#define R8A7791_CLK_TMU2 22 -#define R8A7791_CLK_CMT0 24 -#define R8A7791_CLK_TMU0 25 -#define R8A7791_CLK_VSP1_DU1 27 -#define R8A7791_CLK_VSP1_DU0 28 -#define R8A7791_CLK_VSP1_S 31 - -/* MSTP2 */ -#define R8A7791_CLK_SCIFA2 2 -#define R8A7791_CLK_SCIFA1 3 -#define R8A7791_CLK_SCIFA0 4 -#define R8A7791_CLK_MSIOF2 5 -#define R8A7791_CLK_SCIFB0 6 -#define R8A7791_CLK_SCIFB1 7 -#define R8A7791_CLK_MSIOF1 8 -#define R8A7791_CLK_SCIFB2 16 -#define R8A7791_CLK_SYS_DMAC1 18 -#define R8A7791_CLK_SYS_DMAC0 19 - -/* MSTP3 */ -#define R8A7791_CLK_TPU0 4 -#define R8A7791_CLK_SDHI2 11 -#define R8A7791_CLK_SDHI1 12 -#define R8A7791_CLK_SDHI0 14 -#define R8A7791_CLK_MMCIF0 15 -#define R8A7791_CLK_IIC0 18 -#define R8A7791_CLK_PCIEC 19 -#define R8A7791_CLK_IIC1 23 -#define R8A7791_CLK_SSUSB 28 -#define R8A7791_CLK_CMT1 29 -#define R8A7791_CLK_USBDMAC0 30 -#define R8A7791_CLK_USBDMAC1 31 - -/* MSTP4 */ -#define R8A7791_CLK_IRQC 7 -#define R8A7791_CLK_INTC_SYS 8 - -/* MSTP5 */ -#define R8A7791_CLK_AUDIO_DMAC1 1 -#define R8A7791_CLK_AUDIO_DMAC0 2 -#define R8A7791_CLK_ADSP_MOD 6 -#define R8A7791_CLK_THERMAL 22 -#define R8A7791_CLK_PWM 23 - -/* MSTP7 */ -#define R8A7791_CLK_EHCI 3 -#define R8A7791_CLK_HSUSB 4 -#define R8A7791_CLK_HSCIF2 13 -#define R8A7791_CLK_SCIF5 14 -#define R8A7791_CLK_SCIF4 15 -#define R8A7791_CLK_HSCIF1 16 -#define R8A7791_CLK_HSCIF0 17 -#define R8A7791_CLK_SCIF3 18 -#define R8A7791_CLK_SCIF2 19 -#define R8A7791_CLK_SCIF1 20 -#define R8A7791_CLK_SCIF0 21 -#define R8A7791_CLK_DU1 23 -#define R8A7791_CLK_DU0 24 -#define R8A7791_CLK_LVDS0 26 - -/* MSTP8 */ -#define R8A7791_CLK_IPMMU_SGX 0 -#define R8A7791_CLK_MLB 2 -#define R8A7791_CLK_VIN2 9 -#define R8A7791_CLK_VIN1 10 -#define R8A7791_CLK_VIN0 11 -#define R8A7791_CLK_ETHERAVB 12 -#define R8A7791_CLK_ETHER 13 -#define R8A7791_CLK_SATA1 14 -#define R8A7791_CLK_SATA0 15 - -/* MSTP9 */ -#define R8A7791_CLK_GYROADC 1 -#define R8A7791_CLK_GPIO7 4 -#define R8A7791_CLK_GPIO6 5 -#define R8A7791_CLK_GPIO5 7 -#define R8A7791_CLK_GPIO4 8 -#define R8A7791_CLK_GPIO3 9 -#define R8A7791_CLK_GPIO2 10 -#define R8A7791_CLK_GPIO1 11 -#define R8A7791_CLK_GPIO0 12 -#define R8A7791_CLK_RCAN1 15 -#define R8A7791_CLK_RCAN0 16 -#define R8A7791_CLK_QSPI_MOD 17 -#define R8A7791_CLK_I2C5 25 -#define R8A7791_CLK_IICDVFS 26 -#define R8A7791_CLK_I2C4 27 -#define R8A7791_CLK_I2C3 28 -#define R8A7791_CLK_I2C2 29 -#define R8A7791_CLK_I2C1 30 -#define R8A7791_CLK_I2C0 31 - -/* MSTP10 */ -#define R8A7791_CLK_SSI_ALL 5 -#define R8A7791_CLK_SSI9 6 -#define R8A7791_CLK_SSI8 7 -#define R8A7791_CLK_SSI7 8 -#define R8A7791_CLK_SSI6 9 -#define R8A7791_CLK_SSI5 10 -#define R8A7791_CLK_SSI4 11 -#define R8A7791_CLK_SSI3 12 -#define R8A7791_CLK_SSI2 13 -#define R8A7791_CLK_SSI1 14 -#define R8A7791_CLK_SSI0 15 -#define R8A7791_CLK_SCU_ALL 17 -#define R8A7791_CLK_SCU_DVC1 18 -#define R8A7791_CLK_SCU_DVC0 19 -#define R8A7791_CLK_SCU_CTU1_MIX1 20 -#define R8A7791_CLK_SCU_CTU0_MIX0 21 -#define R8A7791_CLK_SCU_SRC9 22 -#define R8A7791_CLK_SCU_SRC8 23 -#define R8A7791_CLK_SCU_SRC7 24 -#define R8A7791_CLK_SCU_SRC6 25 -#define R8A7791_CLK_SCU_SRC5 26 -#define R8A7791_CLK_SCU_SRC4 27 -#define R8A7791_CLK_SCU_SRC3 28 -#define R8A7791_CLK_SCU_SRC2 29 -#define R8A7791_CLK_SCU_SRC1 30 -#define R8A7791_CLK_SCU_SRC0 31 - -/* MSTP11 */ -#define R8A7791_CLK_SCIFA3 6 -#define R8A7791_CLK_SCIFA4 7 -#define R8A7791_CLK_SCIFA5 8 - -#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */ diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h deleted file mode 100644 index 2948d9ce3a..0000000000 --- a/include/dt-bindings/clock/r8a7792-clock.h +++ /dev/null @@ -1,98 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2016 Cogent Embedded, Inc. - */ - -#ifndef __DT_BINDINGS_CLOCK_R8A7792_H__ -#define __DT_BINDINGS_CLOCK_R8A7792_H__ - -/* CPG */ -#define R8A7792_CLK_MAIN 0 -#define R8A7792_CLK_PLL0 1 -#define R8A7792_CLK_PLL1 2 -#define R8A7792_CLK_PLL3 3 -#define R8A7792_CLK_LB 4 -#define R8A7792_CLK_QSPI 5 - -/* MSTP0 */ -#define R8A7792_CLK_MSIOF0 0 - -/* MSTP1 */ -#define R8A7792_CLK_JPU 6 -#define R8A7792_CLK_TMU1 11 -#define R8A7792_CLK_TMU3 21 -#define R8A7792_CLK_TMU2 22 -#define R8A7792_CLK_CMT0 24 -#define R8A7792_CLK_TMU0 25 -#define R8A7792_CLK_VSP1DU1 27 -#define R8A7792_CLK_VSP1DU0 28 -#define R8A7792_CLK_VSP1_SY 31 - -/* MSTP2 */ -#define R8A7792_CLK_MSIOF1 8 -#define R8A7792_CLK_SYS_DMAC1 18 -#define R8A7792_CLK_SYS_DMAC0 19 - -/* MSTP3 */ -#define R8A7792_CLK_TPU0 4 -#define R8A7792_CLK_SDHI0 14 -#define R8A7792_CLK_CMT1 29 - -/* MSTP4 */ -#define R8A7792_CLK_IRQC 7 -#define R8A7792_CLK_INTC_SYS 8 - -/* MSTP5 */ -#define R8A7792_CLK_AUDIO_DMAC0 2 -#define R8A7792_CLK_THERMAL 22 -#define R8A7792_CLK_PWM 23 - -/* MSTP7 */ -#define R8A7792_CLK_HSCIF1 16 -#define R8A7792_CLK_HSCIF0 17 -#define R8A7792_CLK_SCIF3 18 -#define R8A7792_CLK_SCIF2 19 -#define R8A7792_CLK_SCIF1 20 -#define R8A7792_CLK_SCIF0 21 -#define R8A7792_CLK_DU1 23 -#define R8A7792_CLK_DU0 24 - -/* MSTP8 */ -#define R8A7792_CLK_VIN5 4 -#define R8A7792_CLK_VIN4 5 -#define R8A7792_CLK_VIN3 8 -#define R8A7792_CLK_VIN2 9 -#define R8A7792_CLK_VIN1 10 -#define R8A7792_CLK_VIN0 11 -#define R8A7792_CLK_ETHERAVB 12 - -/* MSTP9 */ -#define R8A7792_CLK_GPIO7 4 -#define R8A7792_CLK_GPIO6 5 -#define R8A7792_CLK_GPIO5 7 -#define R8A7792_CLK_GPIO4 8 -#define R8A7792_CLK_GPIO3 9 -#define R8A7792_CLK_GPIO2 10 -#define R8A7792_CLK_GPIO1 11 -#define R8A7792_CLK_GPIO0 12 -#define R8A7792_CLK_GPIO11 13 -#define R8A7792_CLK_GPIO10 14 -#define R8A7792_CLK_CAN1 15 -#define R8A7792_CLK_CAN0 16 -#define R8A7792_CLK_QSPI_MOD 17 -#define R8A7792_CLK_GPIO9 19 -#define R8A7792_CLK_GPIO8 21 -#define R8A7792_CLK_I2C5 25 -#define R8A7792_CLK_IICDVFS 26 -#define R8A7792_CLK_I2C4 27 -#define R8A7792_CLK_I2C3 28 -#define R8A7792_CLK_I2C2 29 -#define R8A7792_CLK_I2C1 30 -#define R8A7792_CLK_I2C0 31 - -/* MSTP10 */ -#define R8A7792_CLK_SSI_ALL 5 -#define R8A7792_CLK_SSI4 11 -#define R8A7792_CLK_SSI3 12 - -#endif /* __DT_BINDINGS_CLOCK_R8A7792_H__ */ diff --git a/include/dt-bindings/clock/r8a7793-clock.h b/include/dt-bindings/clock/r8a7793-clock.h deleted file mode 100644 index 49c66d8ed1..0000000000 --- a/include/dt-bindings/clock/r8a7793-clock.h +++ /dev/null @@ -1,159 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 - * - * r8a7793 clock definition - * - * Copyright (C) 2014 Renesas Electronics Corporation - */ - -#ifndef __DT_BINDINGS_CLOCK_R8A7793_H__ -#define __DT_BINDINGS_CLOCK_R8A7793_H__ - -/* CPG */ -#define R8A7793_CLK_MAIN 0 -#define R8A7793_CLK_PLL0 1 -#define R8A7793_CLK_PLL1 2 -#define R8A7793_CLK_PLL3 3 -#define R8A7793_CLK_LB 4 -#define R8A7793_CLK_QSPI 5 -#define R8A7793_CLK_SDH 6 -#define R8A7793_CLK_SD0 7 -#define R8A7793_CLK_Z 8 -#define R8A7793_CLK_RCAN 9 -#define R8A7793_CLK_ADSP 10 - -/* MSTP0 */ -#define R8A7793_CLK_MSIOF0 0 - -/* MSTP1 */ -#define R8A7793_CLK_VCP0 1 -#define R8A7793_CLK_VPC0 3 -#define R8A7793_CLK_SSP1 9 -#define R8A7793_CLK_TMU1 11 -#define R8A7793_CLK_3DG 12 -#define R8A7793_CLK_2DDMAC 15 -#define R8A7793_CLK_FDP1_1 18 -#define R8A7793_CLK_FDP1_0 19 -#define R8A7793_CLK_TMU3 21 -#define R8A7793_CLK_TMU2 22 -#define R8A7793_CLK_CMT0 24 -#define R8A7793_CLK_TMU0 25 -#define R8A7793_CLK_VSP1_DU1 27 -#define R8A7793_CLK_VSP1_DU0 28 -#define R8A7793_CLK_VSP1_S 31 - -/* MSTP2 */ -#define R8A7793_CLK_SCIFA2 2 -#define R8A7793_CLK_SCIFA1 3 -#define R8A7793_CLK_SCIFA0 4 -#define R8A7793_CLK_MSIOF2 5 -#define R8A7793_CLK_SCIFB0 6 -#define R8A7793_CLK_SCIFB1 7 -#define R8A7793_CLK_MSIOF1 8 -#define R8A7793_CLK_SCIFB2 16 -#define R8A7793_CLK_SYS_DMAC1 18 -#define R8A7793_CLK_SYS_DMAC0 19 - -/* MSTP3 */ -#define R8A7793_CLK_TPU0 4 -#define R8A7793_CLK_SDHI2 11 -#define R8A7793_CLK_SDHI1 12 -#define R8A7793_CLK_SDHI0 14 -#define R8A7793_CLK_MMCIF0 15 -#define R8A7793_CLK_IIC0 18 -#define R8A7793_CLK_PCIEC 19 -#define R8A7793_CLK_IIC1 23 -#define R8A7793_CLK_SSUSB 28 -#define R8A7793_CLK_CMT1 29 -#define R8A7793_CLK_USBDMAC0 30 -#define R8A7793_CLK_USBDMAC1 31 - -/* MSTP4 */ -#define R8A7793_CLK_IRQC 7 -#define R8A7793_CLK_INTC_SYS 8 - -/* MSTP5 */ -#define R8A7793_CLK_AUDIO_DMAC1 1 -#define R8A7793_CLK_AUDIO_DMAC0 2 -#define R8A7793_CLK_ADSP_MOD 6 -#define R8A7793_CLK_THERMAL 22 -#define R8A7793_CLK_PWM 23 - -/* MSTP7 */ -#define R8A7793_CLK_EHCI 3 -#define R8A7793_CLK_HSUSB 4 -#define R8A7793_CLK_HSCIF2 13 -#define R8A7793_CLK_SCIF5 14 -#define R8A7793_CLK_SCIF4 15 -#define R8A7793_CLK_HSCIF1 16 -#define R8A7793_CLK_HSCIF0 17 -#define R8A7793_CLK_SCIF3 18 -#define R8A7793_CLK_SCIF2 19 -#define R8A7793_CLK_SCIF1 20 -#define R8A7793_CLK_SCIF0 21 -#define R8A7793_CLK_DU1 23 -#define R8A7793_CLK_DU0 24 -#define R8A7793_CLK_LVDS0 26 - -/* MSTP8 */ -#define R8A7793_CLK_IPMMU_SGX 0 -#define R8A7793_CLK_VIN2 9 -#define R8A7793_CLK_VIN1 10 -#define R8A7793_CLK_VIN0 11 -#define R8A7793_CLK_ETHER 13 -#define R8A7793_CLK_SATA1 14 -#define R8A7793_CLK_SATA0 15 - -/* MSTP9 */ -#define R8A7793_CLK_GPIO7 4 -#define R8A7793_CLK_GPIO6 5 -#define R8A7793_CLK_GPIO5 7 -#define R8A7793_CLK_GPIO4 8 -#define R8A7793_CLK_GPIO3 9 -#define R8A7793_CLK_GPIO2 10 -#define R8A7793_CLK_GPIO1 11 -#define R8A7793_CLK_GPIO0 12 -#define R8A7793_CLK_RCAN1 15 -#define R8A7793_CLK_RCAN0 16 -#define R8A7793_CLK_QSPI_MOD 17 -#define R8A7793_CLK_I2C5 25 -#define R8A7793_CLK_IICDVFS 26 -#define R8A7793_CLK_I2C4 27 -#define R8A7793_CLK_I2C3 28 -#define R8A7793_CLK_I2C2 29 -#define R8A7793_CLK_I2C1 30 -#define R8A7793_CLK_I2C0 31 - -/* MSTP10 */ -#define R8A7793_CLK_SSI_ALL 5 -#define R8A7793_CLK_SSI9 6 -#define R8A7793_CLK_SSI8 7 -#define R8A7793_CLK_SSI7 8 -#define R8A7793_CLK_SSI6 9 -#define R8A7793_CLK_SSI5 10 -#define R8A7793_CLK_SSI4 11 -#define R8A7793_CLK_SSI3 12 -#define R8A7793_CLK_SSI2 13 -#define R8A7793_CLK_SSI1 14 -#define R8A7793_CLK_SSI0 15 -#define R8A7793_CLK_SCU_ALL 17 -#define R8A7793_CLK_SCU_DVC1 18 -#define R8A7793_CLK_SCU_DVC0 19 -#define R8A7793_CLK_SCU_CTU1_MIX1 20 -#define R8A7793_CLK_SCU_CTU0_MIX0 21 -#define R8A7793_CLK_SCU_SRC9 22 -#define R8A7793_CLK_SCU_SRC8 23 -#define R8A7793_CLK_SCU_SRC7 24 -#define R8A7793_CLK_SCU_SRC6 25 -#define R8A7793_CLK_SCU_SRC5 26 -#define R8A7793_CLK_SCU_SRC4 27 -#define R8A7793_CLK_SCU_SRC3 28 -#define R8A7793_CLK_SCU_SRC2 29 -#define R8A7793_CLK_SCU_SRC1 30 -#define R8A7793_CLK_SCU_SRC0 31 - -/* MSTP11 */ -#define R8A7793_CLK_SCIFA3 6 -#define R8A7793_CLK_SCIFA4 7 -#define R8A7793_CLK_SCIFA5 8 - -#endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */ diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h deleted file mode 100644 index 649f005782..0000000000 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ /dev/null @@ -1,137 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright 2013 Ideas On Board SPRL - */ - -#ifndef __DT_BINDINGS_CLOCK_R8A7794_H__ -#define __DT_BINDINGS_CLOCK_R8A7794_H__ - -/* CPG */ -#define R8A7794_CLK_MAIN 0 -#define R8A7794_CLK_PLL0 1 -#define R8A7794_CLK_PLL1 2 -#define R8A7794_CLK_PLL3 3 -#define R8A7794_CLK_LB 4 -#define R8A7794_CLK_QSPI 5 -#define R8A7794_CLK_SDH 6 -#define R8A7794_CLK_SD0 7 -#define R8A7794_CLK_RCAN 8 - -/* MSTP0 */ -#define R8A7794_CLK_MSIOF0 0 - -/* MSTP1 */ -#define R8A7794_CLK_VCP0 1 -#define R8A7794_CLK_VPC0 3 -#define R8A7794_CLK_TMU1 11 -#define R8A7794_CLK_3DG 12 -#define R8A7794_CLK_2DDMAC 15 -#define R8A7794_CLK_FDP1_0 19 -#define R8A7794_CLK_TMU3 21 -#define R8A7794_CLK_TMU2 22 -#define R8A7794_CLK_CMT0 24 -#define R8A7794_CLK_TMU0 25 -#define R8A7794_CLK_VSP1_DU0 28 -#define R8A7794_CLK_VSP1_S 31 - -/* MSTP2 */ -#define R8A7794_CLK_SCIFA2 2 -#define R8A7794_CLK_SCIFA1 3 -#define R8A7794_CLK_SCIFA0 4 -#define R8A7794_CLK_MSIOF2 5 -#define R8A7794_CLK_SCIFB0 6 -#define R8A7794_CLK_SCIFB1 7 -#define R8A7794_CLK_MSIOF1 8 -#define R8A7794_CLK_SCIFB2 16 -#define R8A7794_CLK_SYS_DMAC1 18 -#define R8A7794_CLK_SYS_DMAC0 19 - -/* MSTP3 */ -#define R8A7794_CLK_SDHI2 11 -#define R8A7794_CLK_SDHI1 12 -#define R8A7794_CLK_SDHI0 14 -#define R8A7794_CLK_MMCIF0 15 -#define R8A7794_CLK_IIC0 18 -#define R8A7794_CLK_IIC1 23 -#define R8A7794_CLK_CMT1 29 -#define R8A7794_CLK_USBDMAC0 30 -#define R8A7794_CLK_USBDMAC1 31 - -/* MSTP4 */ -#define R8A7794_CLK_IRQC 7 -#define R8A7794_CLK_INTC_SYS 8 - -/* MSTP5 */ -#define R8A7794_CLK_AUDIO_DMAC0 2 -#define R8A7794_CLK_PWM 23 - -/* MSTP7 */ -#define R8A7794_CLK_EHCI 3 -#define R8A7794_CLK_HSUSB 4 -#define R8A7794_CLK_HSCIF2 13 -#define R8A7794_CLK_SCIF5 14 -#define R8A7794_CLK_SCIF4 15 -#define R8A7794_CLK_HSCIF1 16 -#define R8A7794_CLK_HSCIF0 17 -#define R8A7794_CLK_SCIF3 18 -#define R8A7794_CLK_SCIF2 19 -#define R8A7794_CLK_SCIF1 20 -#define R8A7794_CLK_SCIF0 21 -#define R8A7794_CLK_DU1 23 -#define R8A7794_CLK_DU0 24 - -/* MSTP8 */ -#define R8A7794_CLK_VIN1 10 -#define R8A7794_CLK_VIN0 11 -#define R8A7794_CLK_ETHERAVB 12 -#define R8A7794_CLK_ETHER 13 - -/* MSTP9 */ -#define R8A7794_CLK_GPIO6 5 -#define R8A7794_CLK_GPIO5 7 -#define R8A7794_CLK_GPIO4 8 -#define R8A7794_CLK_GPIO3 9 -#define R8A7794_CLK_GPIO2 10 -#define R8A7794_CLK_GPIO1 11 -#define R8A7794_CLK_GPIO0 12 -#define R8A7794_CLK_RCAN1 15 -#define R8A7794_CLK_RCAN0 16 -#define R8A7794_CLK_QSPI_MOD 17 -#define R8A7794_CLK_I2C5 25 -#define R8A7794_CLK_I2C4 27 -#define R8A7794_CLK_I2C3 28 -#define R8A7794_CLK_I2C2 29 -#define R8A7794_CLK_I2C1 30 -#define R8A7794_CLK_I2C0 31 - -/* MSTP10 */ -#define R8A7794_CLK_SSI_ALL 5 -#define R8A7794_CLK_SSI9 6 -#define R8A7794_CLK_SSI8 7 -#define R8A7794_CLK_SSI7 8 -#define R8A7794_CLK_SSI6 9 -#define R8A7794_CLK_SSI5 10 -#define R8A7794_CLK_SSI4 11 -#define R8A7794_CLK_SSI3 12 -#define R8A7794_CLK_SSI2 13 -#define R8A7794_CLK_SSI1 14 -#define R8A7794_CLK_SSI0 15 -#define R8A7794_CLK_SCU_ALL 17 -#define R8A7794_CLK_SCU_DVC1 18 -#define R8A7794_CLK_SCU_DVC0 19 -#define R8A7794_CLK_SCU_CTU1_MIX1 20 -#define R8A7794_CLK_SCU_CTU0_MIX0 21 -#define R8A7794_CLK_SCU_SRC6 25 -#define R8A7794_CLK_SCU_SRC5 26 -#define R8A7794_CLK_SCU_SRC4 27 -#define R8A7794_CLK_SCU_SRC3 28 -#define R8A7794_CLK_SCU_SRC2 29 -#define R8A7794_CLK_SCU_SRC1 30 - -/* MSTP11 */ -#define R8A7794_CLK_SCIFA3 6 -#define R8A7794_CLK_SCIFA4 7 -#define R8A7794_CLK_SCIFA5 8 - -#endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */ diff --git a/include/dt-bindings/reset/axg-aoclkc.h b/include/dt-bindings/reset/axg-aoclkc.h deleted file mode 100644 index d342c0b6b2..0000000000 --- a/include/dt-bindings/reset/axg-aoclkc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -/* - * Copyright (c) 2016 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Copyright (c) 2018 Amlogic, inc. - * Author: Qiufang Dai <qiufang.dai@amlogic.com> - */ - -#ifndef DT_BINDINGS_RESET_AMLOGIC_MESON_AXG_AOCLK -#define DT_BINDINGS_RESET_AMLOGIC_MESON_AXG_AOCLK - -#define RESET_AO_REMOTE 0 -#define RESET_AO_I2C_MASTER 1 -#define RESET_AO_I2C_SLAVE 2 -#define RESET_AO_UART1 3 -#define RESET_AO_UART2 4 -#define RESET_AO_IR_BLASTER 5 - -#endif diff --git a/include/dt-bindings/reset/g12a-aoclkc.h b/include/dt-bindings/reset/g12a-aoclkc.h deleted file mode 100644 index bd2e233713..0000000000 --- a/include/dt-bindings/reset/g12a-aoclkc.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -/* - * Copyright (c) 2016 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef DT_BINDINGS_RESET_AMLOGIC_MESON_G12A_AOCLK -#define DT_BINDINGS_RESET_AMLOGIC_MESON_G12A_AOCLK - -#define RESET_AO_IR_IN 0 -#define RESET_AO_UART 1 -#define RESET_AO_I2C_M 2 -#define RESET_AO_I2C_S 3 -#define RESET_AO_SAR_ADC 4 -#define RESET_AO_UART2 5 -#define RESET_AO_IR_OUT 6 - -#endif diff --git a/include/dt-bindings/reset/gxbb-aoclkc.h b/include/dt-bindings/reset/gxbb-aoclkc.h deleted file mode 100644 index 9e3fd60c30..0000000000 --- a/include/dt-bindings/reset/gxbb-aoclkc.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * GPL LICENSE SUMMARY - * - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - * The full GNU General Public License is included in this distribution - * in the file called COPYING. - * - * BSD LICENSE - * - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef DT_BINDINGS_RESET_AMLOGIC_MESON_GXBB_AOCLK -#define DT_BINDINGS_RESET_AMLOGIC_MESON_GXBB_AOCLK - -#define RESET_AO_REMOTE 0 -#define RESET_AO_I2C_MASTER 1 -#define RESET_AO_I2C_SLAVE 2 -#define RESET_AO_UART1 3 -#define RESET_AO_UART2 4 -#define RESET_AO_IR_BLASTER 5 - -#endif diff --git a/include/efi.h b/include/efi.h index c3c4b93f86..d5af213994 100644 --- a/include/efi.h +++ b/include/efi.h @@ -78,6 +78,16 @@ typedef struct { u8 b[16]; } efi_guid_t __attribute__((aligned(4))); +static inline int guidcmp(const void *g1, const void *g2) +{ + return memcmp(g1, g2, sizeof(efi_guid_t)); +} + +static inline void *guidcpy(void *dst, const void *src) +{ + return memcpy(dst, src, sizeof(efi_guid_t)); +} + #define EFI_BITS_PER_LONG (sizeof(long) * 8) /* Bit mask for EFI status code with error */ diff --git a/include/efi_loader.h b/include/efi_loader.h index 6c993e1a69..ca8fc0820f 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -21,16 +21,6 @@ struct blk_desc; struct jmp_buf_data; -static inline int guidcmp(const void *g1, const void *g2) -{ - return memcmp(g1, g2, sizeof(efi_guid_t)); -} - -static inline void *guidcpy(void *dst, const void *src) -{ - return memcpy(dst, src, sizeof(efi_guid_t)); -} - #if CONFIG_IS_ENABLED(EFI_LOADER) /** diff --git a/include/env/ti/mmc.env b/include/env/ti/mmc.env index 0256a2d2aa..037a09010c 100644 --- a/include/env/ti/mmc.env +++ b/include/env/ti/mmc.env @@ -16,7 +16,7 @@ importbootenv=echo Importing environment from mmc${mmcdev} ...; loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile} loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/dtb/${fdtfile} -get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/dtb/${name_fdt} +get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/dtb/${fdtfile} envboot=if mmc dev ${mmcdev}; then if mmc rescan; then echo SD/MMC found on device ${mmcdev}; diff --git a/include/env/ti/ti_common.env b/include/env/ti/ti_common.env index c5c3642177..7029d12bf2 100644 --- a/include/env/ti/ti_common.env +++ b/include/env/ti/ti_common.env @@ -25,7 +25,7 @@ get_fit_config=setexpr name_fit_config gsub / _ conf-${fdtfile} run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring} do_main_cpsw0_qsgmii_phyinit=0 bootcmd_ti_mmc= - run findfdt; run init_${boot}; + run init_${boot}; #if CONFIG_CMD_REMOTEPROC if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1; then run main_cpsw0_qsgmii_phyinit; diff --git a/include/fastboot.h b/include/fastboot.h index 2ca1b907a5..b106d61774 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -12,6 +12,8 @@ #ifndef _FASTBOOT_H_ #define _FASTBOOT_H_ +#include <linux/types.h> + #define FASTBOOT_VERSION "0.4" /* diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index 36572be89e..cf2161603d 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -971,6 +971,14 @@ extern void usb_ep_autoconfig_reset(struct usb_gadget *); extern int dm_usb_gadget_handle_interrupts(struct udevice *); /** + * struct usb_gadget_generic_ops - The functions that a gadget driver must implement. + * @handle_interrupts: Handle UDC interrupts. + */ +struct usb_gadget_generic_ops { + int (*handle_interrupts)(struct udevice *udevice); +}; + +/** * udc_device_get_by_index() - Get UDC udevice by index * @index: UDC device index * @udev: UDC udevice matching the index (if found) diff --git a/lib/blake2/blake2b.c b/lib/blake2/blake2b.c index 686138ef24..9cd6232aa5 100644 --- a/lib/blake2/blake2b.c +++ b/lib/blake2/blake2b.c @@ -51,7 +51,6 @@ static const uint8_t blake2b_sigma[12][16] = { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 } }; - static void blake2b_set_lastnode( blake2b_state *S ) { S->f[1] = (uint64_t)-1; @@ -100,8 +99,6 @@ int blake2b_init_param( blake2b_state *S, const blake2b_param *P ) return 0; } - - int blake2b_init( blake2b_state *S, size_t outlen ) { blake2b_param P[1]; @@ -123,7 +120,6 @@ int blake2b_init( blake2b_state *S, size_t outlen ) return blake2b_init_param( S, P ); } - int blake2b_init_key( blake2b_state *S, size_t outlen, const void *key, size_t keylen ) { blake2b_param P[1]; diff --git a/lib/bzip2/bzlib.c b/lib/bzip2/bzlib.c index f7318b7886..39a480e25f 100644 --- a/lib/bzip2/bzlib.c +++ b/lib/bzip2/bzlib.c @@ -87,7 +87,6 @@ /*--- Compression stuff ---*/ /*---------------------------------------------------*/ - /*---------------------------------------------------*/ #ifndef BZ_NO_STDIO void BZ2_bz__AssertH__fail ( int errcode ) @@ -137,7 +136,6 @@ void BZ2_bz__AssertH__fail ( int errcode ) } #endif - /*---------------------------------------------------*/ static int bz_config_ok ( void ) @@ -148,7 +146,6 @@ int bz_config_ok ( void ) return 1; } - /*---------------------------------------------------*/ static void* default_bzalloc ( void* opaque, Int32 items, Int32 size ) @@ -177,7 +174,6 @@ void prepare_new_block ( EState* s ) s->blockNo++; } - /*---------------------------------------------------*/ static void init_RL ( EState* s ) @@ -186,7 +182,6 @@ void init_RL ( EState* s ) s->state_in_len = 0; } - static Bool isempty_RL ( EState* s ) { @@ -261,7 +256,6 @@ int BZ_API(BZ2_bzCompressInit) return BZ_OK; } - /*---------------------------------------------------*/ static void add_pair_to_block ( EState* s ) @@ -297,7 +291,6 @@ void add_pair_to_block ( EState* s ) } } - /*---------------------------------------------------*/ static void flush_RL ( EState* s ) @@ -306,7 +299,6 @@ void flush_RL ( EState* s ) init_RL ( s ); } - /*---------------------------------------------------*/ #define ADD_CHAR_TO_BLOCK(zs,zchh0) \ { \ @@ -334,7 +326,6 @@ void flush_RL ( EState* s ) } \ } - /*---------------------------------------------------*/ static Bool copy_input_until_stop ( EState* s ) @@ -379,7 +370,6 @@ Bool copy_input_until_stop ( EState* s ) return progress_in; } - /*---------------------------------------------------*/ static Bool copy_output_until_stop ( EState* s ) @@ -406,7 +396,6 @@ Bool copy_output_until_stop ( EState* s ) return progress_out; } - /*---------------------------------------------------*/ static Bool handle_compress ( bz_stream* strm ) @@ -453,7 +442,6 @@ Bool handle_compress ( bz_stream* strm ) return progress_in || progress_out; } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzCompress) ( bz_stream *strm, int action ) { @@ -514,7 +502,6 @@ int BZ_API(BZ2_bzCompress) ( bz_stream *strm, int action ) return BZ_OK; /*--not reached--*/ } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzCompressEnd) ( bz_stream *strm ) { @@ -578,7 +565,6 @@ int BZ_API(BZ2_bzDecompressInit) return BZ_OK; } - /*---------------------------------------------------*/ static void unRLE_obuf_to_output_FAST ( DState* s ) @@ -604,7 +590,6 @@ void unRLE_obuf_to_output_FAST ( DState* s ) /* can a new run be started? */ if (s->nblock_used == s->save_nblock+1) return; - s->state_out_len = 1; s->state_out_ch = s->k0; BZ_GET_FAST(k1); BZ_RAND_UPD_MASK; @@ -720,7 +705,6 @@ void unRLE_obuf_to_output_FAST ( DState* s ) } } - /*---------------------------------------------------*/ __inline__ Int32 BZ2_indexIntoF ( Int32 indx, Int32 *cftab ) { @@ -735,7 +719,6 @@ __inline__ Int32 BZ2_indexIntoF ( Int32 indx, Int32 *cftab ) return nb; } - /*---------------------------------------------------*/ static void unRLE_obuf_to_output_SMALL ( DState* s ) @@ -761,7 +744,6 @@ void unRLE_obuf_to_output_SMALL ( DState* s ) /* can a new run be started? */ if (s->nblock_used == s->save_nblock+1) return; - s->state_out_len = 1; s->state_out_ch = s->k0; BZ_GET_SMALL(k1); BZ_RAND_UPD_MASK; @@ -831,7 +813,6 @@ void unRLE_obuf_to_output_SMALL ( DState* s ) } } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzDecompress) ( bz_stream *strm ) { @@ -886,7 +867,6 @@ int BZ_API(BZ2_bzDecompress) ( bz_stream *strm ) return 0; /*NOTREACHED*/ } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzDecompressEnd) ( bz_stream *strm ) { @@ -906,7 +886,6 @@ int BZ_API(BZ2_bzDecompressEnd) ( bz_stream *strm ) return BZ_OK; } - #ifndef BZ_NO_STDIO /*---------------------------------------------------*/ /*--- File I/O stuff ---*/ @@ -930,7 +909,6 @@ typedef } bzFile; - /*---------------------------------------------*/ static Bool myfeof ( FILE* f ) { @@ -940,7 +918,6 @@ static Bool myfeof ( FILE* f ) return False; } - /*---------------------------------------------------*/ BZFILE* BZ_API(BZ2_bzWriteOpen) ( int* bzerror, @@ -987,7 +964,6 @@ BZFILE* BZ_API(BZ2_bzWriteOpen) return bzf; } - /*---------------------------------------------------*/ void BZ_API(BZ2_bzWrite) ( int* bzerror, @@ -1032,7 +1008,6 @@ void BZ_API(BZ2_bzWrite) } } - /*---------------------------------------------------*/ void BZ_API(BZ2_bzWriteClose) ( int* bzerror, @@ -1045,7 +1020,6 @@ void BZ_API(BZ2_bzWriteClose) nbytes_in, NULL, nbytes_out, NULL ); } - void BZ_API(BZ2_bzWriteClose64) ( int* bzerror, BZFILE* b, @@ -1110,7 +1084,6 @@ void BZ_API(BZ2_bzWriteClose64) free ( bzf ); } - /*---------------------------------------------------*/ BZFILE* BZ_API(BZ2_bzReadOpen) ( int* bzerror, @@ -1166,7 +1139,6 @@ BZFILE* BZ_API(BZ2_bzReadOpen) return bzf; } - /*---------------------------------------------------*/ void BZ_API(BZ2_bzReadClose) ( int *bzerror, BZFILE *b ) { @@ -1184,7 +1156,6 @@ void BZ_API(BZ2_bzReadClose) ( int *bzerror, BZFILE *b ) free ( bzf ); } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzRead) ( int* bzerror, @@ -1244,7 +1215,6 @@ int BZ_API(BZ2_bzRead) return 0; /*not reached*/ } - /*---------------------------------------------------*/ void BZ_API(BZ2_bzReadGetUnused) ( int* bzerror, @@ -1266,7 +1236,6 @@ void BZ_API(BZ2_bzReadGetUnused) } #endif - /*---------------------------------------------------*/ /*--- Misc convenience stuff ---*/ /*---------------------------------------------------*/ @@ -1372,7 +1341,6 @@ int BZ_API(BZ2_bzBuffToBuffDecompress) return ret; } - /*---------------------------------------------------*/ /*-- Code contributed by Yoshioka Tsuneo @@ -1394,7 +1362,6 @@ const char * BZ_API(BZ2_bzlibVersion)(void) return BZ_VERSION; } - #ifndef BZ_NO_STDIO /*---------------------------------------------------*/ @@ -1476,7 +1443,6 @@ BZFILE * bzopen_or_bzdopen return bzfp; } - /*---------------------------------------------------*/ /*-- open file for read or write. @@ -1490,7 +1456,6 @@ BZFILE * BZ_API(BZ2_bzopen) return bzopen_or_bzdopen(path,-1,mode,/*bzopen*/0); } - /*---------------------------------------------------*/ BZFILE * BZ_API(BZ2_bzdopen) ( int fd, @@ -1499,7 +1464,6 @@ BZFILE * BZ_API(BZ2_bzdopen) return bzopen_or_bzdopen(NULL,fd,mode,/*bzdopen*/1); } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzread) (BZFILE* b, void* buf, int len ) { @@ -1513,7 +1477,6 @@ int BZ_API(BZ2_bzread) (BZFILE* b, void* buf, int len ) } } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzwrite) (BZFILE* b, void* buf, int len ) { @@ -1527,7 +1490,6 @@ int BZ_API(BZ2_bzwrite) (BZFILE* b, void* buf, int len ) } } - /*---------------------------------------------------*/ int BZ_API(BZ2_bzflush) (BZFILE *b) { @@ -1535,7 +1497,6 @@ int BZ_API(BZ2_bzflush) (BZFILE *b) return 0; } - /*---------------------------------------------------*/ void BZ_API(BZ2_bzclose) (BZFILE* b) { @@ -1556,7 +1517,6 @@ void BZ_API(BZ2_bzclose) (BZFILE* b) } } - /*---------------------------------------------------*/ /*-- return last error code @@ -1580,7 +1540,6 @@ static char *bzerrorstrings[] = { ,"???" /* for future */ }; - const char * BZ_API(BZ2_bzerror) (BZFILE *b, int *errnum) { int err = ((bzFile *)b)->lastErr; diff --git a/lib/bzip2/bzlib_blocksort.c b/lib/bzip2/bzlib_blocksort.c index 36cf843659..2408ee90c1 100644 --- a/lib/bzip2/bzlib_blocksort.c +++ b/lib/bzip2/bzlib_blocksort.c @@ -99,7 +99,6 @@ void fallbackSimpleSort ( UInt32* fmap, } } - /*---------------------------------------------*/ #define fswap(zz1, zz2) \ { Int32 zztmp = zz1; zz1 = zz2; zz2 = zztmp; } @@ -115,7 +114,6 @@ void fallbackSimpleSort ( UInt32* fmap, } \ } - #define fmin(a,b) ((a) < (b)) ? (a) : (b) #define fpush(lz,hz) { stackLo[sp] = lz; \ @@ -129,7 +127,6 @@ void fallbackSimpleSort ( UInt32* fmap, #define FALLBACK_QSORT_SMALL_THRESH 10 #define FALLBACK_QSORT_STACK_SIZE 100 - static void fallbackQSort3 ( UInt32* fmap, UInt32* eclass, @@ -228,7 +225,6 @@ void fallbackQSort3 ( UInt32* fmap, #undef FALLBACK_QSORT_SMALL_THRESH #undef FALLBACK_QSORT_STACK_SIZE - /*---------------------------------------------*/ /* Pre: nblock > 0 @@ -375,7 +371,6 @@ void fallbackSort ( UInt32* fmap, #undef WORD_BH #undef UNALIGNED_BH - /*---------------------------------------------*/ /*--- The main, O(N^2 log(N)) sorting ---*/ /*--- algorithm. Faster for "normal" ---*/ @@ -509,7 +504,6 @@ Bool mainGtU ( UInt32 i1, return False; } - /*---------------------------------------------*/ /*-- Knuth's increments seem to work better @@ -595,7 +589,6 @@ void mainSimpleSort ( UInt32* ptr, } } - /*---------------------------------------------*/ /*-- The following is an implementation of @@ -644,7 +637,6 @@ UChar mmed3 ( UChar a, UChar b, UChar c ) hz = stackHi[sp]; \ dz = stackD [sp]; } - #define mnextsize(az) (nextHi[az]-nextLo[az]) #define mnextswap(az,bz) \ @@ -653,7 +645,6 @@ UChar mmed3 ( UChar a, UChar b, UChar c ) tz = nextHi[az]; nextHi[az] = nextHi[bz]; nextHi[bz] = tz; \ tz = nextD [az]; nextD [az] = nextD [bz]; nextD [bz] = tz; } - #define MAIN_QSORT_SMALL_THRESH 20 #define MAIN_QSORT_DEPTH_THRESH (BZ_N_RADIX + BZ_N_QSORT) #define MAIN_QSORT_STACK_SIZE 100 @@ -768,7 +759,6 @@ void mainQSort3 ( UInt32* ptr, #undef MAIN_QSORT_DEPTH_THRESH #undef MAIN_QSORT_STACK_SIZE - /*---------------------------------------------*/ /* Pre: nblock > N_OVERSHOOT @@ -1055,7 +1045,6 @@ void mainSort ( UInt32* ptr, #undef SETMASK #undef CLEARMASK - /*---------------------------------------------*/ /* Pre: nblock > 0 @@ -1129,7 +1118,6 @@ void BZ2_blockSort ( EState* s ) AssertH( s->origPtr != -1, 1003 ); } - /*-------------------------------------------------------------*/ /*--- end blocksort.c ---*/ /*-------------------------------------------------------------*/ diff --git a/lib/bzip2/bzlib_compress.c b/lib/bzip2/bzlib_compress.c index 68d948b427..d9400ca758 100644 --- a/lib/bzip2/bzlib_compress.c +++ b/lib/bzip2/bzlib_compress.c @@ -80,7 +80,6 @@ void BZ2_bsInitWrite ( EState* s ) s->bsBuff = 0; } - /*---------------------------------------------------*/ static void bsFinishWrite ( EState* s ) @@ -93,7 +92,6 @@ void bsFinishWrite ( EState* s ) } } - /*---------------------------------------------------*/ #define bsNEEDW(nz) \ { \ @@ -106,7 +104,6 @@ void bsFinishWrite ( EState* s ) } \ } - /*---------------------------------------------------*/ static __inline__ @@ -117,7 +114,6 @@ void bsW ( EState* s, Int32 n, UInt32 v ) s->bsLive += n; } - /*---------------------------------------------------*/ static void bsPutUInt32 ( EState* s, UInt32 u ) @@ -128,7 +124,6 @@ void bsPutUInt32 ( EState* s, UInt32 u ) bsW ( s, 8, u & 0xffL ); } - /*---------------------------------------------------*/ static void bsPutUChar ( EState* s, UChar c ) @@ -136,7 +131,6 @@ void bsPutUChar ( EState* s, UChar c ) bsW( s, 8, (UInt32)c ); } - /*---------------------------------------------------*/ /*--- The back end proper ---*/ /*---------------------------------------------------*/ @@ -154,7 +148,6 @@ void makeMaps_e ( EState* s ) } } - /*---------------------------------------------------*/ static void generateMTFValues ( EState* s ) @@ -270,7 +263,6 @@ void generateMTFValues ( EState* s ) s->nMTF = wr; } - /*---------------------------------------------------*/ #define BZ_LESSER_ICOST 0 #define BZ_GREATER_ICOST 15 @@ -293,7 +285,6 @@ void sendMTFValues ( EState* s ) Made global to keep stack frame size small. --*/ - UInt16 cost[BZ_N_GROUPS]; Int32 fave[BZ_N_GROUPS]; @@ -492,13 +483,11 @@ void sendMTFValues ( EState* s ) alphaSize, 17 /*20*/ ); } - AssertH( nGroups < 8, 3002 ); AssertH( nSelectors < 32768 && nSelectors <= (2 + (900000 / BZ_G_SIZE)), 3003 ); - /*--- Compute MTF values for the selectors. ---*/ { UChar pos[BZ_N_GROUPS], ll_i, tmp2, tmp; @@ -628,7 +617,6 @@ void sendMTFValues ( EState* s ) } } - gs = ge+1; selCtr++; } @@ -638,7 +626,6 @@ void sendMTFValues ( EState* s ) VPrintf1( "codes %d\n", s->numZ-nBytes ); } - /*---------------------------------------------------*/ void BZ2_compressBlock ( EState* s, Bool is_last_block ) { @@ -693,7 +680,6 @@ void BZ2_compressBlock ( EState* s, Bool is_last_block ) sendMTFValues ( s ); } - /*-- If this is the last block, add the stream trailer. --*/ if (is_last_block) { @@ -707,7 +693,6 @@ void BZ2_compressBlock ( EState* s, Bool is_last_block ) } } - /*-------------------------------------------------------------*/ /*--- end compress.c ---*/ /*-------------------------------------------------------------*/ diff --git a/lib/bzip2/bzlib_crctable.c b/lib/bzip2/bzlib_crctable.c index 325b96643e..2da2d65500 100644 --- a/lib/bzip2/bzlib_crctable.c +++ b/lib/bzip2/bzlib_crctable.c @@ -59,7 +59,6 @@ For more information on these sources, see the manual. --*/ - #include "bzlib_private.h" /*-- @@ -139,7 +138,6 @@ UInt32 BZ2_crc32Table[256] = { 0xbcb4666dL, 0xb8757bdaL, 0xb5365d03L, 0xb1f740b4L }; - /*-------------------------------------------------------------*/ /*--- end crctable.c ---*/ /*-------------------------------------------------------------*/ diff --git a/lib/bzip2/bzlib_decompress.c b/lib/bzip2/bzlib_decompress.c index e56ab6674b..53695c13bf 100644 --- a/lib/bzip2/bzlib_decompress.c +++ b/lib/bzip2/bzlib_decompress.c @@ -60,10 +60,8 @@ For more information on these sources, see the manual. --*/ - #include "bzlib_private.h" - /*---------------------------------------------------*/ static void makeMaps_d ( DState* s ) @@ -77,7 +75,6 @@ void makeMaps_d ( DState* s ) } } - /*---------------------------------------------------*/ #define RETURN(rrr) \ { retVal = rrr; goto save_state_and_return; }; @@ -143,7 +140,6 @@ void makeMaps_d ( DState* s ) lval = gPerm[zvec - gBase[zn]]; \ } - /*---------------------------------------------------*/ Int32 BZ2_decompress ( DState* s ) { @@ -605,7 +601,6 @@ Int32 BZ2_decompress ( DState* s ) RETURN(BZ_OK); - endhdr_2: GET_UCHAR(BZ_X_ENDHDR_2, uc); @@ -667,7 +662,6 @@ Int32 BZ2_decompress ( DState* s ) return retVal; } - /*-------------------------------------------------------------*/ /*--- end decompress.c ---*/ /*-------------------------------------------------------------*/ diff --git a/lib/bzip2/bzlib_huffman.c b/lib/bzip2/bzlib_huffman.c index 801b8ec39a..904783d7cb 100644 --- a/lib/bzip2/bzlib_huffman.c +++ b/lib/bzip2/bzlib_huffman.c @@ -59,7 +59,6 @@ For more information on these sources, see the manual. --*/ - #include "bzlib_private.h" /*---------------------------------------------------*/ @@ -99,7 +98,6 @@ heap[zz] = tmp; \ } - /*---------------------------------------------------*/ void BZ2_hbMakeCodeLengths ( UChar *len, Int32 *freq, @@ -171,7 +169,6 @@ void BZ2_hbMakeCodeLengths ( UChar *len, } } - /*---------------------------------------------------*/ void BZ2_hbAssignCodes ( Int32 *code, UChar *length, @@ -189,7 +186,6 @@ void BZ2_hbAssignCodes ( Int32 *code, } } - /*---------------------------------------------------*/ void BZ2_hbCreateDecodeTables ( Int32 *limit, Int32 *base, @@ -223,7 +219,6 @@ void BZ2_hbCreateDecodeTables ( Int32 *limit, base[i] = ((limit[i-1] + 1) << 1) - base[i]; } - /*-------------------------------------------------------------*/ /*--- end huffman.c ---*/ /*-------------------------------------------------------------*/ diff --git a/lib/bzip2/bzlib_private.h b/lib/bzip2/bzlib_private.h index 87d8f94525..b69eadc96a 100644 --- a/lib/bzip2/bzlib_private.h +++ b/lib/bzip2/bzlib_private.h @@ -62,7 +62,6 @@ For more information on these sources, see the manual. --*/ - #ifndef _BZLIB_PRIVATE_H #define _BZLIB_PRIVATE_H @@ -76,7 +75,6 @@ #include <string.h> #endif - /*-- General stuff. --*/ #define BZ_VERSION "1.0.2, 30-Dec-2001" @@ -135,11 +133,9 @@ extern void bz_internal_error ( int errcode ); #define VPrintf5(zf,za1,za2,za3,za4,za5) /* */ #endif - #define BZALLOC(nnn) (strm->bzalloc)(strm->opaque,(nnn),1) #define BZFREE(ppp) (strm->bzfree)(strm->opaque,(ppp)) - /*-- Header bytes. --*/ #define BZ_HDR_B 0x42 /* 'B' */ @@ -161,7 +157,6 @@ extern void bz_internal_error ( int errcode ); #define BZ_MAX_SELECTORS (2 + (900000 / BZ_G_SIZE)) - /*-- Stuff for randomising repetitive blocks. --*/ extern Int32 BZ2_rNums[512]; @@ -184,7 +179,6 @@ extern Int32 BZ2_rNums[512]; } \ s->rNToGo--; - /*-- Stuff for doing CRCs. --*/ extern UInt32 BZ2_crc32Table[256]; @@ -206,7 +200,6 @@ extern UInt32 BZ2_crc32Table[256]; ((UChar)cha)]; \ } - /*-- States and modes for compression. --*/ #define BZ_M_IDLE 1 @@ -222,7 +215,6 @@ extern UInt32 BZ2_crc32Table[256]; #define BZ_N_SHELL 18 #define BZ_N_OVERSHOOT (BZ_N_RADIX + BZ_N_QSORT + BZ_N_SHELL + 2) - /*-- Structure holding all the compression-side stuff. --*/ typedef @@ -297,7 +289,6 @@ typedef } EState; - /*-- externs for compression. --*/ extern void @@ -315,7 +306,6 @@ BZ2_hbAssignCodes ( Int32*, UChar*, Int32, Int32, Int32 ); extern void BZ2_hbMakeCodeLengths ( UChar*, Int32*, Int32, Int32 ); - /*-- states for decompression. --*/ #define BZ_X_IDLE 1 @@ -363,13 +353,11 @@ BZ2_hbMakeCodeLengths ( UChar*, Int32*, Int32, Int32 ); #define BZ_X_CCRC_3 49 #define BZ_X_CCRC_4 50 - /*-- Constants for the fast MTF decoder. --*/ #define MTFA_SIZE 4096 #define MTFL_SIZE 16 - /*-- Structure holding all the decompression-side stuff. --*/ typedef @@ -465,7 +453,6 @@ typedef } DState; - /*-- Macros for decompression. --*/ #define BZ_GET_FAST(cccc) \ @@ -499,7 +486,6 @@ typedef cccc = BZ2_indexIntoF ( s->tPos, s->cftab ); \ s->tPos = GET_LL(s->tPos); - /*-- externs for decompression. --*/ extern Int32 @@ -512,10 +498,8 @@ extern void BZ2_hbCreateDecodeTables ( Int32*, Int32*, Int32*, UChar*, Int32, Int32, Int32 ); - #endif - /*-- BZ_NO_STDIO seems to make NULL disappear on some platforms. --*/ #ifdef BZ_NO_STDIO @@ -524,7 +508,6 @@ BZ2_hbCreateDecodeTables ( Int32*, Int32*, Int32*, UChar*, #endif #endif - /*-------------------------------------------------------------*/ /*--- end bzlib_private.h ---*/ /*-------------------------------------------------------------*/ diff --git a/lib/bzip2/bzlib_randtable.c b/lib/bzip2/bzlib_randtable.c index c3dc7e4181..b2969266fc 100644 --- a/lib/bzip2/bzlib_randtable.c +++ b/lib/bzip2/bzlib_randtable.c @@ -59,10 +59,8 @@ For more information on these sources, see the manual. --*/ - #include "bzlib_private.h" - /*---------------------------------------------*/ Int32 BZ2_rNums[512] = { 619, 720, 127, 481, 931, 816, 813, 233, 566, 247, @@ -119,7 +117,6 @@ Int32 BZ2_rNums[512] = { 936, 638 }; - /*-------------------------------------------------------------*/ /*--- end randtable.c ---*/ /*-------------------------------------------------------------*/ diff --git a/lib/circbuf.c b/lib/circbuf.c index 2e161ae8d8..461c240f78 100644 --- a/lib/circbuf.c +++ b/lib/circbuf.c @@ -9,7 +9,6 @@ #include <circbuf.h> - int buf_init (circbuf_t * buf, unsigned int size) { assert (buf != NULL); diff --git a/lib/crc7.c b/lib/crc7.c index e635c9c2d6..938e258feb 100644 --- a/lib/crc7.c +++ b/lib/crc7.c @@ -8,7 +8,6 @@ #include <linux/types.h> #include <linux/crc7.h> - /* Table for CRC-7 (polynomial x^7 + x^3 + 1) */ const u8 crc7_syndrome_table[256] = { 0x00, 0x09, 0x12, 0x1b, 0x24, 0x2d, 0x36, 0x3f, diff --git a/lib/crypt/crypt-sha256.c b/lib/crypt/crypt-sha256.c index 335c8880d8..824e24e190 100644 --- a/lib/crypt/crypt-sha256.c +++ b/lib/crypt/crypt-sha256.c @@ -72,7 +72,6 @@ struct sha256_buffer static_assert (sizeof (struct sha256_buffer) <= ALG_SPECIFIC_SIZE, "ALG_SPECIFIC_SIZE is too small for SHA256"); - /* Use this instead of including errno.h */ static int errno; diff --git a/lib/crypt/crypt-sha512.c b/lib/crypt/crypt-sha512.c index 8c8e6dd3de..24d1345a22 100644 --- a/lib/crypt/crypt-sha512.c +++ b/lib/crypt/crypt-sha512.c @@ -72,7 +72,6 @@ struct sha512_buffer static_assert (sizeof (struct sha512_buffer) <= ALG_SPECIFIC_SIZE, "ALG_SPECIFIC_SIZE is too small for SHA512"); - /* Use this instead of including errno.h */ static int errno; diff --git a/lib/dhry/dhry.h b/lib/dhry/dhry.h index 892c9ed73b..bd95540eeb 100644 --- a/lib/dhry/dhry.h +++ b/lib/dhry/dhry.h @@ -365,7 +365,6 @@ *************************************************************************** */ - /* Compiler and system dependent definitions: */ #ifndef TIME @@ -432,7 +431,6 @@ typedef struct record } variant; } Rec_Type, *Rec_Pointer; - /* * dhry() - run dhrystone for a given number of iterations * diff --git a/lib/dhry/dhry_1.c b/lib/dhry/dhry_1.c index 252cd14a65..275a89942e 100644 --- a/lib/dhry/dhry_1.c +++ b/lib/dhry/dhry_1.c @@ -102,7 +102,6 @@ void Proc_3 (Rec_Pointer *Ptr_Ref_Par); void Proc_4 (void); void Proc_5 (void); - extern Boolean Func_2(Str_30, Str_30); extern void Proc_6(Enumeration, Enumeration *); extern void Proc_7(One_Fifty, One_Fifty, One_Fifty *); @@ -323,7 +322,6 @@ void dhry(int Number_Of_Runs) #endif /* SELF_TIMED */ } - void Proc_1 (REG Rec_Pointer Ptr_Val_Par) /* executed once */ { @@ -354,7 +352,6 @@ void Proc_1 (REG Rec_Pointer Ptr_Val_Par) structassign (*Ptr_Val_Par, *Ptr_Val_Par->Ptr_Comp); } /* Proc_1 */ - void Proc_2 (One_Fifty *Int_Par_Ref) /* executed once */ /* *Int_Par_Ref == 1, becomes 4 */ @@ -376,7 +373,6 @@ void Proc_2 (One_Fifty *Int_Par_Ref) while (Enum_Loc != Ident_1); /* true */ } /* Proc_2 */ - void Proc_3 (Rec_Pointer *Ptr_Ref_Par) /* executed once */ /* Ptr_Ref_Par becomes Ptr_Glob */ @@ -387,7 +383,6 @@ void Proc_3 (Rec_Pointer *Ptr_Ref_Par) Proc_7 (10, Int_Glob, &Ptr_Glob->variant.var_1.Int_Comp); } /* Proc_3 */ - void Proc_4 (void) /* without parameters */ /* executed once */ { @@ -406,7 +401,6 @@ void Proc_5 (void) /* without parameters */ Bool_Glob = false; } /* Proc_5 */ - /* Procedure for the assignment of structures, */ /* if the C compiler doesn't support this feature */ #ifdef NOSTRUCTASSIGN diff --git a/lib/dhry/dhry_2.c b/lib/dhry/dhry_2.c index a74197d884..8f18f4ed42 100644 --- a/lib/dhry/dhry_2.c +++ b/lib/dhry/dhry_2.c @@ -106,7 +106,6 @@ One_Fifty *Int_Par_Ref; *Int_Par_Ref = Int_2_Par_Val + Int_Loc; } /* Proc_7 */ - void Proc_8 (Arr_1_Par_Ref, Arr_2_Par_Ref, Int_1_Par_Val, Int_2_Par_Val) /*********************************************************************/ /* executed once */ @@ -131,7 +130,6 @@ int Int_2_Par_Val; Int_Glob = 5; } /* Proc_8 */ - Enumeration Func_1 (Capital_Letter Ch_1_Par_Val, Capital_Letter Ch_2_Par_Val) /*************************************************/ /* executed three times */ @@ -154,8 +152,6 @@ Enumeration Func_1 (Capital_Letter Ch_1_Par_Val, Capital_Letter Ch_2_Par_Val) } } /* Func_1 */ - - Boolean Func_2 (Str_1_Par_Ref, Str_2_Par_Ref) /*************************************************/ /* executed once */ @@ -198,7 +194,6 @@ Str_30 Str_2_Par_Ref; } /* if Ch_Loc */ } /* Func_2 */ - Boolean Func_3 (Enum_Par_Val) /***************************/ /* executed once */ diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index ee71f41714..2fb24d7af9 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -298,13 +298,15 @@ config EFI_CAPSULE_MAX Select the max capsule index value used for capsule report variables. This value is used to create CapsuleMax variable. -config EFI_CAPSULE_ESL_FILE - string "Path to the EFI Signature List File" +config EFI_CAPSULE_CRT_FILE + string "Path to the EFI capsule public key certificate" depends on EFI_CAPSULE_AUTHENTICATE help - Provides the path to the EFI Signature List file which will - be embedded in the platform's device tree and used for - capsule authentication at the time of capsule update. + Provides the path to the EFI capsule public key certificate that + corresponds to the capsule signing key. This certificate will be used + to generate the EFI capsule ESL (signature list file) that gets + embedded in the platform's device tree and used for capsule + authentication at the time of capsule update. config EFI_DEVICE_PATH_TO_TEXT bool "Device path to text protocol" diff --git a/lib/efi_loader/dtbdump.c b/lib/efi_loader/dtbdump.c index 5f39cf22da..9f1d8fb82c 100644 --- a/lib/efi_loader/dtbdump.c +++ b/lib/efi_loader/dtbdump.c @@ -41,6 +41,53 @@ static void print(u16 *string) } /** + * print_char() - print character + * + * 0x00 is replaced by '", "'. + * + * @c: - character + */ +static void print_char(unsigned char c) +{ + u16 out[2] = u"?"; + + if (!c) { + print(u"\", \""); + return; + } + + if (c > 0x1f && c < 0x80) + out[0] = c; + + print(out); +} + +/** + * print_hex_digit() - print hexadecimal digit + * + * @digit: digit to print + */ +static void print_hex_digit(unsigned char digit) +{ + if (digit < 10) + digit += '0'; + else + digit += 'a' - 10; + print_char(digit); +} + +/** + * printx() - print hexadecimal byte + * + * @val: value to print + */ +static void printx(unsigned char val) +{ + print_hex_digit(val >> 4); + print_hex_digit(val & 0xf); +} + +/** * error() - print error string * * @string: error text @@ -227,6 +274,7 @@ bool starts_with(u16 *string, u16 *keyword) */ void do_help(void) { + error(u"dump - print device-tree\r\n"); error(u"load <dtb> - load device-tree from file\r\n"); error(u"save <dtb> - save device-tree to file\r\n"); error(u"exit - exit the shell\r\n"); @@ -490,6 +538,217 @@ efi_status_t do_save(u16 *filename) } /** + * indent() - print a number of tabstops + * + * @level: indentation level + */ +static void indent(u32 level) +{ + for (; level; --level) + print(u"\t"); +} + +/** + * is_string_value() - determine if property is a string + * + * If a property is a string, an x-string, or a u32 cannot be deducted + * from the device-tree. Therefore a heuristic is used. + * + * @str: pointer to device-tree property + * @len: length of the device-tree property + * Return: 1 for string, 0 otherwise + */ +static int is_string_value(const unsigned char *str, u32 len) +{ + int nonzero_flag = 0; + + /* Zero length or not ending with 0x00 */ + if (!len || str[len - 1]) + return 0; + + for (u32 i = 0; i < len; ++i) { + if (!str[i]) { + /* Zero length string or two consecutive 0x00 */ + if (!nonzero_flag) + return 0; + + nonzero_flag = 0; + + continue; + } + /* Non-printable */ + if (str[i] < 0x20 || str[i] >= 0x80) + return 0; + + nonzero_flag = 1; + } + + return 1; +} + +/** + * print_property() - print device-tree property + * + * If a property is a string, an x-string, or a u32 cannot be deducted + * from the device-tree. Therefore a heuristic is used. + * + * @str: property value + * @len: length of property value + */ +static void print_property(const unsigned char *val, u32 len) +{ + if (is_string_value(val, len)) { + /* string */ + print(u"\""); + for (int i = 0; i < len - 1; ++i) + print_char(val[i]); + print(u"\""); + } else if (len & 0x3) { + /* byte string */ + print(u"["); + for (int i = 0; i < len; ++i) { + if (i) + print(u" "); + printx(val[i]); + } + print(u"]\""); + } else { + /* cell list */ + print(u"<"); + for (u32 i = 0; i < len; ++i) { + if ((i & 0x3) == 0) { + if (i > 0) + print(u" "); + print(u"0x"); + } + printx(val[i]); + } + print(u">"); + } +} + +/** + * print_mem_res_block() - print memory reservation block + * + * @rsvblk: memory reservation block + */ +static void print_mem_res_block(const struct fdt_reserve_entry *rsvblk) +{ + for (; rsvblk->address || rsvblk->size; ++rsvblk) { + const unsigned char *val; + + print(u"/memreserve/ 0x"); + val = (const unsigned char *)&rsvblk->address; + for (u32 i = 0; i < sizeof(u64); ++i) + printx(val[i]); + print(u" 0x"); + val = (const unsigned char *)&rsvblk->size; + for (u32 i = 0; i < sizeof(u64); ++i) + printx(val[i]); + print(u";\r\n"); + } +} + +/** + * do_dump() - print device-tree + */ +static efi_status_t do_dump(void) +{ + const unsigned char *fdt; + struct fdt_header *header; + const u32 *end; + const u32 *pos; + const char *strings; + u32 level = 0; + + fdt = get_dtb(systable); + if (!fdt) { + error(u"DTB not found\r\n"); + return EFI_NOT_FOUND; + } + + header = (struct fdt_header *)fdt; + if (f2h(header->magic) != FDT_MAGIC) { + error(u"Wrong device tree magic\r\n"); + error(u"Not a device-tree\r\n"); + return EFI_LOAD_ERROR; + } + + pos = (u32 *)(fdt + f2h(header->off_dt_struct)); + end = &pos[f2h(header->totalsize) >> 2]; + strings = fdt + f2h(header->off_dt_strings); + + print(u"/dts-v1/;\r\n"); + + print_mem_res_block((const struct fdt_reserve_entry *) + (fdt + f2h(header->off_mem_rsvmap))); + + print(u"/"); + for (; pos < end;) { + switch (f2h(pos[0])) { + case FDT_BEGIN_NODE: { + const char *c = (char *)&pos[1]; + size_t i; + + indent(level); + for (i = 0; c[i]; ++i) + print_char(c[i]); + print(u" {\n\r"); + + ++level; + pos = &pos[2 + (i >> 2)]; + break; + } + case FDT_PROP: { + struct fdt_property *prop = (struct fdt_property *)pos; + const unsigned char *label = &strings[f2h(prop->nameoff)]; + u32 len = f2h(prop->len); + const unsigned char *str = (unsigned char *)&pos[3]; + + indent(level); + for (int i = 0; label[i]; ++i) + print_char(label[i]); + + if (len) { + print(u" = "); + print_property(str, len); + } + print(u";\r\n"); + + pos = &pos[3 + ((f2h(prop->len) + 3) >> 2)]; + break; + } + case FDT_NOP: + ++pos; + break; + case FDT_END_NODE: + if (!level) { + error(u"Extraneous end node\r\n"); + return EFI_LOAD_ERROR; + } + + --level; + indent(level); + print(u"};\n\r"); + ++pos; + break; + case FDT_END: + if (level) { + error(u"Missing end node\r\n"); + return EFI_LOAD_ERROR; + } + return EFI_SUCCESS; + default: + error(u"Invalid device tree token\r\n"); + return EFI_LOAD_ERROR; + } + } + error(u"Overrun\r\n"); + + return EFI_LOAD_ERROR; +} + +/** * efi_main() - entry point of the EFI application. * * @handle: handle of the loaded image @@ -524,6 +783,8 @@ efi_status_t EFIAPI efi_main(efi_handle_t image_handle, pos = skip_whitespace(command); if (starts_with(pos, u"exit")) break; + else if (starts_with(pos, u"dump")) + do_dump(); else if (starts_with(pos, u"load ")) do_load(pos + 5); else if (starts_with(pos, u"save ")) diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index 0937800e58..635088f25a 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -572,7 +572,6 @@ static efi_status_t efi_capsule_update_firmware( return EFI_INVALID_PARAMETER; } - /* Obtain the update_index from the platform */ status = fwu_plat_get_update_index(&update_index); if (status < 0) { diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index 03dece51ae..c944c10b21 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -1176,7 +1176,6 @@ out: return EFI_EXIT(ret); } - /** * efi_cin_reset() - drain the input buffer * diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index 45dc5b6b24..0ddf69a091 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -738,7 +738,6 @@ static bool efi_image_authenticate(void *efi, size_t efi_size) log_debug("Message digest doesn't match\n"); } - /* last resort try the image sha256 hash in db */ if (!ret && efi_signature_lookup_digest(regs, db, false)) ret = true; @@ -761,7 +760,6 @@ static bool efi_image_authenticate(void *efi, size_t efi_size) } #endif /* CONFIG_EFI_SECURE_BOOT */ - /** * efi_check_pe() - check if a memory buffer contains a PE-COFF image * diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index 09651d4675..e888c52efe 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -604,6 +604,5 @@ efi_status_t efi_init_variables(void) log_err("Invalid EFI variable seed\n"); } - return efi_init_secure_state(); } diff --git a/lib/efi_selftest/efi_selftest_controllers.c b/lib/efi_selftest/efi_selftest_controllers.c index 02f19574f8..9f23117449 100644 --- a/lib/efi_selftest/efi_selftest_controllers.c +++ b/lib/efi_selftest/efi_selftest_controllers.c @@ -447,7 +447,6 @@ static int execute(void) return EFI_ST_FAILURE; } - return EFI_ST_SUCCESS; } diff --git a/lib/efi_selftest/efi_selftest_ecpt.c b/lib/efi_selftest/efi_selftest_ecpt.c index 09c5e96c5e..47316598e6 100644 --- a/lib/efi_selftest/efi_selftest_ecpt.c +++ b/lib/efi_selftest/efi_selftest_ecpt.c @@ -68,7 +68,6 @@ static int execute(void) return EFI_ST_SUCCESS; } - EFI_UNIT_TEST(ecpt) = { .name = "conformance profile table", .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, diff --git a/lib/efi_selftest/efi_selftest_load_file.c b/lib/efi_selftest/efi_selftest_load_file.c index 14df761172..4e77a7cbac 100644 --- a/lib/efi_selftest/efi_selftest_load_file.c +++ b/lib/efi_selftest/efi_selftest_load_file.c @@ -233,7 +233,6 @@ static efi_status_t EFIAPI load_file(struct efi_load_file_protocol *this, return EFI_SUCCESS; } - /* * load_file2() - LoadFile() service of a EFI_LOAD_FILE2_PROTOCOL * diff --git a/lib/fdtdec.c b/lib/fdtdec.c index b2c59ab381..5b3b26df96 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1182,7 +1182,6 @@ static int uncompress_blob(const void *src, ulong sz_src, void **dstp) if (!gzip && !lzo) return -EBADMSG; - if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) { dst = malloc(sz_out); if (!dst) { diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c index 5dfea2a4d8..c7fc8987be 100644 --- a/lib/fwu_updates/fwu.c +++ b/lib/fwu_updates/fwu.c @@ -278,7 +278,6 @@ int fwu_get_mdata(struct fwu_mdata *mdata) if (!err) goto ret_mdata; - /* else read, verify and, if needed, fix mdata */ for (int i = 0; i < 2; i++) { parts_ok[i] = false; diff --git a/lib/hashtable.c b/lib/hashtable.c index a0060f6a0d..9613adc554 100644 --- a/lib/hashtable.c +++ b/lib/hashtable.c @@ -58,7 +58,6 @@ struct env_entry_node { struct env_entry entry; }; - static void _hdelete(const char *key, struct hsearch_data *htab, struct env_entry *ep, int idx); @@ -127,7 +126,6 @@ int hcreate_r(size_t nel, struct hsearch_data *htab) return 1; } - /* * hdestroy() */ @@ -428,7 +426,6 @@ int hsearch_r(struct env_entry item, enum env_action action, return 0; } - /* * hdelete() */ @@ -718,7 +715,6 @@ ssize_t hexport_r(struct hsearch_data *htab, const char sep, int flag, } #endif - /* * himport() */ diff --git a/lib/libavb/avb_sha.h b/lib/libavb/avb_sha.h index f5d02e09f2..fdd92fbe22 100644 --- a/lib/libavb/avb_sha.h +++ b/lib/libavb/avb_sha.h @@ -24,7 +24,6 @@ extern "C" { /* Block size in bytes of a SHA-256 digest. */ #define AVB_SHA256_BLOCK_SIZE 64 - /* Block size in bytes of a SHA-512 digest. */ #define AVB_SHA512_BLOCK_SIZE 128 @@ -71,7 +71,6 @@ static void LZ4_wildCopy(void* dstPtr, const void* srcPtr, void* dstEnd) do { LZ4_copy8(d,s); d+=8; s+=8; } while (d<e); } - /************************************** * Common Constants **************************************/ diff --git a/lib/lzma/LzmaDec.c b/lib/lzma/LzmaDec.c index 1da3f0a14a..954380af52 100644 --- a/lib/lzma/LzmaDec.c +++ b/lib/lzma/LzmaDec.c @@ -58,7 +58,6 @@ #define TREE_DECODE_CHECK(probs, limit, i) \ { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; } - #define kNumPosBitsMax 4 #define kNumPosStatesMax (1 << kNumPosBitsMax) @@ -76,7 +75,6 @@ #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits)) #define kNumLenProbs (LenHigh + kLenNumHighSymbols) - #define kNumStates 12 #define kNumLitStates 7 @@ -689,7 +687,6 @@ static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inS return res; } - static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data) { p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]); diff --git a/lib/lzma/LzmaDec.h b/lib/lzma/LzmaDec.h index 63aa505e8c..14b247b802 100644 --- a/lib/lzma/LzmaDec.h +++ b/lib/lzma/LzmaDec.h @@ -16,7 +16,6 @@ #define CLzmaProb UInt16 #endif - /* ---------- LZMA Properties ---------- */ #define LZMA_PROPS_SIZE 5 @@ -35,7 +34,6 @@ Returns: SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size); - /* ---------- LZMA Decoder state ---------- */ /* LZMA_REQUIRED_INPUT_MAX = number of required input bytes for worst case. @@ -104,7 +102,6 @@ typedef enum /* ELzmaStatus is used only as output value for function call */ - /* ---------- Interfaces ---------- */ /* There are 3 levels of interfaces: @@ -114,7 +111,6 @@ typedef enum You can select any of these interfaces, but don't mix functions from different groups for same object. */ - /* There are two variants to allocate state for Dictionary Interface: 1) LzmaDec_Allocate / LzmaDec_Free 2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs @@ -177,7 +173,6 @@ Returns: SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); - /* ---------- Buffer Interface ---------- */ /* It's zlib-like interface. @@ -194,7 +189,6 @@ finishMode: SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); - /* ---------- One Call Interface ---------- */ /* LzmaDecode diff --git a/lib/lzma/Types.h b/lib/lzma/Types.h index 04f894a8ca..6f7e735c1f 100644 --- a/lib/lzma/Types.h +++ b/lib/lzma/Types.h @@ -84,7 +84,6 @@ typedef int Bool; #define True 1 #define False 0 - #ifdef _MSC_VER #if _MSC_VER >= 1300 @@ -103,7 +102,6 @@ typedef int Bool; #endif - /* The following interfaces use first parameter as pointer to structure */ typedef struct diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c index 5d70fa4133..03027e5dc3 100644 --- a/lib/lzo/lzo1x_decompress.c +++ b/lib/lzo/lzo1x_decompress.c @@ -31,7 +31,6 @@ static const unsigned char lzop_magic[] = { #define HEADER_HAS_FILTER 0x00000800L - bool lzop_is_valid_header(const unsigned char *src) { int i; @@ -276,7 +276,6 @@ md5 (unsigned char *input, int len, unsigned char output[16]) MD5Final(output, &context); } - /* * Calculate and store in 'output' the MD5 digest of 'len' bytes at 'input'. * 'output' must have enough space to hold 16 bytes. If 'chunk' Trigger the diff --git a/lib/string.c b/lib/string.c index f2c6147128..feae9519f2 100644 --- a/lib/string.c +++ b/lib/string.c @@ -22,7 +22,6 @@ #include <linux/ctype.h> #include <malloc.h> - /** * strncasecmp - Case insensitive, length-limited string comparison * @s1: One string diff --git a/lib/zlib/deflate.c b/lib/zlib/deflate.c index 7e1ed4f9b2..af7542cc9a 100644 --- a/lib/zlib/deflate.c +++ b/lib/zlib/deflate.c @@ -164,7 +164,6 @@ struct static_tree_desc_s {int dummy;}; /* for buggy compilers */ */ #define UPDATE_HASH(s,h,c) (h = (((h)<<s->hash_shift) ^ (c)) & s->hash_mask) - /* =========================================================================== * Insert string str in the dictionary and set match_head to the previous head * of the hash chain (the most recent string with same hash key). Return @@ -966,7 +965,6 @@ int ZEXPORT deflateCopy (dest, source) deflate_state *ds; deflate_state *ss; - if (source == Z_NULL || dest == Z_NULL || source->state == Z_NULL) { return Z_STREAM_ERROR; } diff --git a/lib/zlib/deflate.h b/lib/zlib/deflate.h index 4c53b94af0..b4a4634ec7 100644 --- a/lib/zlib/deflate.h +++ b/lib/zlib/deflate.h @@ -57,7 +57,6 @@ #define FINISH_STATE 666 /* Stream status */ - /* Data structure describing a single value and its code string. */ typedef struct ct_data_s { union { @@ -269,7 +268,6 @@ typedef struct internal_state { */ #define put_byte(s, c) {s->pending_buf[s->pending++] = (c);} - #define MIN_LOOKAHEAD (MAX_MATCH+MIN_MATCH+1) /* Minimum amount of lookahead, except at the end of the input file. * See deflate.c for comments about the MIN_MATCH+1. diff --git a/lib/zlib/trees.c b/lib/zlib/trees.c index e040617686..569d44351e 100644 --- a/lib/zlib/trees.c +++ b/lib/zlib/trees.c @@ -231,7 +231,6 @@ local void send_bits(s, value, length) } #endif /* DEBUG */ - /* the arguments must not have side effects */ /* =========================================================================== @@ -431,7 +430,6 @@ local void init_block(s) #define SMALLEST 1 /* Index within the heap array of least frequent node in the Huffman tree */ - /* =========================================================================== * Remove the smallest element from the heap and recreate the heap with * one less element. Updates heap and heap_len. diff --git a/lib/zlib/zutil.h b/lib/zlib/zutil.h index e63bf68653..c0c04196a0 100644 --- a/lib/zlib/zutil.h +++ b/lib/zlib/zutil.h @@ -114,7 +114,6 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */ # define Tracecv(c,x) #endif - voidpf zcalloc OF((voidpf opaque, unsigned items, unsigned size)); void zcfree OF((voidpf opaque, voidpf ptr, unsigned size)); diff --git a/lib/zstd/common/bitstream.h b/lib/zstd/common/bitstream.h index feef3a1b1d..ee36de1cd1 100644 --- a/lib/zstd/common/bitstream.h +++ b/lib/zstd/common/bitstream.h @@ -28,7 +28,6 @@ #include "debug.h" /* assert(), DEBUGLOG(), RAWLOG() */ #include "error_private.h" /* error codes and messages */ - /*========================================= * Target specific =========================================*/ @@ -37,7 +36,6 @@ #define STREAM_ACCUMULATOR_MIN_64 57 #define STREAM_ACCUMULATOR_MIN ((U32)(MEM_32bits() ? STREAM_ACCUMULATOR_MIN_32 : STREAM_ACCUMULATOR_MIN_64)) - /*-****************************************** * bitStream encoding API (write forward) ********************************************/ @@ -75,7 +73,6 @@ MEM_STATIC size_t BIT_closeCStream(BIT_CStream_t* bitC); * If data couldn't fit into `dstBuffer`, it will return a 0 ( == not storable) */ - /*-******************************************** * bitStream decoding API (read backward) **********************************************/ @@ -98,7 +95,6 @@ MEM_STATIC size_t BIT_readBits(BIT_DStream_t* bitD, unsigned nbBits); MEM_STATIC BIT_DStream_status BIT_reloadDStream(BIT_DStream_t* bitD); MEM_STATIC unsigned BIT_endOfDStream(const BIT_DStream_t* bitD); - /* Start by invoking BIT_initDStream(). * A chunk of the bitStream is then stored into a local register. * Local register size is 64-bits on 64-bits systems, 32-bits on 32-bits systems (size_t). @@ -109,7 +105,6 @@ MEM_STATIC unsigned BIT_endOfDStream(const BIT_DStream_t* bitD); * Checking if DStream has reached its end can be performed with BIT_endOfDStream(). */ - /*-**************************************** * unsafe API ******************************************/ @@ -122,8 +117,6 @@ MEM_STATIC void BIT_flushBitsFast(BIT_CStream_t* bitC); MEM_STATIC size_t BIT_readBitsFast(BIT_DStream_t* bitD, unsigned nbBits); /* faster, but works only if nbBits >= 1 */ - - /*-************************************************************** * Internal functions ****************************************************************/ @@ -245,7 +238,6 @@ MEM_STATIC size_t BIT_closeCStream(BIT_CStream_t* bitC) return (bitC->ptr - bitC->startPtr) + (bitC->bitPos > 0); } - /*-******************************************************** * bitStream decoding **********************************************************/ @@ -442,5 +434,4 @@ MEM_STATIC unsigned BIT_endOfDStream(const BIT_DStream_t* DStream) return ((DStream->ptr == DStream->start) && (DStream->bitsConsumed == sizeof(DStream->bitContainer)*8)); } - #endif /* BITSTREAM_H_MODULE */ diff --git a/lib/zstd/common/compiler.h b/lib/zstd/common/compiler.h index c42d39faf9..a734565860 100644 --- a/lib/zstd/common/compiler.h +++ b/lib/zstd/common/compiler.h @@ -70,7 +70,6 @@ /* force no inlining */ #define FORCE_NOINLINE static __attribute__((__noinline__)) - /* target attribute */ #define TARGET_ATTRIBUTE(target) __attribute__((__target__(target))) @@ -135,7 +134,6 @@ /*Like DYNAMIC_BMI2 but for compile time determination of BMI2 support*/ - /* compile time determination of SIMD support */ /* C-language Attributes are added in C23. */ @@ -179,6 +177,4 @@ * Sanitizer *****************************************************************/ - - #endif /* ZSTD_COMPILER_H */ diff --git a/lib/zstd/common/cpu.h b/lib/zstd/common/cpu.h index 0db7b42407..becf832a95 100644 --- a/lib/zstd/common/cpu.h +++ b/lib/zstd/common/cpu.h @@ -18,7 +18,6 @@ #include "mem.h" - typedef struct { U32 f1c; U32 f1d; diff --git a/lib/zstd/common/debug.c b/lib/zstd/common/debug.c index bb863c9ea6..49254cc672 100644 --- a/lib/zstd/common/debug.c +++ b/lib/zstd/common/debug.c @@ -12,7 +12,6 @@ * You may select, at your option, one of the above-listed licenses. ****************************************************************** */ - /* * This module only hosts one global variable * which can be used to dynamically influence the verbosity of traces, diff --git a/lib/zstd/common/debug.h b/lib/zstd/common/debug.h index 7f43dd3c06..ad6e60d609 100644 --- a/lib/zstd/common/debug.h +++ b/lib/zstd/common/debug.h @@ -12,7 +12,6 @@ * You may select, at your option, one of the above-listed licenses. ****************************************************************** */ - /* * The purpose of this header is to enable debug functions. * They regroup assert(), DEBUGLOG() and RAWLOG() for run-time, @@ -32,14 +31,11 @@ #ifndef DEBUG_H_12987983217 #define DEBUG_H_12987983217 - - /* static assert is triggered at compile time, leaving no runtime artefact. * static assert only works with compile-time constants. * Also, this variant can only be used inside a function. */ #define DEBUG_STATIC_ASSERT(c) (void)sizeof(char[(c) ? 1 : -1]) - /* DEBUGLEVEL is expected to be defined externally, * typically through compiler command line. * Value must be a number. */ @@ -47,7 +43,6 @@ # define DEBUGLEVEL 0 #endif - /* recommended values for DEBUGLEVEL : * 0 : release mode, no debug, all run-time checks disabled * 1 : enables assert() only, no display @@ -87,6 +82,4 @@ extern int g_debuglevel; /* the variable is only declared, # define DEBUGLOG(l, ...) {} /* disabled */ #endif - - #endif /* DEBUG_H_12987983217 */ diff --git a/lib/zstd/common/entropy_common.c b/lib/zstd/common/entropy_common.c index fef67056f0..0f421839ed 100644 --- a/lib/zstd/common/entropy_common.c +++ b/lib/zstd/common/entropy_common.c @@ -22,11 +22,9 @@ #define HUF_STATIC_LINKING_ONLY /* HUF_TABLELOG_ABSOLUTEMAX */ #include "huf.h" - /*=== Version ===*/ unsigned FSE_versionNumber(void) { return FSE_VERSION_NUMBER; } - /*=== Error Management ===*/ unsigned FSE_isError(size_t code) { return ERR_isError(code); } const char* FSE_getErrorName(size_t code) { return ERR_getErrorName(code); } @@ -34,7 +32,6 @@ const char* FSE_getErrorName(size_t code) { return ERR_getErrorName(code); } unsigned HUF_isError(size_t code) { return ERR_isError(code); } const char* HUF_getErrorName(size_t code) { return ERR_getErrorName(code); } - /*-************************************************************** * FSE NCount encoding-decoding ****************************************************************/ @@ -240,7 +237,6 @@ size_t FSE_readNCount( return FSE_readNCount_bmi2(normalizedCounter, maxSVPtr, tableLogPtr, headerBuffer, hbSize, /* bmi2 */ 0); } - /*! HUF_readStats() : Read compact Huffman tree, saved by HUF_writeCTable(). `huffWeight` is destination buffer. diff --git a/lib/zstd/common/error_private.h b/lib/zstd/common/error_private.h index ca5101e542..886d2757df 100644 --- a/lib/zstd/common/error_private.h +++ b/lib/zstd/common/error_private.h @@ -13,8 +13,6 @@ #ifndef ERROR_H_MODULE #define ERROR_H_MODULE - - /* **************************************** * Dependencies ******************************************/ @@ -23,20 +21,17 @@ #include "debug.h" #include "zstd_deps.h" /* size_t */ - /* **************************************** * Compiler-specific ******************************************/ #define ERR_STATIC static __attribute__((unused)) - /*-**************************************** * Customization (error_public.h) ******************************************/ typedef ZSTD_ErrorCode ERR_enum; #define PREFIX(name) ZSTD_error_##name - /*-**************************************** * Error codes handling ******************************************/ @@ -52,7 +47,6 @@ ERR_STATIC ERR_enum ERR_getErrorCode(size_t code) { if (!ERR_isError(code)) retu #define CHECK_V_F(e, f) size_t const e = f; if (ERR_isError(e)) return e #define CHECK_F(f) { CHECK_V_F(_var_err__, f); } - /*-**************************************** * Error Strings ******************************************/ @@ -141,5 +135,4 @@ void _force_has_format_string(const char *format, ...) { } \ } while(0); - #endif /* ERROR_H_MODULE */ diff --git a/lib/zstd/common/fse.h b/lib/zstd/common/fse.h index 4507043b22..78b3ff14b9 100644 --- a/lib/zstd/common/fse.h +++ b/lib/zstd/common/fse.h @@ -12,17 +12,14 @@ * You may select, at your option, one of the above-listed licenses. ****************************************************************** */ - #ifndef FSE_H #define FSE_H - /*-***************************************** * Dependencies ******************************************/ #include "zstd_deps.h" /* size_t, ptrdiff_t */ - /*-***************************************** * FSE_PUBLIC_API : control library symbols visibility ******************************************/ @@ -49,7 +46,6 @@ #define FSE_VERSION_NUMBER (FSE_VERSION_MAJOR *100*100 + FSE_VERSION_MINOR *100 + FSE_VERSION_RELEASE) FSE_PUBLIC_API unsigned FSE_versionNumber(void); /*< library version number; to be used when checking dll version */ - /*-**************************************** * FSE simple functions ******************************************/ @@ -77,7 +73,6 @@ FSE_PUBLIC_API size_t FSE_compress(void* dst, size_t dstCapacity, FSE_PUBLIC_API size_t FSE_decompress(void* dst, size_t dstCapacity, const void* cSrc, size_t cSrcSize); - /*-***************************************** * Tool functions ******************************************/ @@ -87,7 +82,6 @@ FSE_PUBLIC_API size_t FSE_compressBound(size_t size); /* maximum compresse FSE_PUBLIC_API unsigned FSE_isError(size_t code); /* tells if a return value is an error code */ FSE_PUBLIC_API const char* FSE_getErrorName(size_t code); /* provides error code string (useful for debugging) */ - /*-***************************************** * FSE advanced functions ******************************************/ @@ -101,7 +95,6 @@ FSE_PUBLIC_API const char* FSE_getErrorName(size_t code); /* provides error co */ FSE_PUBLIC_API size_t FSE_compress2 (void* dst, size_t dstSize, const void* src, size_t srcSize, unsigned maxSymbolValue, unsigned tableLog); - /*-***************************************** * FSE detailed API ******************************************/ @@ -219,7 +212,6 @@ If it returns '0', compressed data could not fit into 'dst'. If there is an error, the function will return an ErrorCode (which can be tested using FSE_isError()). */ - /* *** DECOMPRESSION *** */ /*! FSE_readNCount(): @@ -292,7 +284,6 @@ If there is an error, the function will return an error code, which can be teste /* *** Dependency *** */ #include "bitstream.h" - /* ***************************************** * Static allocation *******************************************/ @@ -309,7 +300,6 @@ If there is an error, the function will return an error code, which can be teste #define FSE_CTABLE_SIZE(maxTableLog, maxSymbolValue) (FSE_CTABLE_SIZE_U32(maxTableLog, maxSymbolValue) * sizeof(FSE_CTable)) #define FSE_DTABLE_SIZE(maxTableLog) (FSE_DTABLE_SIZE_U32(maxTableLog) * sizeof(FSE_DTable)) - /* ***************************************** * FSE advanced API ***************************************** */ @@ -397,7 +387,6 @@ FSE_CTable ct; // Provided by FSE_buildCTable() BIT_CStream_t bitStream; // bitStream tracking structure FSE_CState_t state; // State tracking structure (can have several) - The first thing to do is to init bitStream and state. size_t errorCode = BIT_initCStream(&bitStream, dstBuffer, maxDstSize); FSE_initCState(&state, ct); @@ -427,7 +416,6 @@ If there is an error, it returns an errorCode (which can be tested using FSE_isE size_t size = BIT_closeCStream(&bitStream); */ - /* ***************************************** * FSE symbol decompression API *******************************************/ @@ -436,7 +424,6 @@ typedef struct { const void* table; /* precise table may vary, depending on U16 */ } FSE_DState_t; - static void FSE_initDState(FSE_DState_t* DStatePtr, BIT_DStream_t* bitD, const FSE_DTable* dt); static unsigned char FSE_decodeSymbol(FSE_DState_t* DStatePtr, BIT_DStream_t* bitD); @@ -492,14 +479,12 @@ Check also the states. There might be some symbols left there, if some high prob FSE_endOfDState(&DState); */ - /* ***************************************** * FSE unsafe API *******************************************/ static unsigned char FSE_decodeSymbolFast(FSE_DState_t* DStatePtr, BIT_DStream_t* bitD); /* faster, but works only if nbBits is always >= 1 (otherwise, result will be corrupted) */ - /* ***************************************** * Implementation of inlined functions *******************************************/ @@ -519,7 +504,6 @@ MEM_STATIC void FSE_initCState(FSE_CState_t* statePtr, const FSE_CTable* ct) statePtr->stateLog = tableLog; } - /*! FSE_initCState2() : * Same as FSE_initCState(), but the first symbol to include (which will be the last to be read) * uses the smallest state value possible, saving the cost of this symbol */ @@ -549,7 +533,6 @@ MEM_STATIC void FSE_flushCState(BIT_CStream_t* bitC, const FSE_CState_t* statePt BIT_flushBits(bitC); } - /* FSE_getMaxNbBits() : * Approximate maximum cost of a symbol, in bits. * Fractional get rounded up (i.e : a symbol with a normalized frequency of 3 gives the same result as a frequency of 2) @@ -582,7 +565,6 @@ MEM_STATIC U32 FSE_bitCost(const void* symbolTTPtr, U32 tableLog, U32 symbolValu } } - /* ====== Decompression ====== */ typedef struct { @@ -649,8 +631,6 @@ MEM_STATIC unsigned FSE_endOfDState(const FSE_DState_t* DStatePtr) return DStatePtr->state == 0; } - - #ifndef FSE_COMMONDEFS_ONLY /* ************************************************************** @@ -685,10 +665,8 @@ MEM_STATIC unsigned FSE_endOfDState(const FSE_DState_t* DStatePtr) #define FSE_FUNCTION_EXTENSION #define FSE_DECODE_TYPE FSE_decode_t - #endif /* !FSE_COMMONDEFS_ONLY */ - /* *************************************************************** * Constants *****************************************************************/ @@ -705,7 +683,5 @@ MEM_STATIC unsigned FSE_endOfDState(const FSE_DState_t* DStatePtr) #define FSE_TABLESTEP(tableSize) (((tableSize)>>1) + ((tableSize)>>3) + 3) - #endif /* FSE_STATIC_LINKING_ONLY */ - diff --git a/lib/zstd/common/fse_decompress.c b/lib/zstd/common/fse_decompress.c index a0d06095be..5aa75db413 100644 --- a/lib/zstd/common/fse_decompress.c +++ b/lib/zstd/common/fse_decompress.c @@ -12,7 +12,6 @@ * You may select, at your option, one of the above-listed licenses. ****************************************************************** */ - /* ************************************************************** * Includes ****************************************************************/ @@ -25,14 +24,12 @@ #define ZSTD_DEPS_NEED_MALLOC #include "zstd_deps.h" - /* ************************************************************** * Error Management ****************************************************************/ #define FSE_isError ERR_isError #define FSE_STATIC_ASSERT(c) DEBUG_STATIC_ASSERT(c) /* use only *after* variable declarations */ - /* ************************************************************** * Templates ****************************************************************/ @@ -55,7 +52,6 @@ #define FSE_FUNCTION_NAME(X,Y) FSE_CAT(X,Y) #define FSE_TYPE_NAME(X,Y) FSE_CAT(X,Y) - /* Function templates */ FSE_DTable* FSE_createDTable (unsigned tableLog) { @@ -178,7 +174,6 @@ size_t FSE_buildDTable_wksp(FSE_DTable* dt, const short* normalizedCounter, unsi return FSE_buildDTable_internal(dt, normalizedCounter, maxSymbolValue, tableLog, workSpace, wkspSize); } - #ifndef FSE_COMMONDEFS_ONLY /*-******************************************************* @@ -201,7 +196,6 @@ size_t FSE_buildDTable_rle (FSE_DTable* dt, BYTE symbolValue) return 0; } - size_t FSE_buildDTable_raw (FSE_DTable* dt, unsigned nbBits) { void* ptr = dt; @@ -290,7 +284,6 @@ FORCE_INLINE_TEMPLATE size_t FSE_decompress_usingDTable_generic( return op-ostart; } - size_t FSE_decompress_usingDTable(void* dst, size_t originalSize, const void* cSrc, size_t cSrcSize, const FSE_DTable* dt) @@ -304,7 +297,6 @@ size_t FSE_decompress_usingDTable(void* dst, size_t originalSize, return FSE_decompress_usingDTable_generic(dst, originalSize, cSrc, cSrcSize, dt, 0); } - size_t FSE_decompress_wksp(void* dst, size_t dstCapacity, const void* cSrc, size_t cSrcSize, unsigned maxLog, void* workSpace, size_t wkspSize) { return FSE_decompress_wksp_bmi2(dst, dstCapacity, cSrc, cSrcSize, maxLog, workSpace, wkspSize, /* bmi2 */ 0); @@ -315,7 +307,6 @@ typedef struct { FSE_DTable dtable[1]; /* Dynamically sized */ } FSE_DecompressWksp; - FORCE_INLINE_TEMPLATE size_t FSE_decompress_wksp_body( void* dst, size_t dstCapacity, const void* cSrc, size_t cSrcSize, @@ -382,9 +373,6 @@ size_t FSE_decompress_wksp_bmi2(void* dst, size_t dstCapacity, const void* cSrc, return FSE_decompress_wksp_body_default(dst, dstCapacity, cSrc, cSrcSize, maxLog, workSpace, wkspSize); } - typedef FSE_DTable DTable_max_t[FSE_DTABLE_SIZE_U32(FSE_MAX_TABLELOG)]; - - #endif /* FSE_COMMONDEFS_ONLY */ diff --git a/lib/zstd/common/huf.h b/lib/zstd/common/huf.h index 5042ff8703..b2678b8153 100644 --- a/lib/zstd/common/huf.h +++ b/lib/zstd/common/huf.h @@ -12,14 +12,12 @@ * You may select, at your option, one of the above-listed licenses. ****************************************************************** */ - #ifndef HUF_H_298734234 #define HUF_H_298734234 /* *** Dependencies *** */ #include "zstd_deps.h" /* size_t */ - /* *** library symbols visibility *** */ /* Note : when linking with -fvisibility=hidden on gcc, or by default on Visual, * HUF symbols remain "private" (internal symbols for library only). @@ -34,7 +32,6 @@ # define HUF_PUBLIC_API #endif - /* ========================== */ /* *** simple functions *** */ /* ========================== */ @@ -64,7 +61,6 @@ HUF_PUBLIC_API size_t HUF_compress(void* dst, size_t dstCapacity, HUF_PUBLIC_API size_t HUF_decompress(void* dst, size_t originalSize, const void* cSrc, size_t cSrcSize); - /* *** Tool functions *** */ #define HUF_BLOCKSIZE_MAX (128 * 1024) /*< maximum input size for a single block compressed with HUF_compress */ HUF_PUBLIC_API size_t HUF_compressBound(size_t size); /*< maximum compressed size (worst case) */ @@ -73,7 +69,6 @@ HUF_PUBLIC_API size_t HUF_compressBound(size_t size); /*< maximum compressed s HUF_PUBLIC_API unsigned HUF_isError(size_t code); /*< tells if a return value is an error code */ HUF_PUBLIC_API const char* HUF_getErrorName(size_t code); /*< provides error code string (useful for debugging) */ - /* *** Advanced function *** */ /* HUF_compress2() : @@ -111,7 +106,6 @@ HUF_PUBLIC_API size_t HUF_compress4X_wksp (void* dst, size_t dstCapacity, #define FSE_STATIC_LINKING_ONLY #include "fse.h" - /* *** Constants *** */ #define HUF_TABLELOG_MAX 12 /* max runtime value of tableLog (due to static allocation); can be modified up to HUF_TABLELOG_ABSOLUTEMAX */ #define HUF_TABLELOG_DEFAULT 11 /* default tableLog value when none specified */ @@ -122,7 +116,6 @@ HUF_PUBLIC_API size_t HUF_compress4X_wksp (void* dst, size_t dstCapacity, # error "HUF_TABLELOG_MAX is too large !" #endif - /* **************************************** * Static allocation ******************************************/ @@ -147,7 +140,6 @@ typedef U32 HUF_DTable; #define HUF_CREATE_STATIC_DTABLEX2(DTable, maxTableLog) \ HUF_DTable DTable[HUF_DTABLE_SIZE(maxTableLog)] = { ((U32)(maxTableLog) * 0x01000001) } - /* **************************************** * Advanced decompression functions ******************************************/ @@ -166,7 +158,6 @@ size_t HUF_decompress4X2_DCtx(HUF_DTable* dctx, void* dst, size_t dstSize, const size_t HUF_decompress4X2_DCtx_wksp(HUF_DTable* dctx, void* dst, size_t dstSize, const void* cSrc, size_t cSrcSize, void* workSpace, size_t wkspSize); /*< double-symbols decoder */ #endif - /* **************************************** * HUF detailed API * ****************************************/ @@ -293,7 +284,6 @@ size_t HUF_decompress4X1_usingDTable(void* dst, size_t maxDstSize, const void* c size_t HUF_decompress4X2_usingDTable(void* dst, size_t maxDstSize, const void* cSrc, size_t cSrcSize, const HUF_DTable* DTable); #endif - /* ====================== */ /* single stream variants */ /* ====================== */ diff --git a/lib/zstd/common/portability_macros.h b/lib/zstd/common/portability_macros.h index 0e3b2c0a52..b1cb945f27 100644 --- a/lib/zstd/common/portability_macros.h +++ b/lib/zstd/common/portability_macros.h @@ -20,7 +20,6 @@ * */ - /* compat. with non-clang compilers */ #ifndef __has_attribute #define __has_attribute(x) 0 diff --git a/lib/zstd/common/zstd_common.c b/lib/zstd/common/zstd_common.c index 3d7e35b309..17df097dcd 100644 --- a/lib/zstd/common/zstd_common.c +++ b/lib/zstd/common/zstd_common.c @@ -8,8 +8,6 @@ * You may select, at your option, one of the above-listed licenses. */ - - /*-************************************* * Dependencies ***************************************/ @@ -18,7 +16,6 @@ #include "error_private.h" #include "zstd_internal.h" - /*-**************************************** * Version ******************************************/ @@ -26,7 +23,6 @@ unsigned ZSTD_versionNumber(void) { return ZSTD_VERSION_NUMBER; } const char* ZSTD_versionString(void) { return ZSTD_VERSION_STRING; } - /*-**************************************** * ZSTD Error Management ******************************************/ @@ -48,8 +44,6 @@ ZSTD_ErrorCode ZSTD_getErrorCode(size_t code) { return ERR_getErrorCode(code); } * provides error code string from enum */ const char* ZSTD_getErrorString(ZSTD_ErrorCode code) { return ERR_getErrorString(code); } - - /*=************************************************************** * Custom allocator ****************************************************************/ diff --git a/lib/zstd/common/zstd_internal.h b/lib/zstd/common/zstd_internal.h index 93305d9b41..c575c1fe8f 100644 --- a/lib/zstd/common/zstd_internal.h +++ b/lib/zstd/common/zstd_internal.h @@ -33,14 +33,12 @@ #include <linux/xxhash.h> /* XXH_reset, update, digest */ #define ZSTD_TRACE 0 - /* ---- static assert (debug) --- */ #define ZSTD_STATIC_ASSERT(c) DEBUG_STATIC_ASSERT(c) #define ZSTD_isError ERR_isError /* for inlining */ #define FSE_isError ERR_isError #define HUF_isError ERR_isError - /*-************************************* * shared macros ***************************************/ @@ -50,7 +48,6 @@ #define MAX(a,b) ((a)>(b) ? (a) : (b)) #define BOUNDED(min,val,max) (MAX(min,MIN(val,max))) - /*-************************************* * Common constants ***************************************/ @@ -155,7 +152,6 @@ static UNUSED_ATTR const S16 OF_defaultNorm[DefaultMaxOff+1] = { #define OF_DEFAULTNORMLOG 5 /* for static allocation */ static UNUSED_ATTR const U32 OF_defaultNormLog = OF_DEFAULTNORMLOG; - /*-******************************************* * Shared functions to include for inlining *********************************************/ @@ -269,7 +265,6 @@ typedef enum { ZSTD_bm_stable = 1 /* ZSTD_inBuffer/ZSTD_outBuffer is stable */ } ZSTD_bufferMode_e; - /*-******************************************* * Private declarations *********************************************/ @@ -349,7 +344,6 @@ void* ZSTD_customMalloc(size_t size, ZSTD_customMem customMem); void* ZSTD_customCalloc(size_t size, ZSTD_customMem customMem); void ZSTD_customFree(void* ptr, ZSTD_customMem customMem); - MEM_STATIC U32 ZSTD_highbit32(U32 val) /* compress, dictBuilder, decodeCorpus */ { assert(val != 0); @@ -404,14 +398,12 @@ MEM_STATIC unsigned ZSTD_countTrailingZeros(size_t val) } } - /* ZSTD_invalidateRepCodes() : * ensures next compression will not use repcodes from previous block. * Note : only works with regular variant; * do not use with extDict variant ! */ void ZSTD_invalidateRepCodes(ZSTD_CCtx* cctx); /* zstdmt, adaptive_compression (shouldn't get this definition from here) */ - typedef struct { blockType_e blockType; U32 lastBlock; @@ -439,5 +431,4 @@ MEM_STATIC int ZSTD_cpuSupportsBmi2(void) return ZSTD_cpuid_bmi1(cpuid) && ZSTD_cpuid_bmi2(cpuid); } - #endif /* ZSTD_CCOMMON_H_MODULE */ diff --git a/lib/zstd/decompress/huf_decompress.c b/lib/zstd/decompress/huf_decompress.c index 89b269a641..e2d473ad4e 100644 --- a/lib/zstd/decompress/huf_decompress.c +++ b/lib/zstd/decompress/huf_decompress.c @@ -69,14 +69,12 @@ ****************************************************************/ #define HUF_isError ERR_isError - /* ************************************************************** * Byte alignment for workSpace management ****************************************************************/ #define HUF_ALIGN(x, a) HUF_ALIGN_MASK((x), (a) - 1) #define HUF_ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask)) - /* ************************************************************** * BMI2 Variant Wrappers ****************************************************************/ @@ -121,7 +119,6 @@ #endif - /*-***************************/ /* generic DTableDesc */ /*-***************************/ @@ -268,7 +265,6 @@ static size_t HUF_initRemainingDStream(BIT_DStream_t* bit, HUF_DecompressAsmArgs } #endif - #ifndef HUF_FORCE_DECOMPRESS_X2 /*-***************************/ @@ -329,7 +325,6 @@ typedef struct { BYTE huffWeight[HUF_SYMBOLVALUE_MAX + 1]; } HUF_ReadDTableX1_Workspace; - size_t HUF_readDTableX1_wksp(HUF_DTable* DTable, const void* src, size_t srcSize, void* workSpace, size_t wkspSize) { return HUF_readDTableX1_wksp_bmi2(DTable, src, srcSize, workSpace, wkspSize, /* bmi2 */ 0); @@ -353,7 +348,6 @@ size_t HUF_readDTableX1_wksp_bmi2(HUF_DTable* DTable, const void* src, size_t sr iSize = HUF_readStats_wksp(wksp->huffWeight, HUF_SYMBOLVALUE_MAX + 1, wksp->rankVal, &nbSymbols, &tableLog, src, srcSize, wksp->statsWksp, sizeof(wksp->statsWksp), bmi2); if (HUF_isError(iSize)) return iSize; - /* Table header */ { DTableDesc dtd = HUF_getDTableDesc(DTable); U32 const maxTableLog = dtd.maxTableLog + 1; @@ -745,7 +739,6 @@ static size_t HUF_decompress4X1_usingDTable_internal(void* dst, size_t dstSize, #endif } - size_t HUF_decompress1X1_usingDTable( void* dst, size_t dstSize, const void* cSrc, size_t cSrcSize, @@ -770,7 +763,6 @@ size_t HUF_decompress1X1_DCtx_wksp(HUF_DTable* DCtx, void* dst, size_t dstSize, return HUF_decompress1X1_usingDTable_internal(dst, dstSize, ip, cSrcSize, DCtx, /* bmi2 */ 0); } - size_t HUF_decompress4X1_usingDTable( void* dst, size_t dstSize, const void* cSrc, size_t cSrcSize, @@ -802,10 +794,8 @@ size_t HUF_decompress4X1_DCtx_wksp(HUF_DTable* dctx, void* dst, size_t dstSize, return HUF_decompress4X1_DCtx_wksp_bmi2(dctx, dst, dstSize, cSrc, cSrcSize, workSpace, wkspSize, 0); } - #endif /* HUF_FORCE_DECOMPRESS_X2 */ - #ifndef HUF_FORCE_DECOMPRESS_X1 /* *************************/ @@ -1130,7 +1120,6 @@ size_t HUF_readDTableX2_wksp_bmi2(HUF_DTable* DTable, return iSize; } - FORCE_INLINE_TEMPLATE U32 HUF_decodeSymbolX2(void* op, BIT_DStream_t* DStream, const HUF_DEltX2* dt, const U32 dtLog) { @@ -1477,7 +1466,6 @@ size_t HUF_decompress1X2_DCtx_wksp(HUF_DTable* DCtx, void* dst, size_t dstSize, return HUF_decompress1X2_usingDTable_internal(dst, dstSize, ip, cSrcSize, DCtx, /* bmi2 */ 0); } - size_t HUF_decompress4X2_usingDTable( void* dst, size_t dstSize, const void* cSrc, size_t cSrcSize, @@ -1510,10 +1498,8 @@ size_t HUF_decompress4X2_DCtx_wksp(HUF_DTable* dctx, void* dst, size_t dstSize, return HUF_decompress4X2_DCtx_wksp_bmi2(dctx, dst, dstSize, cSrc, cSrcSize, workSpace, wkspSize, /* bmi2 */ 0); } - #endif /* HUF_FORCE_DECOMPRESS_X1 */ - /* ***********************************/ /* Universal decompression selectors */ /* ***********************************/ @@ -1556,7 +1542,6 @@ size_t HUF_decompress4X_usingDTable(void* dst, size_t maxDstSize, #endif } - #if !defined(HUF_FORCE_DECOMPRESS_X1) && !defined(HUF_FORCE_DECOMPRESS_X2) typedef struct { U32 tableTime; U32 decode256Time; } algo_time_t; static const algo_time_t algoTime[16 /* Quantization */][2 /* single, double */] = @@ -1610,7 +1595,6 @@ U32 HUF_selectDecoder (size_t dstSize, size_t cSrcSize) #endif } - size_t HUF_decompress4X_hufOnly_wksp(HUF_DTable* dctx, void* dst, size_t dstSize, const void* cSrc, size_t cSrcSize, void* workSpace, @@ -1667,7 +1651,6 @@ size_t HUF_decompress1X_DCtx_wksp(HUF_DTable* dctx, void* dst, size_t dstSize, } } - size_t HUF_decompress1X_usingDTable_bmi2(void* dst, size_t maxDstSize, const void* cSrc, size_t cSrcSize, const HUF_DTable* DTable, int bmi2) { DTableDesc const dtd = HUF_getDTableDesc(DTable); diff --git a/lib/zstd/decompress/zstd_ddict.c b/lib/zstd/decompress/zstd_ddict.c index dbbc7919de..db6aa72296 100644 --- a/lib/zstd/decompress/zstd_ddict.c +++ b/lib/zstd/decompress/zstd_ddict.c @@ -24,9 +24,6 @@ #include "zstd_decompress_internal.h" #include "zstd_ddict.h" - - - /*-******************************************************* * Types *********************************************************/ @@ -82,7 +79,6 @@ void ZSTD_copyDDictParameters(ZSTD_DCtx* dctx, const ZSTD_DDict* ddict) } } - static size_t ZSTD_loadEntropy_intoDDict(ZSTD_DDict* ddict, ZSTD_dictContentType_e dictContentType) @@ -113,7 +109,6 @@ ZSTD_loadEntropy_intoDDict(ZSTD_DDict* ddict, return 0; } - static size_t ZSTD_initDDict_internal(ZSTD_DDict* ddict, const void* dict, size_t dictSize, ZSTD_dictLoadMethod_e dictLoadMethod, @@ -180,7 +175,6 @@ ZSTD_DDict* ZSTD_createDDict_byReference(const void* dictBuffer, size_t dictSize return ZSTD_createDDict_advanced(dictBuffer, dictSize, ZSTD_dlm_byRef, ZSTD_dct_auto, allocator); } - const ZSTD_DDict* ZSTD_initStaticDDict( void* sBuffer, size_t sBufferSize, const void* dict, size_t dictSize, @@ -205,7 +199,6 @@ const ZSTD_DDict* ZSTD_initStaticDDict( return ddict; } - size_t ZSTD_freeDDict(ZSTD_DDict* ddict) { if (ddict==NULL) return 0; /* support free on NULL */ diff --git a/lib/zstd/decompress/zstd_ddict.h b/lib/zstd/decompress/zstd_ddict.h index 8c1a79d666..2ad60da2c4 100644 --- a/lib/zstd/decompress/zstd_ddict.h +++ b/lib/zstd/decompress/zstd_ddict.h @@ -8,7 +8,6 @@ * You may select, at your option, one of the above-listed licenses. */ - #ifndef ZSTD_DDICT_H #define ZSTD_DDICT_H @@ -18,7 +17,6 @@ #include "../common/zstd_deps.h" /* size_t */ #include <linux/zstd.h> /* ZSTD_DDict, and several public functions */ - /*-******************************************************* * Interface *********************************************************/ @@ -39,6 +37,4 @@ size_t ZSTD_DDict_dictSize(const ZSTD_DDict* ddict); void ZSTD_copyDDictParameters(ZSTD_DCtx* dctx, const ZSTD_DDict* ddict); - - #endif /* ZSTD_DDICT_H */ diff --git a/lib/zstd/decompress/zstd_decompress.c b/lib/zstd/decompress/zstd_decompress.c index b9b935a9f5..6537824629 100644 --- a/lib/zstd/decompress/zstd_decompress.c +++ b/lib/zstd/decompress/zstd_decompress.c @@ -8,7 +8,6 @@ * You may select, at your option, one of the above-listed licenses. */ - /* *************************************************************** * Tuning parameters *****************************************************************/ @@ -48,7 +47,6 @@ # define ZSTD_NO_FORWARD_PROGRESS_MAX 16 #endif - /*-******************************************************* * Dependencies *********************************************************/ @@ -64,9 +62,6 @@ #include "zstd_ddict.h" /* ZSTD_DDictDictContent */ #include "zstd_decompress_block.h" /* ZSTD_decompressBlock_internal */ - - - /* *********************************** * Multiple DDicts Hashset internals * *************************************/ @@ -220,7 +215,6 @@ size_t ZSTD_sizeof_DCtx (const ZSTD_DCtx* dctx) size_t ZSTD_estimateDCtxSize(void) { return sizeof(ZSTD_DCtx); } - static size_t ZSTD_startingInputLength(ZSTD_format_e format) { size_t const startingInputLength = ZSTD_FRAMEHEADERSIZE_PREFIX(format); @@ -353,7 +347,6 @@ static void ZSTD_DCtx_selectFrameDDict(ZSTD_DCtx* dctx) { } } - /*-************************************************************* * Frame header decoding ***************************************************************/ @@ -415,7 +408,6 @@ size_t ZSTD_frameHeaderSize(const void* src, size_t srcSize) return ZSTD_frameHeaderSize_internal(src, srcSize, ZSTD_f_zstd1); } - /* ZSTD_getFrameHeader_advanced() : * decode Frame Header, or require larger `srcSize`. * note : only works for formats ZSTD_f_zstd1 and ZSTD_f_zstd1_magicless @@ -639,7 +631,6 @@ unsigned long long ZSTD_getDecompressedSize(const void* src, size_t srcSize) return (ret >= ZSTD_CONTENTSIZE_ERROR) ? 0 : ret; } - /* ZSTD_decodeFrameHeader() : * `headerSize` must be the size provided by ZSTD_frameHeaderSize(). * If multiple DDict references are enabled, also will choose the correct DDict to use. @@ -681,7 +672,6 @@ static ZSTD_frameSizeInfo ZSTD_findFrameSizeInfo(const void* src, size_t srcSize ZSTD_frameSizeInfo frameSizeInfo; ZSTD_memset(&frameSizeInfo, 0, sizeof(ZSTD_frameSizeInfo)); - if ((srcSize >= ZSTD_SKIPPABLEHEADERSIZE) && (MEM_readLE32(src) & ZSTD_MAGIC_SKIPPABLE_MASK) == ZSTD_MAGIC_SKIPPABLE_START) { frameSizeInfo.compressedSize = readSkippableFrameSize(src, srcSize); @@ -773,7 +763,6 @@ unsigned long long ZSTD_decompressBound(const void* src, size_t srcSize) return bound; } - /*-************************************************************* * Frame decoding ***************************************************************/ @@ -788,7 +777,6 @@ size_t ZSTD_insertBlock(ZSTD_DCtx* dctx, const void* blockStart, size_t blockSiz return blockSize; } - static size_t ZSTD_copyRawBlock(void* dst, size_t dstCapacity, const void* src, size_t srcSize) { @@ -823,7 +811,6 @@ static void ZSTD_DCtx_trace_end(ZSTD_DCtx const* dctx, U64 uncompressedSize, U64 (void)streaming; } - /*! ZSTD_decompressFrame() : * @dctx must be properly initialized * will update *srcPtr and *srcSizePtr, @@ -935,7 +922,6 @@ static size_t ZSTD_decompressMultiFrame(ZSTD_DCtx* dctx, while (srcSize >= ZSTD_startingInputLength(dctx->format)) { - { U32 const magicNumber = MEM_readLE32(src); DEBUGLOG(4, "reading magic number %08X (expecting %08X)", (unsigned)magicNumber, ZSTD_MAGICNUMBER); @@ -994,7 +980,6 @@ size_t ZSTD_decompress_usingDict(ZSTD_DCtx* dctx, return ZSTD_decompressMultiFrame(dctx, dst, dstCapacity, src, srcSize, dict, dictSize, NULL); } - static ZSTD_DDict const* ZSTD_getDDict(ZSTD_DCtx* dctx) { switch (dctx->dictUses) { @@ -1017,7 +1002,6 @@ size_t ZSTD_decompressDCtx(ZSTD_DCtx* dctx, void* dst, size_t dstCapacity, const return ZSTD_decompress_usingDDict(dctx, dst, dstCapacity, src, srcSize, ZSTD_getDDict(dctx)); } - size_t ZSTD_decompress(void* dst, size_t dstCapacity, const void* src, size_t srcSize) { #if defined(ZSTD_HEAPMODE) && (ZSTD_HEAPMODE>=1) @@ -1034,7 +1018,6 @@ size_t ZSTD_decompress(void* dst, size_t dstCapacity, const void* src, size_t sr #endif } - /*-************************************** * Advanced Streaming Decompression API * Bufferless and synchronous @@ -1247,7 +1230,6 @@ size_t ZSTD_decompressContinue(ZSTD_DCtx* dctx, void* dst, size_t dstCapacity, c } } - static size_t ZSTD_refDictContent(ZSTD_DCtx* dctx, const void* dict, size_t dictSize) { dctx->dictEnd = dctx->previousDstEnd; @@ -1407,7 +1389,6 @@ size_t ZSTD_decompressBegin_usingDict(ZSTD_DCtx* dctx, const void* dict, size_t return 0; } - /* ====== ZSTD_DDict ====== */ size_t ZSTD_decompressBegin_usingDDict(ZSTD_DCtx* dctx, const ZSTD_DDict* ddict) @@ -1461,7 +1442,6 @@ unsigned ZSTD_getDictID_fromFrame(const void* src, size_t srcSize) return zfp.dictID; } - /*! ZSTD_decompress_usingDDict() : * Decompression using a pre-digested Dictionary * Use dictionary without significant overhead. */ @@ -1476,7 +1456,6 @@ size_t ZSTD_decompress_usingDDict(ZSTD_DCtx* dctx, ddict); } - /*===================================== * Streaming decompression *====================================*/ @@ -1502,7 +1481,6 @@ size_t ZSTD_freeDStream(ZSTD_DStream* zds) return ZSTD_freeDCtx(zds); } - /* *** Initialization *** */ size_t ZSTD_DStreamInSize(void) { return ZSTD_BLOCKSIZE_MAX + ZSTD_blockHeaderSize; } @@ -1546,7 +1524,6 @@ size_t ZSTD_DCtx_refPrefix(ZSTD_DCtx* dctx, const void* prefix, size_t prefixSiz return ZSTD_DCtx_refPrefix_advanced(dctx, prefix, prefixSize, ZSTD_dct_rawContent); } - /* ZSTD_initDStream_usingDict() : * return : expected size, aka ZSTD_startingInputLength(). * this function cannot fail */ @@ -1584,7 +1561,6 @@ size_t ZSTD_resetDStream(ZSTD_DStream* dctx) return ZSTD_startingInputLength(dctx->format); } - size_t ZSTD_DCtx_refDDict(ZSTD_DCtx* dctx, const ZSTD_DDict* ddict) { RETURN_ERROR_IF(dctx->streamStage != zdss_init, stage_wrong, ""); @@ -1745,7 +1721,6 @@ size_t ZSTD_DCtx_reset(ZSTD_DCtx* dctx, ZSTD_ResetDirective reset) return 0; } - size_t ZSTD_sizeof_DStream(const ZSTD_DStream* dctx) { return ZSTD_sizeof_DCtx(dctx); @@ -1783,7 +1758,6 @@ size_t ZSTD_estimateDStreamSize_fromFrame(const void* src, size_t srcSize) return ZSTD_estimateDStreamSize((size_t)zfh.windowSize); } - /* ***** Decompression ***** */ static int ZSTD_DCtx_isOverflow(ZSTD_DStream* zds, size_t const neededInBuffSize, size_t const neededOutBuffSize) diff --git a/lib/zstd/decompress/zstd_decompress_block.c b/lib/zstd/decompress/zstd_decompress_block.c index c1913b8e7c..6e46a1bc52 100644 --- a/lib/zstd/decompress/zstd_decompress_block.c +++ b/lib/zstd/decompress/zstd_decompress_block.c @@ -40,13 +40,11 @@ #error "Cannot force the use of the short and the long ZSTD_decompressSequences variants!" #endif - /*_******************************************************* * Memory operations **********************************************************/ static void ZSTD_copy4(void* dst, const void* src) { ZSTD_memcpy(dst, src, 4); } - /*-************************************************************* * Block decoding ***************************************************************/ @@ -379,7 +377,6 @@ static const ZSTD_seqSymbol OF_defaultDTable[(1<<OF_DEFAULTNORMLOG)+1] = { { 0, 25, 5,33554429}, { 0, 24, 5,16777213}, }; /* OF_defaultDTable */ - /* Default FSE distribution table for Match Lengths */ static const ZSTD_seqSymbol ML_defaultDTable[(1<<ML_DEFAULTNORMLOG)+1] = { { 1, 1, 1, ML_DEFAULTNORMLOG}, /* header : fastMode, tableLog */ @@ -418,7 +415,6 @@ static const ZSTD_seqSymbol ML_defaultDTable[(1<<ML_DEFAULTNORMLOG)+1] = { { 0, 11, 6, 2051}, { 0, 10, 6, 1027}, }; /* ML_defaultDTable */ - static void ZSTD_buildSeqTable_rle(ZSTD_seqSymbol* dt, U32 baseValue, U8 nbAddBits) { void* ptr = dt; @@ -435,7 +431,6 @@ static void ZSTD_buildSeqTable_rle(ZSTD_seqSymbol* dt, U32 baseValue, U8 nbAddBi cell->baseValue = baseValue; } - /* ZSTD_buildFSETable() : * generate FSE decoding table for one symbol (ll, ml or off) * cannot fail if input is valid => @@ -454,7 +449,6 @@ void ZSTD_buildFSETable_body(ZSTD_seqSymbol* dt, BYTE* spread = (BYTE*)(symbolNext + MaxSeq + 1); U32 highThreshold = tableSize - 1; - /* Sanity Checks */ assert(maxSymbolValue <= MaxSeq); assert(tableLog <= MaxFSELog); @@ -598,7 +592,6 @@ void ZSTD_buildFSETable(ZSTD_seqSymbol* dt, baseValue, nbAdditionalBits, tableLog, wksp, wkspSize); } - /*! ZSTD_buildSeqTable() : * @return : nb bytes read from src, * or an error code if it fails */ @@ -729,7 +722,6 @@ size_t ZSTD_decodeSeqHeaders(ZSTD_DCtx* dctx, int* nbSeqPtr, return ip-istart; } - typedef struct { size_t litLength; size_t matchLength; @@ -915,7 +907,6 @@ size_t ZSTD_execSequenceEndSplitLitBuffer(BYTE* op, const BYTE* const iLitEnd = *litPtr + sequence.litLength; const BYTE* match = oLitEnd - sequence.offset; - /* bounds checks : careful of address space overflow in 32-bit mode */ RETURN_ERROR_IF(sequenceLength > (size_t)(oend - op), dstSize_tooSmall, "last match must fit within dstBuffer"); RETURN_ERROR_IF(sequence.litLength > (size_t)(litLimit - *litPtr), corruption_detected, "try to read beyond literal buffer"); @@ -1133,7 +1124,6 @@ size_t ZSTD_execSequenceSplitLitBuffer(BYTE* op, return sequenceLength; } - static void ZSTD_initFseState(ZSTD_fseState* DStatePtr, BIT_DStream_t* bitD, const ZSTD_seqSymbol* dt) { @@ -1316,7 +1306,6 @@ MEM_STATIC void ZSTD_assertValidSequence( #ifndef ZSTD_FORCE_DECOMPRESS_SEQUENCES_LONG - FORCE_INLINE_TEMPLATE size_t DONT_VECTORIZE ZSTD_decompressSequences_bodySplitLitBuffer( ZSTD_DCtx* dctx, @@ -1841,8 +1830,6 @@ ZSTD_decompressSequencesLong_default(ZSTD_DCtx* dctx, } #endif /* ZSTD_FORCE_DECOMPRESS_SEQUENCES_SHORT */ - - #if DYNAMIC_BMI2 #ifndef ZSTD_FORCE_DECOMPRESS_SEQUENCES_LONG @@ -1920,7 +1907,6 @@ ZSTD_decompressSequencesSplitLitBuffer(ZSTD_DCtx* dctx, void* dst, size_t maxDst } #endif /* ZSTD_FORCE_DECOMPRESS_SEQUENCES_LONG */ - #ifndef ZSTD_FORCE_DECOMPRESS_SEQUENCES_SHORT /* ZSTD_decompressSequencesLong() : * decompression function triggered when a minimum share of offsets is considered "long", @@ -1944,8 +1930,6 @@ ZSTD_decompressSequencesLong(ZSTD_DCtx* dctx, } #endif /* ZSTD_FORCE_DECOMPRESS_SEQUENCES_SHORT */ - - #if !defined(ZSTD_FORCE_DECOMPRESS_SEQUENCES_SHORT) && \ !defined(ZSTD_FORCE_DECOMPRESS_SEQUENCES_LONG) /* ZSTD_getLongOffsetsShare() : @@ -2048,7 +2032,6 @@ ZSTD_decompressBlock_internal(ZSTD_DCtx* dctx, } } - void ZSTD_checkContinuity(ZSTD_DCtx* dctx, const void* dst, size_t dstSize) { if (dst != dctx->previousDstEnd && dstSize > 0) { /* not contiguous */ @@ -2059,7 +2042,6 @@ void ZSTD_checkContinuity(ZSTD_DCtx* dctx, const void* dst, size_t dstSize) } } - size_t ZSTD_decompressBlock(ZSTD_DCtx* dctx, void* dst, size_t dstCapacity, const void* src, size_t srcSize) diff --git a/lib/zstd/decompress/zstd_decompress_block.h b/lib/zstd/decompress/zstd_decompress_block.h index 3d2d57a5d2..b8e912c6fd 100644 --- a/lib/zstd/decompress/zstd_decompress_block.h +++ b/lib/zstd/decompress/zstd_decompress_block.h @@ -8,7 +8,6 @@ * You may select, at your option, one of the above-listed licenses. */ - #ifndef ZSTD_DEC_BLOCK_H #define ZSTD_DEC_BLOCK_H @@ -20,7 +19,6 @@ #include "../common/zstd_internal.h" /* blockProperties_t, and some public functions */ #include "zstd_decompress_internal.h" /* ZSTD_seqSymbol */ - /* === Prototypes === */ /* note: prototypes already published within `zstd.h` : @@ -32,7 +30,6 @@ * ZSTD_decodeSeqHeaders() */ - /* Streaming state is used to inform allocation of the literal buffer */ typedef enum { not_streaming = 0, @@ -64,5 +61,4 @@ void ZSTD_buildFSETable(ZSTD_seqSymbol* dt, unsigned tableLog, void* wksp, size_t wkspSize, int bmi2); - #endif /* ZSTD_DEC_BLOCK_H */ diff --git a/lib/zstd/decompress/zstd_decompress_internal.h b/lib/zstd/decompress/zstd_decompress_internal.h index 98102edb6a..e165cbe9f5 100644 --- a/lib/zstd/decompress/zstd_decompress_internal.h +++ b/lib/zstd/decompress/zstd_decompress_internal.h @@ -8,22 +8,18 @@ * You may select, at your option, one of the above-listed licenses. */ - /* zstd_decompress_internal: * objects and definitions shared within lib/decompress modules */ #ifndef ZSTD_DECOMPRESS_INTERNAL_H #define ZSTD_DECOMPRESS_INTERNAL_H - /*-******************************************************* * Dependencies *********************************************************/ #include "../common/mem.h" /* BYTE, U16, U32 */ #include "../common/zstd_internal.h" /* constants : MaxLL, MaxML, MaxOff, LLFSELog, etc. */ - - /*-******************************************************* * Constants *********************************************************/ @@ -55,7 +51,6 @@ static UNUSED_ATTR const U32 ML_base[MaxML+1] = { 67, 83, 99, 0x83, 0x103, 0x203, 0x403, 0x803, 0x1003, 0x2003, 0x4003, 0x8003, 0x10003 }; - /*-******************************************************* * Decompression types *********************************************************/ @@ -224,5 +219,4 @@ size_t ZSTD_loadDEntropy(ZSTD_entropyDTables_t* entropy, * This function cannot fail. */ void ZSTD_checkContinuity(ZSTD_DCtx* dctx, const void* dst, size_t dstSize); - #endif /* ZSTD_DECOMPRESS_INTERNAL_H */ diff --git a/net/bootp.h b/net/bootp.h index 4e32b19d42..521d38f352 100644 --- a/net/bootp.h +++ b/net/bootp.h @@ -65,7 +65,6 @@ struct bootp_hdr { extern u32 bootp_id; /* ID of cur BOOTP request */ extern int bootp_try; - /* Send a BOOTP request */ void bootp_reset(void); void bootp_request(void); @@ -121,7 +121,6 @@ static void dns_handler(uchar *pkt, unsigned dest, struct in_addr sip, char ip_str[22]; struct in_addr ip_addr; - debug("%s\n", __func__); if (dest != dns_our_port) return; @@ -80,7 +80,6 @@ * Next step: none */ - #include <bootstage.h> #include <command.h> #include <console.h> @@ -913,7 +913,6 @@ static void nfs_handler(uchar *pkt, unsigned dest, struct in_addr sip, } } - void nfs_start(void) { debug("%s\n", __func__); @@ -81,7 +81,6 @@ struct rpc_t { }; void nfs_start(void); /* Begin NFS */ - /**********************************************************************/ #endif /* __NFS_H__ */ diff --git a/net/rarp.c b/net/rarp.c index a6b564e314..a346e067cb 100644 --- a/net/rarp.c +++ b/net/rarp.c @@ -45,7 +45,6 @@ void rarp_receive(struct ip_udp_hdr *ip, unsigned len) } } - /* * Timeout on BOOTP request. */ @@ -60,7 +59,6 @@ static void rarp_timeout_handler(void) } } - void rarp_request(void) { uchar *pkt; diff --git a/net/tftp.c b/net/tftp.c index 6b16bdcbe4..65c39d7fb7 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -694,7 +694,6 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, } } - static void tftp_timeout_handler(void) { if (++timeout_count > timeout_count_max) { diff --git a/post/drivers/flash.c b/post/drivers/flash.c index 21e2f940fe..7638a99f2e 100644 --- a/post/drivers/flash.c +++ b/post/drivers/flash.c @@ -12,7 +12,6 @@ #include <post.h> #include <flash.h> - /* * This code will walk over the declared sectors erasing them, * then programming them, then verifying the written contents. diff --git a/post/drivers/memory.c b/post/drivers/memory.c index 8d4ae6fc6f..2e41c4619e 100644 --- a/post/drivers/memory.c +++ b/post/drivers/memory.c @@ -157,7 +157,6 @@ DECLARE_GLOBAL_DATA_PTR; #warning "Injecting address line errors for testing purposes" #endif - /* * This function performs a double word move from the data at * the source pointer to the location at the destination pointer. @@ -199,7 +198,6 @@ const static unsigned long long pattern[] = { }; const unsigned long long otherpattern = 0x0123456789abcdefULL; - static int memory_post_dataline(unsigned long long * pmem) { unsigned long long temp64 = 0; diff --git a/post/lib_powerpc/cpu_asm.h b/post/lib_powerpc/cpu_asm.h index 75cf71b637..d1e3f68faa 100644 --- a/post/lib_powerpc/cpu_asm.h +++ b/post/lib_powerpc/cpu_asm.h @@ -203,5 +203,4 @@ #define ASM_STSWI(rd, rs, simm) ASM_11IF(OP_STSWI, rd, rs, simm) #define ASM_STSWX(rd, rs1, rs2) ASM_12(OP_STSWX, rd, rs1, rs2) - #endif /* _CPU_ASM_H */ diff --git a/post/tests.c b/post/tests.c index 208710a48b..cdd088a32f 100644 --- a/post/tests.c +++ b/post/tests.c @@ -43,7 +43,6 @@ extern int sysmon_init_f (void); extern void sysmon_reloc (void); - struct post_test post_list[] = { #if CFG_POST & CFG_SYS_POST_OCM diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index d6fbf9a765..df754d1d9f 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -360,21 +360,27 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ ; \ sed "s:$(pre-tmp):$(<):" $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile) +capsule_esl_input_file=$(srctree)/lib/efi_loader/capsule_esl.dtsi.in +capsule_crt_file=$(subst $(quote),,$(CONFIG_EFI_CAPSULE_CRT_FILE)) +capsule_esl_dtsi=.capsule_esl.dtsi + quiet_cmd_capsule_esl_gen = CAPSULE_ESL_GEN $@ -cmd_capsule_esl_gen = \ - $(shell sed "s:ESL_BIN_FILE:$(capsule_esl_path):" $(capsule_esl_input_file) > $@) +cmd_capsule_esl_gen = cert-to-efi-sig-list $< $@ -$(obj)/.capsule_esl.dtsi: FORCE -ifeq ($(CONFIG_EFI_CAPSULE_ESL_FILE),"") - $(error "CONFIG_EFI_CAPSULE_ESL_FILE is empty, EFI capsule authentication \ +$(obj)/capsule_esl_file: $(capsule_crt_file) FORCE +ifeq ($(CONFIG_EFI_CAPSULE_CRT_FILE),"") + $(error "CONFIG_EFI_CAPSULE_CRT_FILE is empty, EFI capsule authentication \ public key must be specified when CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled") else - $(call cmd_capsule_esl_gen) + $(call cmd,capsule_esl_gen) endif -capsule_esl_input_file=$(srctree)/lib/efi_loader/capsule_esl.dtsi.in -capsule_esl_dtsi = .capsule_esl.dtsi -capsule_esl_path=$(abspath $(srctree)/$(subst $(quote),,$(CONFIG_EFI_CAPSULE_ESL_FILE))) +quiet_cmd_capsule_dtsi_gen = CAPSULE_DTSI_GEN $@ +cmd_capsule_dtsi_gen = \ + $(shell sed "s:ESL_BIN_FILE:$(abspath $<):" $(capsule_esl_input_file) > $@) + +$(obj)/$(capsule_esl_dtsi): $(obj)/capsule_esl_file FORCE + $(call cmd,capsule_dtsi_gen) dtsi_include_list_deps := $(addprefix $(u_boot_dtsi_loc),$(subst $(quote),,$(dtsi_include_list))) diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c index c35aa6f886..2feec44a0f 100644 --- a/scripts/dtc/checks.c +++ b/scripts/dtc/checks.c @@ -111,7 +111,6 @@ static inline void PRINTF(5, 6) check_msg(struct check *c, struct dt_info *dti, check_msg((c), dti, node, prop, __VA_ARGS__); \ } while (0) - static void check_nodes_props(struct check *c, struct dt_info *dti, struct node *node) { struct node *child; @@ -1076,7 +1075,6 @@ static void check_obsolete_chosen_interrupt_controller(struct check *c, if (node != dt) return; - chosen = get_node_by_path(dt, "/chosen"); if (!chosen) return; diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h index 6d667701ab..39c50a2c4f 100644 --- a/scripts/dtc/dtc.h +++ b/scripts/dtc/dtc.h @@ -65,7 +65,6 @@ extern int auto_label_aliases; /* auto generate labels -> aliases */ typedef uint32_t cell_t; - #define streq(a, b) (strcmp((a), (b)) == 0) #define strstarts(s, prefix) (strncmp((s), (prefix), strlen(prefix)) == 0) #define strprefixeq(a, n, b) (strlen(b) == (n) && (memcmp(a, b, n) == 0)) @@ -92,7 +91,6 @@ struct data { struct marker *markers; }; - #define empty_data ((struct data){ 0 /* all .members = 0 or NULL */ }) #define for_each_marker(m) \ @@ -252,7 +250,6 @@ struct reserve_info *chain_reserve_entry(struct reserve_info *first, struct reserve_info *add_reserve_entry(struct reserve_info *list, struct reserve_info *new); - struct dt_info { unsigned int dtsflags; struct reserve_info *reservelist; diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c index 8d268fb785..086c5abf10 100644 --- a/scripts/dtc/flattree.c +++ b/scripts/dtc/flattree.c @@ -695,7 +695,6 @@ static struct property *flat_read_property(struct inbuf *dtbuf, return build_property(name, val); } - static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb) { struct reserve_info *reservelist = NULL; @@ -724,7 +723,6 @@ static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb) return reservelist; } - static char *nodename_from_path(const char *ppath, const char *cpath) { int plen; @@ -806,7 +804,6 @@ static struct node *unflatten_tree(struct inbuf *dtbuf, return node; } - struct dt_info *dt_from_blob(const char *fname) { FILE *f; diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c index 63eaf57f43..d65656aaa8 100644 --- a/scripts/dtc/libfdt/fdt_ro.c +++ b/scripts/dtc/libfdt/fdt_ro.c @@ -421,7 +421,6 @@ static const struct fdt_property *fdt_get_property_namelen_(const void *fdt, return NULL; } - const struct fdt_property *fdt_get_property_namelen(const void *fdt, int offset, const char *name, @@ -439,7 +438,6 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, NULL); } - const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset, const char *name, int *lenp) diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h index d706f85962..16ec53e78b 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -1162,7 +1162,6 @@ int fdt_address_cells(const void *fdt, int nodeoffset); */ int fdt_size_cells(const void *fdt, int nodeoffset); - /**********************************************************************/ /* Write-in-place functions */ /**********************************************************************/ @@ -1696,7 +1695,6 @@ static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, #define fdt_setprop_string(fdt, nodeoffset, name, str) \ fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) - /** * fdt_setprop_empty - set a property to an empty value * @fdt: pointer to the device tree blob diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c index 6e4c367f54..ba06ef348b 100644 --- a/scripts/dtc/livetree.c +++ b/scripts/dtc/livetree.c @@ -631,7 +631,6 @@ uint32_t guess_boot_cpuid(struct node *tree) if (!cpus) return 0; - bootcpu = cpus->children; if (!bootcpu) return 0; diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c index c297861145..0ad89e2af6 100644 --- a/scripts/dtc/srcpos.c +++ b/scripts/dtc/srcpos.c @@ -33,7 +33,6 @@ struct search_path { /* This is the list of directories that we search for source files */ static struct search_path *search_path_head, **search_path_tail; - static char *get_dirname(const char *path) { const char *slash = strrchr(path, '/'); @@ -56,7 +55,6 @@ struct srcfile_state *current_srcfile; /* = NULL */ #define MAX_SRCFILE_DEPTH (100) static int srcfile_depth; /* = 0 */ - /** * Try to open a file in a given directory. * @@ -250,7 +248,6 @@ srcpos_string(struct srcpos *pos) if (pos->file && pos->file->name) fname = pos->file->name; - if (pos->first_line != pos->last_line) xasprintf(&pos_str, "%s:%d.%d-%d.%d", fname, pos->first_line, pos->first_column, diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h index 5db32a723e..fcd9937a91 100644 --- a/scripts/dtc/srcpos.h +++ b/scripts/dtc/srcpos.h @@ -95,7 +95,6 @@ struct srcpos { } \ } while (0) - /* * Fictional source position used for IR nodes that are * created without otherwise knowing a true source position. diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c index b36cb41902..8c8b914698 100644 --- a/scripts/dtc/treesource.c +++ b/scripts/dtc/treesource.c @@ -262,7 +262,6 @@ static void write_tree_source_node(FILE *f, struct node *tree, int level) fprintf(f, "};\n"); } - void dt_to_source(FILE *f, struct dt_info *dti) { struct reserve_info *re; diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c index 9953c32a02..23334d39bb 100644 --- a/scripts/dtc/util.c +++ b/scripts/dtc/util.c @@ -325,7 +325,6 @@ int utilfdt_write_err(const char *filename, const void *blob) return ret < 0 ? -ret : 0; } - int utilfdt_write(const char *filename, const void *blob) { int ret = utilfdt_write_err(filename, blob); diff --git a/scripts/kconfig/gconf.c b/scripts/kconfig/gconf.c index 2ec7419301..aee993a778 100644 --- a/scripts/kconfig/gconf.c +++ b/scripts/kconfig/gconf.c @@ -360,10 +360,8 @@ void init_right_tree(void) gtk_tree_selection_set_mode(sel, GTK_SELECTION_SINGLE); } - /* Utility Functions */ - static void text_insert_help(struct menu *menu) { GtkTextBuffer *buffer; @@ -388,7 +386,6 @@ static void text_insert_help(struct menu *menu) str_free(&help); } - static void text_insert_msg(const char *title, const char *message) { GtkTextBuffer *buffer; @@ -409,7 +406,6 @@ static void text_insert_msg(const char *title, const char *message) NULL); } - /* Main Windows Callbacks */ void on_save_activate(GtkMenuItem * menuitem, gpointer user_data); @@ -457,13 +453,11 @@ gboolean on_window1_delete_event(GtkWidget * widget, GdkEvent * event, return FALSE; } - void on_window1_destroy(GtkObject * object, gpointer user_data) { gtk_main_quit(); } - void on_window1_size_request(GtkWidget * widget, GtkRequisition * requisition, gpointer user_data) @@ -483,10 +477,8 @@ on_window1_size_request(GtkWidget * widget, gtk_paned_set_position(GTK_PANED(vpaned), 2 * h / 3); } - /* Menu & Toolbar Callbacks */ - static void load_filename(GtkFileSelection * file_selector, gpointer user_data) { @@ -520,14 +512,12 @@ void on_load1_activate(GtkMenuItem * menuitem, gpointer user_data) gtk_widget_show(fs); } - void on_save_activate(GtkMenuItem * menuitem, gpointer user_data) { if (conf_write(NULL)) text_insert_msg("Error", "Unable to save configuration !"); } - static void store_filename(GtkFileSelection * file_selector, gpointer user_data) { @@ -561,14 +551,12 @@ void on_save_as1_activate(GtkMenuItem * menuitem, gpointer user_data) gtk_widget_show(fs); } - void on_quit1_activate(GtkMenuItem * menuitem, gpointer user_data) { if (!on_window1_delete_event(NULL, NULL, NULL)) gtk_widget_destroy(GTK_WIDGET(main_wnd)); } - void on_show_name1_activate(GtkMenuItem * menuitem, gpointer user_data) { GtkTreeViewColumn *col; @@ -579,7 +567,6 @@ void on_show_name1_activate(GtkMenuItem * menuitem, gpointer user_data) gtk_tree_view_column_set_visible(col, show_name); } - void on_show_range1_activate(GtkMenuItem * menuitem, gpointer user_data) { GtkTreeViewColumn *col; @@ -597,7 +584,6 @@ void on_show_range1_activate(GtkMenuItem * menuitem, gpointer user_data) } - void on_show_data1_activate(GtkMenuItem * menuitem, gpointer user_data) { GtkTreeViewColumn *col; @@ -608,7 +594,6 @@ void on_show_data1_activate(GtkMenuItem * menuitem, gpointer user_data) gtk_tree_view_column_set_visible(col, show_value); } - void on_set_option_mode1_activate(GtkMenuItem *menuitem, gpointer user_data) { @@ -617,7 +602,6 @@ on_set_option_mode1_activate(GtkMenuItem *menuitem, gpointer user_data) display_tree(&rootmenu); /* instead of update_tree to speed-up */ } - void on_set_option_mode2_activate(GtkMenuItem *menuitem, gpointer user_data) { @@ -626,7 +610,6 @@ on_set_option_mode2_activate(GtkMenuItem *menuitem, gpointer user_data) display_tree(&rootmenu); /* instead of update_tree to speed-up */ } - void on_set_option_mode3_activate(GtkMenuItem *menuitem, gpointer user_data) { @@ -635,7 +618,6 @@ on_set_option_mode3_activate(GtkMenuItem *menuitem, gpointer user_data) display_tree(&rootmenu); /* instead of update_tree to speed-up */ } - void on_introduction1_activate(GtkMenuItem * menuitem, gpointer user_data) { GtkWidget *dialog; @@ -666,7 +648,6 @@ void on_introduction1_activate(GtkMenuItem * menuitem, gpointer user_data) gtk_widget_show_all(dialog); } - void on_about1_activate(GtkMenuItem * menuitem, gpointer user_data) { GtkWidget *dialog; @@ -684,7 +665,6 @@ void on_about1_activate(GtkMenuItem * menuitem, gpointer user_data) gtk_widget_show_all(dialog); } - void on_license1_activate(GtkMenuItem * menuitem, gpointer user_data) { GtkWidget *dialog; @@ -703,7 +683,6 @@ void on_license1_activate(GtkMenuItem * menuitem, gpointer user_data) gtk_widget_show_all(dialog); } - void on_back_clicked(GtkButton * button, gpointer user_data) { enum prop_type ptype; @@ -718,13 +697,11 @@ void on_back_clicked(GtkButton * button, gpointer user_data) gtk_widget_set_sensitive(back_btn, FALSE); } - void on_load_clicked(GtkButton * button, gpointer user_data) { on_load1_activate(NULL, user_data); } - void on_single_clicked(GtkButton * button, gpointer user_data) { view_mode = SINGLE_VIEW; @@ -733,7 +710,6 @@ void on_single_clicked(GtkButton * button, gpointer user_data) display_tree_part(); } - void on_split_clicked(GtkButton * button, gpointer user_data) { gint w, h; @@ -749,7 +725,6 @@ void on_split_clicked(GtkButton * button, gpointer user_data) gtk_widget_set_sensitive(back_btn, FALSE); } - void on_full_clicked(GtkButton * button, gpointer user_data) { view_mode = FULL_VIEW; @@ -760,19 +735,16 @@ void on_full_clicked(GtkButton * button, gpointer user_data) gtk_widget_set_sensitive(back_btn, FALSE); } - void on_collapse_clicked(GtkButton * button, gpointer user_data) { gtk_tree_view_collapse_all(GTK_TREE_VIEW(tree2_w)); } - void on_expand_clicked(GtkButton * button, gpointer user_data) { gtk_tree_view_expand_all(GTK_TREE_VIEW(tree2_w)); } - /* CTree Callbacks */ /* Change hex/int/string value in the cell */ @@ -874,7 +846,6 @@ static gint column2index(GtkTreeViewColumn * column) return -1; } - /* User click: update choice (full) or goes down (single) */ gboolean on_treeview2_button_press_event(GtkWidget * widget, @@ -976,7 +947,6 @@ on_treeview2_key_press_event(GtkWidget * widget, return FALSE; } - /* Row selection changed: update help */ void on_treeview2_cursor_changed(GtkTreeView * treeview, gpointer user_data) @@ -992,7 +962,6 @@ on_treeview2_cursor_changed(GtkTreeView * treeview, gpointer user_data) } } - /* User click: display sub-tree in the right frame. */ gboolean on_treeview1_button_press_event(GtkWidget * widget, @@ -1032,7 +1001,6 @@ on_treeview1_button_press_event(GtkWidget * widget, return FALSE; } - /* Fill a row of strings */ static gchar **fill_row(struct menu *menu) { @@ -1157,7 +1125,6 @@ static gchar **fill_row(struct menu *menu) return row; } - /* Set the node content with a row of strings */ static void set_node(GtkTreeIter * node, struct menu *menu, gchar ** row) { @@ -1193,7 +1160,6 @@ static void set_node(GtkTreeIter * node, struct menu *menu, gchar ** row) g_object_unref(pix); } - /* Add a node to the tree */ static void place_node(struct menu *menu, char **row) { @@ -1204,7 +1170,6 @@ static void place_node(struct menu *menu, char **row) set_node(node, menu, row); } - /* Find a node in the GTK+ tree */ static GtkTreeIter found; @@ -1240,7 +1205,6 @@ GtkTreeIter *gtktree_iter_find_node(GtkTreeIter * parent, return NULL; } - /* * Update the tree by adding/removing entries * Does not change other nodes @@ -1329,7 +1293,6 @@ static void update_tree(struct menu *src, GtkTreeIter * dst) } } - /* Display the whole tree (single/split/full view) */ static void display_tree(struct menu *menu) { @@ -1439,7 +1402,6 @@ void fixup_rootmenu(struct menu *menu) } } - /* Main */ int main(int ac, char *av[]) { diff --git a/scripts/kconfig/list.h b/scripts/kconfig/list.h index 06e8d555d8..9f1d16a43c 100644 --- a/scripts/kconfig/list.h +++ b/scripts/kconfig/list.h @@ -20,12 +20,10 @@ const typeof( ((type *)0)->member ) *__mptr = (ptr); \ (type *)( (char *)__mptr - offsetof(type,member) );}) - struct list_head { struct list_head *next, *prev; }; - #define LIST_HEAD_INIT(name) { &(name), &(name) } #define LIST_HEAD(name) \ diff --git a/scripts/kconfig/lkc.h b/scripts/kconfig/lkc.h index 9eb7c837cd..2daf47f57c 100644 --- a/scripts/kconfig/lkc.h +++ b/scripts/kconfig/lkc.h @@ -131,7 +131,6 @@ static inline tristate sym_get_tristate_value(struct symbol *sym) return sym->curr.tri; } - static inline struct symbol *sym_get_choice_value(struct symbol *sym) { return (struct symbol *)sym->curr.val; diff --git a/scripts/kconfig/lxdialog/dialog.h b/scripts/kconfig/lxdialog/dialog.h index 68b565e3c4..7675c4702a 100644 --- a/scripts/kconfig/lxdialog/dialog.h +++ b/scripts/kconfig/lxdialog/dialog.h @@ -213,7 +213,6 @@ int dialog_yesno(const char *title, const char *prompt, int height, int width); int dialog_msgbox(const char *title, const char *prompt, int height, int width, int pause); - typedef void (*update_text_fn)(char *buf, size_t start, size_t end, void *_data); int dialog_textbox(const char *title, char *tbuf, int initial_height, diff --git a/scripts/kconfig/lxdialog/textbox.c b/scripts/kconfig/lxdialog/textbox.c index 4e339b1266..12e68c0fb6 100644 --- a/scripts/kconfig/lxdialog/textbox.c +++ b/scripts/kconfig/lxdialog/textbox.c @@ -33,7 +33,6 @@ static void refresh_text_box(WINDOW *dialog, WINDOW *box, int boxh, int boxw, wrefresh(dialog); } - /* * Display text from a file in a dialog box. * diff --git a/scripts/kconfig/menu.c b/scripts/kconfig/menu.c index 4cf15d449c..0fe7f3255a 100644 --- a/scripts/kconfig/menu.c +++ b/scripts/kconfig/menu.c @@ -853,7 +853,6 @@ struct gstr get_relations_str(struct symbol **sym_arr, struct list_head *head) return res; } - void menu_get_ext_help(struct menu *menu, struct gstr *help) { struct symbol *sym = menu->sym; diff --git a/scripts/kconfig/nconf.c b/scripts/kconfig/nconf.c index 5cbdb92e11..ca878212f0 100644 --- a/scripts/kconfig/nconf.c +++ b/scripts/kconfig/nconf.c @@ -687,7 +687,6 @@ static int do_exit(void) return 0; } - static void search_conf(void) { struct symbol **sym_arr; @@ -731,7 +730,6 @@ again: str_free(&title); } - static void build_conf(struct menu *menu) { struct symbol *sym; diff --git a/scripts/kconfig/nconf.gui.c b/scripts/kconfig/nconf.gui.c index 88874acfda..2a3b853e7e 100644 --- a/scripts/kconfig/nconf.gui.c +++ b/scripts/kconfig/nconf.gui.c @@ -143,7 +143,6 @@ void set_colors(void) } } - /* this changes the windows attributes !!! */ void print_in_middle(WINDOW *win, int starty, @@ -154,7 +153,6 @@ void print_in_middle(WINDOW *win, { int length, x, y; float temp; - if (win == NULL) win = stdscr; getyx(win, y, x); @@ -256,7 +254,6 @@ int btn_dialog(WINDOW *main_window, const char *msg, int btn_num, ...) int i, x, y; int res = -1; - va_start(ap, btn_num); for (i = 0; i < btn_num; i++) { btn = va_arg(ap, char *); @@ -280,7 +277,6 @@ int btn_dialog(WINDOW *main_window, const char *msg, int btn_num, ...) y = (getmaxy(stdscr)-(msg_lines+4))/2; x = (getmaxx(stdscr)-(total_width+4))/2; - /* create the windows */ if (btn_num > 0) win_rows = msg_lines+4; @@ -315,7 +311,6 @@ int btn_dialog(WINDOW *main_window, const char *msg, int btn_num, ...) set_menu_mark(menu, ""); post_menu(menu); - touchwin(win); refresh_all_windows(main_window); while ((res = wgetch(win))) { diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c index 6e940002f8..1bf5929c39 100644 --- a/test/boot/bootdev.c +++ b/test/boot/bootdev.c @@ -680,7 +680,6 @@ static int bootdev_test_next_label(struct unit_test_state *uts) BOOTSTD_TEST(bootdev_test_next_label, UT_TESTF_DM | UT_TESTF_SCAN_FDT | UT_TESTF_ETH_BOOTDEV | UT_TESTF_SF_BOOTDEV); - /* Check iterating to the next prioirty in a list */ static int bootdev_test_next_prio(struct unit_test_state *uts) { diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c index d50ce5803c..4c6cc3cf09 100644 --- a/test/cmd/setexpr.c +++ b/test/cmd/setexpr.c @@ -329,7 +329,6 @@ static int setexpr_test_str(struct unit_test_state *uts) } SETEXPR_TEST(setexpr_test_str, UT_TESTF_CONSOLE_REC); - /* Test 'setexpr' command with concatenating strings */ static int setexpr_test_str_oper(struct unit_test_state *uts) { diff --git a/test/compression.c b/test/compression.c index aa1d38bb7b..618a193695 100644 --- a/test/compression.c +++ b/test/compression.c @@ -139,7 +139,6 @@ static const char zstd_compressed[] = "\x01\xe4\xf4\x6e\xfa"; static const unsigned long zstd_compressed_size = sizeof(zstd_compressed) - 1; - #define TEST_BUFFER_SIZE 512 typedef int (*mutate_func)(struct unit_test_state *uts, void *, unsigned long, diff --git a/test/dm/devres.c b/test/dm/devres.c index 95a470b9f1..7a3a669ddd 100644 --- a/test/dm/devres.c +++ b/test/dm/devres.c @@ -69,7 +69,6 @@ static int dm_test_devres_free(struct unit_test_state *uts) } DM_TEST(dm_test_devres_free, UT_TESTF_SCAN_PDATA); - /* Test that kzalloc() returns memory that is zeroed */ static int dm_test_devres_kzalloc(struct unit_test_state *uts) { diff --git a/test/dm/fwu_mdata.c b/test/dm/fwu_mdata.c index 0be7f4519e..6154480ba8 100644 --- a/test/dm/fwu_mdata.c +++ b/test/dm/fwu_mdata.c @@ -129,7 +129,6 @@ static int dm_test_fwu_mdata_write(struct unit_test_state *uts) */ event_notify_null(EVT_MAIN_LOOP); - ut_assertok(uclass_first_device_err(UCLASS_FWU_MDATA, &dev)); ut_assertok(fwu_init()); diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c index ef9e8e5a0d..444c4dce08 100644 --- a/test/dm/remoteproc.c +++ b/test/dm/remoteproc.c @@ -28,7 +28,6 @@ static int dm_test_remoteproc_base(struct unit_test_state *uts) /* Ensure we are initialized */ ut_asserteq(true, rproc_is_initialized()); - /* platform data device 1 */ ut_assertok(rproc_stop(0)); ut_assertok(rproc_reset(0)); diff --git a/test/dm/spmi.c b/test/dm/spmi.c index e10ae8db4d..ee444f3b9b 100644 --- a/test/dm/spmi.c +++ b/test/dm/spmi.c @@ -70,7 +70,6 @@ static int dm_test_spmi_access(struct unit_test_state *uts) } DM_TEST(dm_test_spmi_access, UT_TESTF_SCAN_FDT); - /* Test if it's possible to access GPIO that should be in pmic */ static int dm_test_spmi_access_peripheral(struct unit_test_state *uts) { diff --git a/test/dm/usb.c b/test/dm/usb.c index 9a571938b8..0bbea219ec 100644 --- a/test/dm/usb.c +++ b/test/dm/usb.c @@ -423,7 +423,6 @@ static int dm_test_usb_keyb(struct unit_test_state *uts) {0x00, 0x00, "\0"} }; - state_set_skip_delays(true); ut_assertok(usb_init()); diff --git a/test/py/requirements.txt b/test/py/requirements.txt index c1dd636931..6d3030cf90 100644 --- a/test/py/requirements.txt +++ b/test/py/requirements.txt @@ -27,4 +27,4 @@ testtools==2.3.0 traceback2==1.4.0 unittest2==1.1.0 wcwidth==0.1.7 -zipp==0.6.0 +zipp==3.19.2 diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py index a5b5c8a385..f3a2dff5c2 100644 --- a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py +++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py @@ -76,7 +76,7 @@ class TestEfiCapsuleFirmwareRaw: self, u_boot_config, u_boot_console, efi_capsule_data): """ Test Case 2 Update U-Boot and U-Boot environment on SPI Flash but with OsIndications unset - No update should happen + No update should happen unless CONFIG_EFI_IGNORE_OSINDICATIONS is set 0x100000-0x150000: U-Boot binary (but dummy) 0x150000-0x200000: U-Boot environment (but dummy) """ @@ -91,16 +91,27 @@ class TestEfiCapsuleFirmwareRaw: # reboot u_boot_console.restart_uboot() + ignore_os_indications = u_boot_config.buildconfig.get( + 'config_efi_ignore_osindications') + need_reboot = True if ignore_os_indications else False + + capsule_auth = u_boot_config.buildconfig.get( + 'config_efi_capsule_authenticate') + capsule_early = u_boot_config.buildconfig.get( 'config_efi_capsule_on_disk_early') with u_boot_console.log.section('Test Case 2-b, after reboot'): if not capsule_early: - exec_manual_update(u_boot_console, disk_img, capsule_files, False) + exec_manual_update(u_boot_console, disk_img, capsule_files, need_reboot) - check_file_exist(u_boot_console, disk_img, capsule_files) + if not ignore_os_indications: + check_file_exist(u_boot_console, disk_img, capsule_files) - verify_content(u_boot_console, '100000', 'u-boot:Old') - verify_content(u_boot_console, '150000', 'u-boot-env:Old') + expected = 'u-boot:New' if (ignore_os_indications and not capsule_auth) else 'u-boot:Old' + verify_content(u_boot_console, '100000', expected) + + expected = 'u-boot-env:New' if (ignore_os_indications and not capsule_auth) else 'u-boot-env:Old' + verify_content(u_boot_console, '150000', expected) def test_efi_capsule_fw3( self, u_boot_config, u_boot_console, efi_capsule_data): diff --git a/test/py/tests/test_fpga.py b/test/py/tests/test_fpga.py index ca7ef8ea40..460ff227f6 100644 --- a/test/py/tests/test_fpga.py +++ b/test/py/tests/test_fpga.py @@ -256,7 +256,7 @@ def test_fpga_loadbp(u_boot_console): @pytest.mark.buildconfigspec('cmd_fpga') @pytest.mark.buildconfigspec('cmd_fpga_loadmk') @pytest.mark.buildconfigspec('cmd_echo') -@pytest.mark.buildconfigspec('image_format_legacy') +@pytest.mark.buildconfigspec('legacy_image_format') def test_fpga_loadmk_fail(u_boot_console): f, dev, addr, bit, bit_size = load_file_from_var(u_boot_console, 'mkimage_legacy') @@ -275,7 +275,7 @@ def test_fpga_loadmk_fail(u_boot_console): @pytest.mark.buildconfigspec('cmd_fpga') @pytest.mark.buildconfigspec('cmd_fpga_loadmk') @pytest.mark.buildconfigspec('cmd_echo') -@pytest.mark.buildconfigspec('image_format_legacy') +@pytest.mark.buildconfigspec('legacy_image_format') def test_fpga_loadmk_legacy(u_boot_console): f, dev, addr, bit, bit_size = load_file_from_var(u_boot_console, 'mkimage_legacy') @@ -289,7 +289,7 @@ def test_fpga_loadmk_legacy(u_boot_console): @pytest.mark.buildconfigspec('cmd_fpga') @pytest.mark.buildconfigspec('cmd_fpga_loadmk') @pytest.mark.buildconfigspec('cmd_echo') -@pytest.mark.buildconfigspec('image_format_legacy') +@pytest.mark.buildconfigspec('legacy_image_format') def test_fpga_loadmk_legacy_variable_fpga(u_boot_console): f, dev, addr, bit, bit_size = load_file_from_var(u_boot_console, 'mkimage_legacy') @@ -306,7 +306,7 @@ def test_fpga_loadmk_legacy_variable_fpga(u_boot_console): @pytest.mark.buildconfigspec('cmd_fpga') @pytest.mark.buildconfigspec('cmd_fpga_loadmk') @pytest.mark.buildconfigspec('cmd_echo') -@pytest.mark.buildconfigspec('image_format_legacy') +@pytest.mark.buildconfigspec('legacy_image_format') def test_fpga_loadmk_legacy_variable_fpgadata(u_boot_console): f, dev, addr, bit, bit_size = load_file_from_var(u_boot_console, 'mkimage_legacy') @@ -323,7 +323,7 @@ def test_fpga_loadmk_legacy_variable_fpgadata(u_boot_console): @pytest.mark.buildconfigspec('cmd_fpga') @pytest.mark.buildconfigspec('cmd_fpga_loadmk') @pytest.mark.buildconfigspec('cmd_echo') -@pytest.mark.buildconfigspec('image_format_legacy') +@pytest.mark.buildconfigspec('legacy_image_format') def test_fpga_loadmk_legacy_variable(u_boot_console): f, dev, addr, bit, bit_size = load_file_from_var(u_boot_console, 'mkimage_legacy') @@ -342,7 +342,7 @@ def test_fpga_loadmk_legacy_variable(u_boot_console): @pytest.mark.buildconfigspec('cmd_fpga') @pytest.mark.buildconfigspec('cmd_fpga_loadmk') @pytest.mark.buildconfigspec('cmd_echo') -@pytest.mark.buildconfigspec('image_format_legacy') +@pytest.mark.buildconfigspec('legacy_image_format') @pytest.mark.buildconfigspec('gzip') def test_fpga_loadmk_legacy_gz(u_boot_console): f, dev, addr, bit, bit_size = load_file_from_var(u_boot_console, 'mkimage_legacy_gz') diff --git a/tools/env/fw_env.h b/tools/env/fw_env.h index 78c803c944..060eea542c 100644 --- a/tools/env/fw_env.h +++ b/tools/env/fw_env.h @@ -94,7 +94,6 @@ int fw_env_set(int argc, char *argv[], struct env_opts *opts); */ int fw_parse_script(char *fname, struct env_opts *opts); - /** * fw_env_open() - read enviroment from flash into RAM cache * @@ -151,7 +150,6 @@ int fw_env_flush(struct env_opts *opts); */ int fw_env_close(struct env_opts *opts); - /** * fw_env_version - return the current version of the library * diff --git a/tools/envcrc.c b/tools/envcrc.c index 550f31038b..0905180036 100644 --- a/tools/envcrc.c +++ b/tools/envcrc.c @@ -48,7 +48,6 @@ #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE) - #ifdef ENV_IS_EMBEDDED # include <env_internal.h> extern unsigned int env_size; diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c index f1ff1946bd..037176bc9e 100644 --- a/tools/fdtgrep.c +++ b/tools/fdtgrep.c @@ -102,7 +102,6 @@ static void print_ansi_colour(FILE *fout, int col) fprintf(fout, "\033[1;%dm", col + 30); } - /** * value_add() - Add a new value to our list of things to grep for * diff --git a/tools/gdb/remote.c b/tools/gdb/remote.c index 3cd0421351..f17bb06fb4 100644 --- a/tools/gdb/remote.c +++ b/tools/gdb/remote.c @@ -45,7 +45,6 @@ extern "C" { #endif #endif /* alloca not defined. */ - #include "serial.h" #include "error.h" #include "remote.h" @@ -313,7 +312,6 @@ static int remote_binary_checked; ? (REGISTER_BYTES * 2 + 32) \ : 400) - /* This variable sets the number of bytes to be written to the target in a single packet. Normally PBUFSIZ is satisfactory, but some targets need smaller values (perhaps because the receiving end diff --git a/tools/imagetool.h b/tools/imagetool.h index a766aa2ae9..57be608210 100644 --- a/tools/imagetool.h +++ b/tools/imagetool.h @@ -256,7 +256,6 @@ time_t imagetool_get_source_date( * for ex. default_image.c, fit_image.c */ - void pbl_load_uboot(int fd, struct image_tool_params *mparams); int zynqmpbif_copy_image(int fd, struct image_tool_params *mparams); int imx8image_copy_image(int fd, struct image_tool_params *mparams); diff --git a/tools/img2srec.c b/tools/img2srec.c index 75efd76e0e..5a6d3259f3 100644 --- a/tools/img2srec.c +++ b/tools/img2srec.c @@ -109,7 +109,6 @@ static char* ExtractDecimal (uint32_t* value, char* getPtr) return getPtr; } /* ExtractDecimal */ - static void ExtractNumber (uint32_t* value, char* getPtr) { bool neg = false; @@ -129,7 +128,6 @@ static void ExtractNumber (uint32_t* value, char* getPtr) if (neg) *value = -(*value); } /* ExtractNumber */ - static uint8_t* ExtractWord(uint16_t* value, uint8_t* buffer) { uint16_t x; @@ -139,7 +137,6 @@ static uint8_t* ExtractWord(uint16_t* value, uint8_t* buffer) return buffer; } /* ExtractWord */ - static uint8_t* ExtractLong(uint32_t* value, uint8_t* buffer) { uint32_t x; @@ -151,14 +148,12 @@ static uint8_t* ExtractLong(uint32_t* value, uint8_t* buffer) return buffer; } /* ExtractLong */ - static uint8_t* ExtractBlock(uint16_t count, uint8_t* data, uint8_t* buffer) { while (count--) *data++ = *buffer++; return buffer; } /* ExtractBlock */ - static char* WriteHex(char* pa, uint8_t value, uint16_t* pCheckSum) { uint16_t temp; @@ -173,7 +168,6 @@ static char* WriteHex(char* pa, uint8_t value, uint16_t* pCheckSum) return pa; } - static char* BuildSRecord(char* pa, uint16_t sType, uint32_t addr, const uint8_t* data, int nCount) { @@ -223,7 +217,6 @@ static char* BuildSRecord(char* pa, uint16_t sType, uint32_t addr, return pa; } - static void ConvertELF(char* fileName, uint32_t loadOffset) { FILE* file; @@ -240,7 +233,6 @@ static void ConvertELF(char* fileName, uint32_t loadOffset) char srecLine[128]; char *hdr_name; - /* open file */ if ((file = fopen(fileName,"rb")) == NULL) { fprintf (stderr, "Can't open %s: %s\n", fileName, strerror(errno)); @@ -348,7 +340,6 @@ static void ConvertELF(char* fileName, uint32_t loadOffset) fclose(file); } /* ConvertELF */ - /************************************************************************* | MAIN |*************************************************************************/ diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c index 939f829a9f..d60d293e64 100644 --- a/tools/imx8mimage.c +++ b/tools/imx8mimage.c @@ -5,7 +5,6 @@ * Peng Fan <peng.fan@nxp.com> */ - #include "imagetool.h" #include <image.h> #include "imximage.h" diff --git a/tools/imximage.c b/tools/imximage.c index 2df4c7dd49..467d9f27d2 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -793,7 +793,6 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) return dcd_len; } - static int imximage_check_image_types(uint8_t type) { if (type == IH_TYPE_IMXIMAGE) @@ -1057,7 +1056,6 @@ static int imximage_generate(struct image_tool_params *params, return pad_len; } - /* * imximage parameters */ diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 4dce495ff0..d1cbced28f 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -804,7 +804,6 @@ static int kwb_sign_and_verify(RSA *key, void *data, int datasz, return 0; } - static int kwb_dump_fuse_cmds_38x(FILE *out, struct secure_hdr_v1 *sec_hdr) { struct hash_v1 kak_pub_hash; diff --git a/tools/mxsimage.c b/tools/mxsimage.c index ead61d0cd6..42df0698ca 100644 --- a/tools/mxsimage.c +++ b/tools/mxsimage.c @@ -2058,7 +2058,6 @@ static int sb_verify_image_end(struct sb_image_ctx *ictx, return ret; } - static int sb_build_tree_from_img(struct sb_image_ctx *ictx) { long filesize; |