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author | Tom Rini <trini@konsulko.com> | 2022-04-22 10:17:35 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2022-04-22 10:17:35 -0400 |
commit | bfdb30559c763b74199666dfb20e1d9f207b917a (patch) | |
tree | 987b8043b620aeb00cd2a0bf0d5975e8959c17d5 /scripts | |
parent | 759a89924b8c5eb4ee776d03d948c80e3d104a9e (diff) | |
download | u-boot-bfdb30559c763b74199666dfb20e1d9f207b917a.tar.gz u-boot-bfdb30559c763b74199666dfb20e1d9f207b917a.tar.bz2 u-boot-bfdb30559c763b74199666dfb20e1d9f207b917a.zip |
configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'scripts')
-rw-r--r-- | scripts/config_whitelist.txt | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index be597f7a3e..bddf9b134b 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -520,9 +520,6 @@ CONFIG_PPC_SPINTABLE_COMPATIBLE CONFIG_PRAM CONFIG_PSRAM_SCFG CONFIG_PWM -CONFIG_PXA_LCD -CONFIG_PXA_PWR_I2C -CONFIG_PXA_STD_I2C CONFIG_PXA_VGA CONFIG_QBMAN_CLK_DIV CONFIG_RAMBOOT_NAND @@ -709,14 +706,12 @@ CONFIG_SYS_CACHE_DCACR CONFIG_SYS_CACHE_ICACR CONFIG_SYS_CACHE_STASHING CONFIG_SYS_CBSIZE -CONFIG_SYS_CCCR CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_HIGH CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSR_DO_NOT_RELOCATE CONFIG_SYS_CFI_FLASH_STATUS_POLL -CONFIG_SYS_CKEN CONFIG_SYS_CLK CONFIG_SYS_CLKTL_CBCDR CONFIG_SYS_CORE_SRAM @@ -901,7 +896,6 @@ CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME CONFIG_SYS_DPAA_RMAN -CONFIG_SYS_DRAM_BASE CONFIG_SYS_DRAM_SIZE CONFIG_SYS_DRAM_TEST CONFIG_SYS_DSPI_CTAR0 @@ -951,7 +945,6 @@ CONFIG_SYS_FLASH_SECT_SZ CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH_UNLOCK_TOUT CONFIG_SYS_FLASH_WRITE_TOUT -CONFIG_SYS_FLYCNFG_VAL CONFIG_SYS_FM1_10GEC1_PHY_ADDR CONFIG_SYS_FM1_CLK CONFIG_SYS_FM1_DTSEC1_PHY_ADDR @@ -1169,14 +1162,6 @@ CONFIG_SYS_FTSDMC021_CR2 CONFIG_SYS_FTSDMC021_TP1 CONFIG_SYS_FTSDMC021_TP2 CONFIG_SYS_FTSMC020_CONFIGS -CONFIG_SYS_GAFR0_L_VAL -CONFIG_SYS_GAFR0_U_VAL -CONFIG_SYS_GAFR1_L_VAL -CONFIG_SYS_GAFR1_U_VAL -CONFIG_SYS_GAFR2_L_VAL -CONFIG_SYS_GAFR2_U_VAL -CONFIG_SYS_GAFR3_L_VAL -CONFIG_SYS_GAFR3_U_VAL CONFIG_SYS_GBL_DATA_OFFSET CONFIG_SYS_GBL_DATA_SIZE CONFIG_SYS_GIC400_ADDR @@ -1184,14 +1169,6 @@ CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR CONFIG_SYS_GP2DIR CONFIG_SYS_GP2ODR -CONFIG_SYS_GPCR0_VAL -CONFIG_SYS_GPCR1_VAL -CONFIG_SYS_GPCR2_VAL -CONFIG_SYS_GPCR3_VAL -CONFIG_SYS_GPDR0_VAL -CONFIG_SYS_GPDR1_VAL -CONFIG_SYS_GPDR2_VAL -CONFIG_SYS_GPDR3_VAL CONFIG_SYS_GPIO1_EN CONFIG_SYS_GPIO1_FUNC CONFIG_SYS_GPIO1_LED @@ -1200,10 +1177,6 @@ CONFIG_SYS_GPIO_EN CONFIG_SYS_GPIO_FUNC CONFIG_SYS_GPIO_OUT CONFIG_SYS_GPR1 -CONFIG_SYS_GPSR0_VAL -CONFIG_SYS_GPSR1_VAL -CONFIG_SYS_GPSR2_VAL -CONFIG_SYS_GPSR3_VAL CONFIG_SYS_HALT_BEFOR_RAM_JUMP CONFIG_SYS_HMI_BASE CONFIG_SYS_HZ_CLOCK @@ -1228,7 +1201,6 @@ CONFIG_SYS_I2C_PCA9557_ADDR CONFIG_SYS_I2C_PINMUX_CLR CONFIG_SYS_I2C_PINMUX_REG CONFIG_SYS_I2C_PINMUX_SET -CONFIG_SYS_I2C_PXA CONFIG_SYS_I2C_RTC_ADDR CONFIG_SYS_I2C_TCA642X_ADDR CONFIG_SYS_I2C_TCA642X_BUS_NUM @@ -1311,22 +1283,14 @@ CONFIG_SYS_MAX_NAND_CHIPS CONFIG_SYS_MAX_NAND_DEVICE CONFIG_SYS_MBAR CONFIG_SYS_MBAR2 -CONFIG_SYS_MCATT0_VAL -CONFIG_SYS_MCATT1_VAL CONFIG_SYS_MCFRRTC_BASE -CONFIG_SYS_MCIO0_VAL -CONFIG_SYS_MCIO1_VAL CONFIG_SYS_MCKR CONFIG_SYS_MCKR1_VAL CONFIG_SYS_MCKR2_VAL CONFIG_SYS_MCKR_CSS -CONFIG_SYS_MCMEM0_VAL -CONFIG_SYS_MCMEM1_VAL CONFIG_SYS_MDCNFG_VAL CONFIG_SYS_MDIO1_OFFSET -CONFIG_SYS_MDMRS_VAL CONFIG_SYS_MDREFR_VAL -CONFIG_SYS_MECR_VAL CONFIG_SYS_MEMAC_LITTLE_ENDIAN CONFIG_SYS_MEMORY_BASE CONFIG_SYS_MEMORY_SIZE @@ -1415,9 +1379,6 @@ CONFIG_SYS_MPC8xxx_DDR_OFFSET CONFIG_SYS_MPC8xxx_PIC_ADDR CONFIG_SYS_MRAM_BASE CONFIG_SYS_MRAM_SIZE -CONFIG_SYS_MSC0_VAL -CONFIG_SYS_MSC1_VAL -CONFIG_SYS_MSC2_VAL CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST CONFIG_SYS_NAND_AMASK CONFIG_SYS_NAND_BASE @@ -1619,7 +1580,6 @@ CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PME_CLK CONFIG_SYS_POST_MEMORY CONFIG_SYS_POST_MEM_REGIONS -CONFIG_SYS_PSSR_VAL CONFIG_SYS_PTV CONFIG_SYS_PUAPAR CONFIG_SYS_QMAN_CENA_BASE @@ -1758,7 +1718,6 @@ CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS CONFIG_SYS_SST_SECT CONFIG_SYS_SST_SECTSZ CONFIG_SYS_STACK_SIZE -CONFIG_SYS_SXCNFG_VAL CONFIG_SYS_TBIPA_VALUE CONFIG_SYS_TCLK CONFIG_SYS_TIMERBASE |