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author | Yuan Yao <yao.yuan@nxp.com> | 2016-06-08 18:24:54 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2016-06-10 13:44:59 -0700 |
commit | 8c77ef85405dd319f0469d007630b548afb2d401 (patch) | |
tree | b421f6c70c11fbc08d593bf299e051f234ca96f8 /include | |
parent | 82d13340e9d051f193d46596343aa692b0acd92c (diff) | |
download | u-boot-8c77ef85405dd319f0469d007630b548afb2d401.tar.gz u-boot-8c77ef85405dd319f0469d007630b548afb2d401.tar.bz2 u-boot-8c77ef85405dd319f0469d007630b548afb2d401.zip |
armv8: ls2080aqds: disable IFC NOR & QIXIS when QSPI enable
When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux. Enable I2C QIXIS access and I2C
early init to read the sysclk and ddrclk.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/ls2080aqds.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index b44066c407..532a71590d 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -17,6 +17,16 @@ unsigned long get_board_ddr_clk(void); #endif #define CONFIG_SYS_FSL_CLK + +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SYS_NO_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_I2C_EARLY_INIT +#define CONFIG_SYS_I2C_IFDR_DIV 0x7e +#endif + +#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() #define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) |