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| author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | 2023-01-10 04:31:23 -0700 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2023-01-31 22:02:27 +0900 |
| commit | 386f5d367329a202abe71fd790e8ce4598b30e09 (patch) | |
| tree | 236561b4b23b8697628baddf754a8b558eef1ffe /include | |
| parent | 6f5bb9913ca54fe0a3e45f83458eb71103e22ef7 (diff) | |
| download | u-boot-386f5d367329a202abe71fd790e8ce4598b30e09.tar.gz u-boot-386f5d367329a202abe71fd790e8ce4598b30e09.tar.bz2 u-boot-386f5d367329a202abe71fd790e8ce4598b30e09.zip | |
mmc: sdhci: Enable HS400 support if available in caps
HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sdhci.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/sdhci.h b/include/sdhci.h index 64a3d309da..70fefca2a9 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -189,6 +189,7 @@ #define SDHCI_SUPPORT_SDR50 0x00000001 #define SDHCI_SUPPORT_SDR104 0x00000002 #define SDHCI_SUPPORT_DDR50 0x00000004 +#define SDHCI_SUPPORT_HS400 BIT(31) #define SDHCI_USE_SDR50_TUNING 0x00002000 #define SDHCI_CLOCK_MUL_MASK 0x00FF0000 @@ -248,6 +249,8 @@ #define SDHCI_QUIRK_USE_WIDE8 (1 << 8) #define SDHCI_QUIRK_NO_1_8_V (1 << 9) #define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10) +/* Capability register bit-63 indicates HS400 support */ +#define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400 BIT(11) /* to make gcc happy */ struct sdhci_host; |