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authorAlexander Graf <agraf@suse.de>2016-08-19 01:23:23 +0200
committerAlexander Graf <agraf@suse.de>2016-10-19 09:01:50 +0200
commit4b6dddc294a58fd9010926719e5c907beebf9b4d (patch)
tree12dcf54178aaba6693c03dc2fe58386d09567550 /include/smbios.h
parent1befb38b868248dda4e84a57aa779f7e8c0b85c0 (diff)
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x86: Move smbios generation into arch independent directory
We will need the SMBIOS generation function on ARM as well going forward, so let's move it into a non arch specific location. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/smbios.h')
-rw-r--r--include/smbios.h236
1 files changed, 236 insertions, 0 deletions
diff --git a/include/smbios.h b/include/smbios.h
new file mode 100644
index 0000000000..623a703693
--- /dev/null
+++ b/include/smbios.h
@@ -0,0 +1,236 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Adapted from coreboot src/include/smbios.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _SMBIOS_H_
+#define _SMBIOS_H_
+
+/* SMBIOS spec version implemented */
+#define SMBIOS_MAJOR_VER 3
+#define SMBIOS_MINOR_VER 0
+
+/* SMBIOS structure types */
+enum {
+ SMBIOS_BIOS_INFORMATION = 0,
+ SMBIOS_SYSTEM_INFORMATION = 1,
+ SMBIOS_BOARD_INFORMATION = 2,
+ SMBIOS_SYSTEM_ENCLOSURE = 3,
+ SMBIOS_PROCESSOR_INFORMATION = 4,
+ SMBIOS_CACHE_INFORMATION = 7,
+ SMBIOS_SYSTEM_SLOTS = 9,
+ SMBIOS_PHYS_MEMORY_ARRAY = 16,
+ SMBIOS_MEMORY_DEVICE = 17,
+ SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS = 19,
+ SMBIOS_SYSTEM_BOOT_INFORMATION = 32,
+ SMBIOS_END_OF_TABLE = 127
+};
+
+#define SMBIOS_INTERMEDIATE_OFFSET 16
+#define SMBIOS_STRUCT_EOS_BYTES 2
+
+struct __packed smbios_entry {
+ u8 anchor[4];
+ u8 checksum;
+ u8 length;
+ u8 major_ver;
+ u8 minor_ver;
+ u16 max_struct_size;
+ u8 entry_point_rev;
+ u8 formatted_area[5];
+ u8 intermediate_anchor[5];
+ u8 intermediate_checksum;
+ u16 struct_table_length;
+ u32 struct_table_address;
+ u16 struct_count;
+ u8 bcd_rev;
+};
+
+/* BIOS characteristics */
+#define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7)
+#define BIOS_CHARACTERISTICS_UPGRADEABLE (1 << 11)
+#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT (1 << 16)
+
+#define BIOS_CHARACTERISTICS_EXT1_ACPI (1 << 0)
+#define BIOS_CHARACTERISTICS_EXT2_TARGET (1 << 2)
+
+struct __packed smbios_type0 {
+ u8 type;
+ u8 length;
+ u16 handle;
+ u8 vendor;
+ u8 bios_ver;
+ u16 bios_start_segment;
+ u8 bios_release_date;
+ u8 bios_rom_size;
+ u64 bios_characteristics;
+ u8 bios_characteristics_ext1;
+ u8 bios_characteristics_ext2;
+ u8 bios_major_release;
+ u8 bios_minor_release;
+ u8 ec_major_release;
+ u8 ec_minor_release;
+ char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+struct __packed smbios_type1 {
+ u8 type;
+ u8 length;
+ u16 handle;
+ u8 manufacturer;
+ u8 product_name;
+ u8 version;
+ u8 serial_number;
+ u8 uuid[16];
+ u8 wakeup_type;
+ u8 sku_number;
+ u8 family;
+ char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+#define SMBIOS_BOARD_FEATURE_HOSTING (1 << 0)
+#define SMBIOS_BOARD_MOTHERBOARD 10
+
+struct __packed smbios_type2 {
+ u8 type;
+ u8 length;
+ u16 handle;
+ u8 manufacturer;
+ u8 product_name;
+ u8 version;
+ u8 serial_number;
+ u8 asset_tag_number;
+ u8 feature_flags;
+ u8 chassis_location;
+ u16 chassis_handle;
+ u8 board_type;
+ char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+#define SMBIOS_ENCLOSURE_DESKTOP 3
+#define SMBIOS_STATE_SAFE 3
+#define SMBIOS_SECURITY_NONE 3
+
+struct __packed smbios_type3 {
+ u8 type;
+ u8 length;
+ u16 handle;
+ u8 manufacturer;
+ u8 chassis_type;
+ u8 version;
+ u8 serial_number;
+ u8 asset_tag_number;
+ u8 bootup_state;
+ u8 power_supply_state;
+ u8 thermal_state;
+ u8 security_status;
+ u32 oem_defined;
+ u8 height;
+ u8 number_of_power_cords;
+ u8 element_count;
+ u8 element_record_length;
+ char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+#define SMBIOS_PROCESSOR_TYPE_CENTRAL 3
+#define SMBIOS_PROCESSOR_STATUS_ENABLED 1
+#define SMBIOS_PROCESSOR_UPGRADE_NONE 6
+
+struct __packed smbios_type4 {
+ u8 type;
+ u8 length;
+ u16 handle;
+ u8 socket_designation;
+ u8 processor_type;
+ u8 processor_family;
+ u8 processor_manufacturer;
+ u32 processor_id[2];
+ u8 processor_version;
+ u8 voltage;
+ u16 external_clock;
+ u16 max_speed;
+ u16 current_speed;
+ u8 status;
+ u8 processor_upgrade;
+ u16 l1_cache_handle;
+ u16 l2_cache_handle;
+ u16 l3_cache_handle;
+ u8 serial_number;
+ u8 asset_tag;
+ u8 part_number;
+ u8 core_count;
+ u8 core_enabled;
+ u8 thread_count;
+ u16 processor_characteristics;
+ u16 processor_family2;
+ u16 core_count2;
+ u16 core_enabled2;
+ u16 thread_count2;
+ char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+struct __packed smbios_type32 {
+ u8 type;
+ u8 length;
+ u16 handle;
+ u8 reserved[6];
+ u8 boot_status;
+ u8 eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+struct __packed smbios_type127 {
+ u8 type;
+ u8 length;
+ u16 handle;
+ u8 eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
+struct __packed smbios_header {
+ u8 type;
+ u8 length;
+ u16 handle;
+};
+
+/**
+ * fill_smbios_header() - Fill the header of an SMBIOS table
+ *
+ * This fills the header of an SMBIOS table structure.
+ *
+ * @table: start address of the structure
+ * @type: the type of structure
+ * @length: the length of the formatted area of the structure
+ * @handle: the structure's handle, a unique 16-bit number
+ */
+static inline void fill_smbios_header(void *table, int type,
+ int length, int handle)
+{
+ struct smbios_header *header = table;
+
+ header->type = type;
+ header->length = length - SMBIOS_STRUCT_EOS_BYTES;
+ header->handle = handle;
+}
+
+/**
+ * Function prototype to write a specific type of SMBIOS structure
+ *
+ * @addr: start address to write the structure
+ * @handle: the structure's handle, a unique 16-bit number
+ * @return: size of the structure
+ */
+typedef int (*smbios_write_type)(u32 *addr, int handle);
+
+/**
+ * write_smbios_table() - Write SMBIOS table
+ *
+ * This writes SMBIOS table at a given address.
+ *
+ * @addr: start address to write SMBIOS table
+ * @return: end address of SMBIOS table
+ */
+u32 write_smbios_table(u32 addr);
+
+#endif /* _SMBIOS_H_ */