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| author | Heiko Stuebner <heiko.stuebner@cherry.de> | 2024-06-10 15:13:34 +0200 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2024-06-14 17:13:35 +0800 |
| commit | 192e8d66e3b0c55fdade64ca8ee961945bd5d8b0 (patch) | |
| tree | e67044c70b9df91dbf57ffa29f56eac2ff19f656 /dts | |
| parent | 5d12fcf03395527b38d264c3c5bf8b4f77f77ec3 (diff) | |
| download | u-boot-192e8d66e3b0c55fdade64ca8ee961945bd5d8b0.tar.gz u-boot-192e8d66e3b0c55fdade64ca8ee961945bd5d8b0.tar.bz2 u-boot-192e8d66e3b0c55fdade64ca8ee961945bd5d8b0.zip | |
arm64: dts: rockchip: fix pcie-refclk frequency on rk3588 tiger
The clock-generator of course only produces a 100MHz clock rate,
not 1GHz.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240423114635.2637310-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 0eb2a93518fb4728bd1d55fcd3b57fce4797ef1d ]
(cherry picked from commit b574cbafae976cf508692088944e45c9764c0048)
Diffstat (limited to 'dts')
| -rw-r--r-- | dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi index 29f8e536de..a8565720cf 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi @@ -46,7 +46,7 @@ pcie_refclk_gen: pcie-refclk-gen-clock { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <1000000000>; + clock-frequency = <100000000>; }; pcie_refclk: pcie-refclk-clock { |