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authorDominic Rath <rath@ibv-augsburg.net>2022-03-23 16:04:27 +0100
committerTom Rini <trini@konsulko.com>2022-04-04 19:02:04 -0400
commite4901e65910494f39f06654fdde5336633a5d89a (patch)
tree4f6a77c0a42705dd9eb6e6805064648ed0a21202 /drivers
parentca1d803a4740bb565c05acb5a52491bbd9f6464d (diff)
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ram: k3-am654: Write all configuration values
Makes it possible to use 16-bit DDR memory. Signed-off-by: Dominic Rath <rath@ibv-augsburg.net> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ram/k3-am654-ddrss.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c
index 4ec12bf42e..a48ebe6ada 100644
--- a/drivers/ram/k3-am654-ddrss.c
+++ b/drivers/ram/k3-am654-ddrss.c
@@ -265,6 +265,16 @@ static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss)
ddrss_phy_writel(DDRSS_DDRPHY_ACIOCR5, ioctl->ddrphy_aciocr5);
ddrss_phy_writel(DDRSS_DDRPHY_IOVCR0, ioctl->ddrphy_iovcr0);
+ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR0, cfg->ddrphy_dx2gcr0);
+ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR1, cfg->ddrphy_dx2gcr1);
+ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR2, cfg->ddrphy_dx2gcr2);
+ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR3, cfg->ddrphy_dx2gcr3);
+
+ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR0, cfg->ddrphy_dx3gcr0);
+ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR1, cfg->ddrphy_dx3gcr1);
+ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR2, cfg->ddrphy_dx3gcr2);
+ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR3, cfg->ddrphy_dx3gcr3);
+
ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR0, cfg->ddrphy_dx4gcr0);
ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR1, cfg->ddrphy_dx4gcr1);
ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR2, cfg->ddrphy_dx4gcr2);