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author | Andre Przywara <andre.przywara@arm.com> | 2016-10-21 02:24:29 +0100 |
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committer | Marek Vasut <marex@denx.de> | 2016-10-29 19:45:40 +0200 |
commit | 57faca19a82fc9b43a227824c30aeb76a43d1957 (patch) | |
tree | d8db13a5988005dd9922cbf6e6c85b7b594d3419 /drivers/usb/host/ohci-hcd.c | |
parent | 9eea45f532301376af4498a131246ff1e130a63a (diff) | |
download | u-boot-57faca19a82fc9b43a227824c30aeb76a43d1957.tar.gz u-boot-57faca19a82fc9b43a227824c30aeb76a43d1957.tar.bz2 u-boot-57faca19a82fc9b43a227824c30aeb76a43d1957.zip |
drivers: USB: OHCI: allow compilation for 64-bit targets
OHCI has a known limitation of allowing only 32-bit DMA buffer
addresses, so we have a lot of u32 variables around, which are assigned
to pointers and vice versa. This obviously creates issues with 64-bit
systems, so the compiler complains here and there.
To allow compilation for 64-bit boards which use only memory below 4GB
anyway (and to avoid more invasive fixes), adjust some casts and types
and assume that the EDs and TDs are all located in the lower 4GB.
This fixes compilation of the OHCI driver for the Pine64.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/usb/host/ohci-hcd.c')
-rw-r--r-- | drivers/usb/host/ohci-hcd.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index ccbfc0265a..0f6d03ec3b 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -682,7 +682,7 @@ static int ep_link(ohci_t *ohci, ed_t *edi) ed->hwNextED = 0; flush_dcache_ed(ed); if (ohci->ed_controltail == NULL) - ohci_writel(ed, &ohci->regs->ed_controlhead); + ohci_writel((uintptr_t)ed, &ohci->regs->ed_controlhead); else ohci->ed_controltail->hwNextED = m32_swap((unsigned long)ed); @@ -700,7 +700,7 @@ static int ep_link(ohci_t *ohci, ed_t *edi) ed->hwNextED = 0; flush_dcache_ed(ed); if (ohci->ed_bulktail == NULL) - ohci_writel(ed, &ohci->regs->ed_bulkhead); + ohci_writel((uintptr_t)ed, &ohci->regs->ed_bulkhead); else ohci->ed_bulktail->hwNextED = m32_swap((unsigned long)ed); @@ -753,7 +753,7 @@ static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed, /* ED might have been unlinked through another path */ while (*ed_p != 0) { - if (((struct ed *) + if (((struct ed *)(uintptr_t) m32_swap((unsigned long)ed_p)) == ed) { *ed_p = ed->hwNextED; aligned_ed_p = (unsigned long)ed_p; @@ -762,7 +762,7 @@ static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed, aligned_ed_p + ARCH_DMA_MINALIGN); break; } - ed_p = &(((struct ed *) + ed_p = &(((struct ed *)(uintptr_t) m32_swap((unsigned long)ed_p))->hwNextED); } } @@ -798,7 +798,7 @@ static int ep_unlink(ohci_t *ohci, ed_t *edi) if (ohci->ed_controltail == ed) { ohci->ed_controltail = ed->ed_prev; } else { - ((ed_t *)m32_swap( + ((ed_t *)(uintptr_t)m32_swap( *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev; } break; @@ -819,7 +819,7 @@ static int ep_unlink(ohci_t *ohci, ed_t *edi) if (ohci->ed_bulktail == ed) { ohci->ed_bulktail = ed->ed_prev; } else { - ((ed_t *)m32_swap( + ((ed_t *)(uintptr_t)m32_swap( *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev; } break; @@ -914,12 +914,13 @@ static void td_fill(ohci_t *ohci, unsigned int info, /* fill the old dummy TD */ td = urb_priv->td [index] = - (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf); + (td_t *)(uintptr_t) + (m32_swap(urb_priv->ed->hwTailP) & ~0xf); td->ed = urb_priv->ed; td->next_dl_td = NULL; td->index = index; - td->data = (__u32)data; + td->data = (uintptr_t)data; #ifdef OHCI_FILL_TRACE if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) { for (i = 0; i < len; i++) @@ -1099,7 +1100,7 @@ static void check_status(td_t *td_list) * we reverse the reversed done-list */ static td_t *dl_reverse_done_list(ohci_t *ohci) { - __u32 td_list_hc; + uintptr_t td_list_hc; td_t *td_rev = NULL; td_t *td_list = NULL; @@ -1862,7 +1863,7 @@ static int hc_start(ohci_t *ohci) ohci_writel(0, &ohci->regs->ed_controlhead); ohci_writel(0, &ohci->regs->ed_bulkhead); - ohci_writel((__u32)ohci->hcca, + ohci_writel((uintptr_t)ohci->hcca, &ohci->regs->hcca); /* reset clears this */ fminterval = 0x2edf; |