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| author | Simon Glass <sjg@chromium.org> | 2021-02-06 14:23:32 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-03-02 15:53:37 -0500 |
| commit | 13ad993fc7b01dc833ae56b9f62ad97e1d0db962 (patch) | |
| tree | 5fcc0b5522d9c639473b591da43b016ac5b31a47 /drivers/tpm/Makefile | |
| parent | 185756ec0f4a2c3238c6031c022c97c520992994 (diff) | |
| download | u-boot-13ad993fc7b01dc833ae56b9f62ad97e1d0db962.tar.gz u-boot-13ad993fc7b01dc833ae56b9f62ad97e1d0db962.tar.bz2 u-boot-13ad993fc7b01dc833ae56b9f62ad97e1d0db962.zip | |
tpm: Don't include cr50 in TPL/SPL
At present the security chip is not used in these U-Boot phases. Update
the Makefile to exclude it.
Fix a few logging statements while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Diffstat (limited to 'drivers/tpm/Makefile')
| -rw-r--r-- | drivers/tpm/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index 8f075b9f45..f64d20067f 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -10,7 +10,7 @@ obj-$(CONFIG_TPM_TIS_SANDBOX) += tpm_tis_sandbox.o obj-$(CONFIG_TPM_ST33ZP24_I2C) += tpm_tis_st33zp24_i2c.o obj-$(CONFIG_TPM_ST33ZP24_SPI) += tpm_tis_st33zp24_spi.o -obj-$(CONFIG_TPM2_CR50_I2C) += cr50_i2c.o +obj-$(CONFIG_$(SPL_TPL_)TPM2_CR50_I2C) += cr50_i2c.o obj-$(CONFIG_TPM2_TIS_SANDBOX) += tpm2_tis_sandbox.o obj-$(CONFIG_TPM2_TIS_SPI) += tpm2_tis_spi.o obj-$(CONFIG_TPM2_FTPM_TEE) += tpm2_ftpm_tee.o |