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| author | Simon Glass <sjg@chromium.org> | 2015-07-02 18:15:53 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-08-05 21:06:11 -0600 |
| commit | 89ca9351cf85ed0843a1a82d626560e0dadb3fe5 (patch) | |
| tree | 7818172827e779b426728c13ed1252f897092012 /drivers/serial/serial_s5p.c | |
| parent | f48eaf01b2f7212987166aae970b895c7e215466 (diff) | |
| download | u-boot-89ca9351cf85ed0843a1a82d626560e0dadb3fe5.tar.gz u-boot-89ca9351cf85ed0843a1a82d626560e0dadb3fe5.tar.bz2 u-boot-89ca9351cf85ed0843a1a82d626560e0dadb3fe5.zip | |
exynos: serial: Refactor init code for debug UART
The debug UART code needs to perform the same init as the normal UART
driver. In preparation for this, move the init code into two functions, one
for the basic init and one for setting the baud rate. This will make adding
debug UART support easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial/serial_s5p.c')
| -rw-r--r-- | drivers/serial/serial_s5p.c | 36 |
1 files changed, 24 insertions, 12 deletions
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index 8469afdaae..7abec53f80 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -14,8 +14,8 @@ #include <fdtdec.h> #include <linux/compiler.h> #include <asm/io.h> -#include <asm/arch/uart.h> #include <asm/arch/clk.h> +#include <asm/arch/uart.h> #include <serial.h> DECLARE_GLOBAL_DATA_PTR; @@ -59,11 +59,20 @@ static const int udivslot[] = { 0xffdf, }; -int s5p_serial_setbrg(struct udevice *dev, int baudrate) +static void __maybe_unused s5p_serial_init(struct s5p_uart *uart) +{ + /* enable FIFOs, auto clear Rx FIFO */ + writel(0x3, &uart->ufcon); + writel(0, &uart->umcon); + /* 8N1 */ + writel(0x3, &uart->ulcon); + /* No interrupts, no DMA, pure polling */ + writel(0x245, &uart->ucon); +} + +static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk, + int baudrate) { - struct s5p_serial_platdata *plat = dev->platdata; - struct s5p_uart *const uart = plat->reg; - u32 uclk = get_uart_clk(plat->port_id); u32 val; val = uclk / baudrate; @@ -74,6 +83,15 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate) writew(udivslot[val % 16], &uart->rest.slot); else writeb(val % 16, &uart->rest.value); +} + +int s5p_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct s5p_serial_platdata *plat = dev->platdata; + struct s5p_uart *const uart = plat->reg; + u32 uclk = get_uart_clk(plat->port_id); + + s5p_serial_baud(uart, uclk, baudrate); return 0; } @@ -83,13 +101,7 @@ static int s5p_serial_probe(struct udevice *dev) struct s5p_serial_platdata *plat = dev->platdata; struct s5p_uart *const uart = plat->reg; - /* enable FIFOs, auto clear Rx FIFO */ - writel(0x3, &uart->ufcon); - writel(0, &uart->umcon); - /* 8N1 */ - writel(0x3, &uart->ulcon); - /* No interrupts, no DMA, pure polling */ - writel(0x245, &uart->ucon); + s5p_serial_init(uart); return 0; } |