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authorKevin Scholz <k-scholz@ti.com>2019-10-07 19:26:36 +0530
committerTom Rini <trini@konsulko.com>2019-10-25 17:33:21 -0400
commit3bb3f266ee617384bb282a6818f675b5aca5c371 (patch)
tree184c684cc6665b06ad5d491bb0cee94371750bd6 /drivers/ram/Kconfig
parentffb6b8e540f9badfeba188663c96aa4980f41612 (diff)
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ram: k3-j721e: Add support for J721E DDR controller
The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper logic to integrate these blocks in the device. The DDR subsystem is used to provide an interface to external SDRAM devices which can be utilized for storing program or data. Introduce support for the DDR controller and DDR phy within the DDR subsystem. Signed-off-by: Kevin Scholz <k-scholz@ti.com Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'drivers/ram/Kconfig')
-rw-r--r--drivers/ram/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 568d8f2c6a..bb431ccfbf 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -54,5 +54,16 @@ config K3_AM654_DDRSS
config add support for the initialization of the external
SDRAM devices connected to DDR subsystem.
+config K3_J721E_DDRSS
+ bool "Enable J721E DDRSS support"
+ depends on RAM
+ help
+ The J721E DDR subsystem comprises DDR controller, DDR PHY and
+ wrapper logic to integrate these blocks in the device. The DDR
+ subsystem is used to provide an interface to external SDRAM
+ devices which can be utilized for storing program or data.
+ Enabling this config adds support for the DDR memory controller
+ on J721E family of SoCs.
+
source "drivers/ram/rockchip/Kconfig"
source "drivers/ram/stm32mp1/Kconfig"